xref: /openbmc/u-boot/common/miiphyutil.c (revision f55137fd)
1 /*
2  * (C) Copyright 2001
3  * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 /*
9  * This provides a bit-banged interface to the ethernet MII management
10  * channel.
11  */
12 
13 #include <common.h>
14 #include <dm.h>
15 #include <miiphy.h>
16 #include <phy.h>
17 
18 #include <asm/types.h>
19 #include <linux/list.h>
20 #include <malloc.h>
21 #include <net.h>
22 
23 /* local debug macro */
24 #undef MII_DEBUG
25 
26 #undef debug
27 #ifdef MII_DEBUG
28 #define debug(fmt, args...)	printf(fmt, ##args)
29 #else
30 #define debug(fmt, args...)
31 #endif /* MII_DEBUG */
32 
33 static struct list_head mii_devs;
34 static struct mii_dev *current_mii;
35 
36 /*
37  * Lookup the mii_dev struct by the registered device name.
38  */
39 struct mii_dev *miiphy_get_dev_by_name(const char *devname)
40 {
41 	struct list_head *entry;
42 	struct mii_dev *dev;
43 
44 	if (!devname) {
45 		printf("NULL device name!\n");
46 		return NULL;
47 	}
48 
49 	list_for_each(entry, &mii_devs) {
50 		dev = list_entry(entry, struct mii_dev, link);
51 		if (strcmp(dev->name, devname) == 0)
52 			return dev;
53 	}
54 
55 	return NULL;
56 }
57 
58 /*****************************************************************************
59  *
60  * Initialize global data. Need to be called before any other miiphy routine.
61  */
62 void miiphy_init(void)
63 {
64 	INIT_LIST_HEAD(&mii_devs);
65 	current_mii = NULL;
66 }
67 
68 struct mii_dev *mdio_alloc(void)
69 {
70 	struct mii_dev *bus;
71 
72 	bus = malloc(sizeof(*bus));
73 	if (!bus)
74 		return bus;
75 
76 	memset(bus, 0, sizeof(*bus));
77 
78 	/* initalize mii_dev struct fields */
79 	INIT_LIST_HEAD(&bus->link);
80 
81 	return bus;
82 }
83 
84 void mdio_free(struct mii_dev *bus)
85 {
86 	free(bus);
87 }
88 
89 int mdio_register(struct mii_dev *bus)
90 {
91 	if (!bus || !bus->read || !bus->write)
92 		return -1;
93 
94 	/* check if we have unique name */
95 	if (miiphy_get_dev_by_name(bus->name)) {
96 		printf("mdio_register: non unique device name '%s'\n",
97 			bus->name);
98 		return -1;
99 	}
100 
101 	/* add it to the list */
102 	list_add_tail(&bus->link, &mii_devs);
103 
104 	if (!current_mii)
105 		current_mii = bus;
106 
107 	return 0;
108 }
109 
110 int mdio_unregister(struct mii_dev *bus)
111 {
112 	if (!bus)
113 		return 0;
114 
115 	/* delete it from the list */
116 	list_del(&bus->link);
117 
118 	if (current_mii == bus)
119 		current_mii = NULL;
120 
121 	return 0;
122 }
123 
124 void mdio_list_devices(void)
125 {
126 	struct list_head *entry;
127 
128 	list_for_each(entry, &mii_devs) {
129 		int i;
130 		struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
131 
132 		printf("%s:\n", bus->name);
133 
134 		for (i = 0; i < PHY_MAX_ADDR; i++) {
135 			struct phy_device *phydev = bus->phymap[i];
136 
137 			if (phydev) {
138 				printf("%d - %s", i, phydev->drv->name);
139 
140 				if (phydev->dev)
141 					printf(" <--> %s\n", phydev->dev->name);
142 				else
143 					printf("\n");
144 			}
145 		}
146 	}
147 }
148 
149 int miiphy_set_current_dev(const char *devname)
150 {
151 	struct mii_dev *dev;
152 
153 	dev = miiphy_get_dev_by_name(devname);
154 	if (dev) {
155 		current_mii = dev;
156 		return 0;
157 	}
158 
159 	printf("No such device: %s\n", devname);
160 
161 	return 1;
162 }
163 
164 struct mii_dev *mdio_get_current_dev(void)
165 {
166 	return current_mii;
167 }
168 
169 struct phy_device *mdio_phydev_for_ethname(const char *ethname)
170 {
171 	struct list_head *entry;
172 	struct mii_dev *bus;
173 
174 	list_for_each(entry, &mii_devs) {
175 		int i;
176 		bus = list_entry(entry, struct mii_dev, link);
177 
178 		for (i = 0; i < PHY_MAX_ADDR; i++) {
179 			if (!bus->phymap[i] || !bus->phymap[i]->dev)
180 				continue;
181 
182 			if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
183 				return bus->phymap[i];
184 		}
185 	}
186 
187 	printf("%s is not a known ethernet\n", ethname);
188 	return NULL;
189 }
190 
191 const char *miiphy_get_current_dev(void)
192 {
193 	if (current_mii)
194 		return current_mii->name;
195 
196 	return NULL;
197 }
198 
199 static struct mii_dev *miiphy_get_active_dev(const char *devname)
200 {
201 	/* If the current mii is the one we want, return it */
202 	if (current_mii)
203 		if (strcmp(current_mii->name, devname) == 0)
204 			return current_mii;
205 
206 	/* Otherwise, set the active one to the one we want */
207 	if (miiphy_set_current_dev(devname))
208 		return NULL;
209 	else
210 		return current_mii;
211 }
212 
213 /*****************************************************************************
214  *
215  * Read to variable <value> from the PHY attached to device <devname>,
216  * use PHY address <addr> and register <reg>.
217  *
218  * This API is deprecated. Use phy_read on a phy_device found via phy_connect
219  *
220  * Returns:
221  *   0 on success
222  */
223 int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
224 		 unsigned short *value)
225 {
226 	struct mii_dev *bus;
227 	int ret;
228 
229 	bus = miiphy_get_active_dev(devname);
230 	if (!bus)
231 		return 1;
232 
233 	ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
234 	if (ret < 0)
235 		return 1;
236 
237 	*value = (unsigned short)ret;
238 	return 0;
239 }
240 
241 /*****************************************************************************
242  *
243  * Write <value> to the PHY attached to device <devname>,
244  * use PHY address <addr> and register <reg>.
245  *
246  * This API is deprecated. Use phy_write on a phy_device found by phy_connect
247  *
248  * Returns:
249  *   0 on success
250  */
251 int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
252 		  unsigned short value)
253 {
254 	struct mii_dev *bus;
255 
256 	bus = miiphy_get_active_dev(devname);
257 	if (bus)
258 		return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
259 
260 	return 1;
261 }
262 
263 /*****************************************************************************
264  *
265  * Print out list of registered MII capable devices.
266  */
267 void miiphy_listdev(void)
268 {
269 	struct list_head *entry;
270 	struct mii_dev *dev;
271 
272 	puts("MII devices: ");
273 	list_for_each(entry, &mii_devs) {
274 		dev = list_entry(entry, struct mii_dev, link);
275 		printf("'%s' ", dev->name);
276 	}
277 	puts("\n");
278 
279 	if (current_mii)
280 		printf("Current device: '%s'\n", current_mii->name);
281 }
282 
283 /*****************************************************************************
284  *
285  * Read the OUI, manufacture's model number, and revision number.
286  *
287  * OUI:     22 bits (unsigned int)
288  * Model:    6 bits (unsigned char)
289  * Revision: 4 bits (unsigned char)
290  *
291  * This API is deprecated.
292  *
293  * Returns:
294  *   0 on success
295  */
296 int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
297 		 unsigned char *model, unsigned char *rev)
298 {
299 	unsigned int reg = 0;
300 	unsigned short tmp;
301 
302 	if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
303 		debug("PHY ID register 2 read failed\n");
304 		return -1;
305 	}
306 	reg = tmp;
307 
308 	debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
309 
310 	if (reg == 0xFFFF) {
311 		/* No physical device present at this address */
312 		return -1;
313 	}
314 
315 	if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
316 		debug("PHY ID register 1 read failed\n");
317 		return -1;
318 	}
319 	reg |= tmp << 16;
320 	debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
321 
322 	*oui = (reg >> 10);
323 	*model = (unsigned char)((reg >> 4) & 0x0000003F);
324 	*rev = (unsigned char)(reg & 0x0000000F);
325 	return 0;
326 }
327 
328 #ifndef CONFIG_PHYLIB
329 /*****************************************************************************
330  *
331  * Reset the PHY.
332  *
333  * This API is deprecated. Use PHYLIB.
334  *
335  * Returns:
336  *   0 on success
337  */
338 int miiphy_reset(const char *devname, unsigned char addr)
339 {
340 	unsigned short reg;
341 	int timeout = 500;
342 
343 	if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
344 		debug("PHY status read failed\n");
345 		return -1;
346 	}
347 	if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
348 		debug("PHY reset failed\n");
349 		return -1;
350 	}
351 #ifdef CONFIG_PHY_RESET_DELAY
352 	udelay(CONFIG_PHY_RESET_DELAY);	/* Intel LXT971A needs this */
353 #endif
354 	/*
355 	 * Poll the control register for the reset bit to go to 0 (it is
356 	 * auto-clearing).  This should happen within 0.5 seconds per the
357 	 * IEEE spec.
358 	 */
359 	reg = 0x8000;
360 	while (((reg & 0x8000) != 0) && timeout--) {
361 		if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
362 			debug("PHY status read failed\n");
363 			return -1;
364 		}
365 		udelay(1000);
366 	}
367 	if ((reg & 0x8000) == 0) {
368 		return 0;
369 	} else {
370 		puts("PHY reset timed out\n");
371 		return -1;
372 	}
373 	return 0;
374 }
375 #endif /* !PHYLIB */
376 
377 /*****************************************************************************
378  *
379  * Determine the ethernet speed (10/100/1000).  Return 10 on error.
380  */
381 int miiphy_speed(const char *devname, unsigned char addr)
382 {
383 	u16 bmcr, anlpar;
384 
385 #if defined(CONFIG_PHY_GIGE)
386 	u16 btsr;
387 
388 	/*
389 	 * Check for 1000BASE-X.  If it is supported, then assume that the speed
390 	 * is 1000.
391 	 */
392 	if (miiphy_is_1000base_x(devname, addr))
393 		return _1000BASET;
394 
395 	/*
396 	 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
397 	 */
398 	/* Check for 1000BASE-T. */
399 	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
400 		printf("PHY 1000BT status");
401 		goto miiphy_read_failed;
402 	}
403 	if (btsr != 0xFFFF &&
404 			(btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
405 		return _1000BASET;
406 #endif /* CONFIG_PHY_GIGE */
407 
408 	/* Check Basic Management Control Register first. */
409 	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
410 		printf("PHY speed");
411 		goto miiphy_read_failed;
412 	}
413 	/* Check if auto-negotiation is on. */
414 	if (bmcr & BMCR_ANENABLE) {
415 		/* Get auto-negotiation results. */
416 		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
417 			printf("PHY AN speed");
418 			goto miiphy_read_failed;
419 		}
420 		return (anlpar & LPA_100) ? _100BASET : _10BASET;
421 	}
422 	/* Get speed from basic control settings. */
423 	return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
424 
425 miiphy_read_failed:
426 	printf(" read failed, assuming 10BASE-T\n");
427 	return _10BASET;
428 }
429 
430 /*****************************************************************************
431  *
432  * Determine full/half duplex.  Return half on error.
433  */
434 int miiphy_duplex(const char *devname, unsigned char addr)
435 {
436 	u16 bmcr, anlpar;
437 
438 #if defined(CONFIG_PHY_GIGE)
439 	u16 btsr;
440 
441 	/* Check for 1000BASE-X. */
442 	if (miiphy_is_1000base_x(devname, addr)) {
443 		/* 1000BASE-X */
444 		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
445 			printf("1000BASE-X PHY AN duplex");
446 			goto miiphy_read_failed;
447 		}
448 	}
449 	/*
450 	 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
451 	 */
452 	/* Check for 1000BASE-T. */
453 	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
454 		printf("PHY 1000BT status");
455 		goto miiphy_read_failed;
456 	}
457 	if (btsr != 0xFFFF) {
458 		if (btsr & PHY_1000BTSR_1000FD) {
459 			return FULL;
460 		} else if (btsr & PHY_1000BTSR_1000HD) {
461 			return HALF;
462 		}
463 	}
464 #endif /* CONFIG_PHY_GIGE */
465 
466 	/* Check Basic Management Control Register first. */
467 	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
468 		puts("PHY duplex");
469 		goto miiphy_read_failed;
470 	}
471 	/* Check if auto-negotiation is on. */
472 	if (bmcr & BMCR_ANENABLE) {
473 		/* Get auto-negotiation results. */
474 		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
475 			puts("PHY AN duplex");
476 			goto miiphy_read_failed;
477 		}
478 		return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
479 		    FULL : HALF;
480 	}
481 	/* Get speed from basic control settings. */
482 	return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
483 
484 miiphy_read_failed:
485 	printf(" read failed, assuming half duplex\n");
486 	return HALF;
487 }
488 
489 /*****************************************************************************
490  *
491  * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
492  * 1000BASE-T, or on error.
493  */
494 int miiphy_is_1000base_x(const char *devname, unsigned char addr)
495 {
496 #if defined(CONFIG_PHY_GIGE)
497 	u16 exsr;
498 
499 	if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
500 		printf("PHY extended status read failed, assuming no "
501 			"1000BASE-X\n");
502 		return 0;
503 	}
504 	return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
505 #else
506 	return 0;
507 #endif
508 }
509 
510 #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
511 /*****************************************************************************
512  *
513  * Determine link status
514  */
515 int miiphy_link(const char *devname, unsigned char addr)
516 {
517 	unsigned short reg;
518 
519 	/* dummy read; needed to latch some phys */
520 	(void)miiphy_read(devname, addr, MII_BMSR, &reg);
521 	if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
522 		puts("MII_BMSR read failed, assuming no link\n");
523 		return 0;
524 	}
525 
526 	/* Determine if a link is active */
527 	if ((reg & BMSR_LSTATUS) != 0) {
528 		return 1;
529 	} else {
530 		return 0;
531 	}
532 }
533 #endif
534