xref: /openbmc/u-boot/common/miiphyutil.c (revision e2a53458)
1 /*
2  * (C) Copyright 2001
3  * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23 
24 /*
25  * This provides a bit-banged interface to the ethernet MII management
26  * channel.
27  */
28 
29 #include <common.h>
30 #include <miiphy.h>
31 #include <phy.h>
32 
33 #include <asm/types.h>
34 #include <linux/list.h>
35 #include <malloc.h>
36 #include <net.h>
37 
38 /* local debug macro */
39 #undef MII_DEBUG
40 
41 #undef debug
42 #ifdef MII_DEBUG
43 #define debug(fmt, args...)	printf(fmt, ##args)
44 #else
45 #define debug(fmt, args...)
46 #endif /* MII_DEBUG */
47 
48 static struct list_head mii_devs;
49 static struct mii_dev *current_mii;
50 
51 /*
52  * Lookup the mii_dev struct by the registered device name.
53  */
54 struct mii_dev *miiphy_get_dev_by_name(const char *devname)
55 {
56 	struct list_head *entry;
57 	struct mii_dev *dev;
58 
59 	if (!devname) {
60 		printf("NULL device name!\n");
61 		return NULL;
62 	}
63 
64 	list_for_each(entry, &mii_devs) {
65 		dev = list_entry(entry, struct mii_dev, link);
66 		if (strcmp(dev->name, devname) == 0)
67 			return dev;
68 	}
69 
70 	return NULL;
71 }
72 
73 /*****************************************************************************
74  *
75  * Initialize global data. Need to be called before any other miiphy routine.
76  */
77 void miiphy_init(void)
78 {
79 	INIT_LIST_HEAD(&mii_devs);
80 	current_mii = NULL;
81 }
82 
83 static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
84 {
85 	unsigned short val;
86 	int ret;
87 	struct legacy_mii_dev *ldev = bus->priv;
88 
89 	ret = ldev->read(bus->name, addr, reg, &val);
90 
91 	return ret ? -1 : (int)val;
92 }
93 
94 static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
95 				int reg, u16 val)
96 {
97 	struct legacy_mii_dev *ldev = bus->priv;
98 
99 	return ldev->write(bus->name, addr, reg, val);
100 }
101 
102 /*****************************************************************************
103  *
104  * Register read and write MII access routines for the device <name>.
105  */
106 void miiphy_register(const char *name,
107 		      int (*read)(const char *devname, unsigned char addr,
108 				   unsigned char reg, unsigned short *value),
109 		      int (*write)(const char *devname, unsigned char addr,
110 				    unsigned char reg, unsigned short value))
111 {
112 	struct mii_dev *new_dev;
113 	struct legacy_mii_dev *ldev;
114 
115 	BUG_ON(strlen(name) >= MDIO_NAME_LEN);
116 
117 	/* check if we have unique name */
118 	new_dev = miiphy_get_dev_by_name(name);
119 	if (new_dev) {
120 		printf("miiphy_register: non unique device name '%s'\n", name);
121 		return;
122 	}
123 
124 	/* allocate memory */
125 	new_dev = mdio_alloc();
126 	ldev = malloc(sizeof(*ldev));
127 
128 	if (new_dev == NULL || ldev == NULL) {
129 		printf("miiphy_register: cannot allocate memory for '%s'\n",
130 			name);
131 		return;
132 	}
133 
134 	/* initalize mii_dev struct fields */
135 	new_dev->read = legacy_miiphy_read;
136 	new_dev->write = legacy_miiphy_write;
137 	strncpy(new_dev->name, name, MDIO_NAME_LEN);
138 	new_dev->name[MDIO_NAME_LEN - 1] = 0;
139 	ldev->read = read;
140 	ldev->write = write;
141 	new_dev->priv = ldev;
142 
143 	debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
144 	       new_dev->name, ldev->read, ldev->write);
145 
146 	/* add it to the list */
147 	list_add_tail(&new_dev->link, &mii_devs);
148 
149 	if (!current_mii)
150 		current_mii = new_dev;
151 }
152 
153 struct mii_dev *mdio_alloc(void)
154 {
155 	struct mii_dev *bus;
156 
157 	bus = malloc(sizeof(*bus));
158 	if (!bus)
159 		return bus;
160 
161 	memset(bus, 0, sizeof(*bus));
162 
163 	/* initalize mii_dev struct fields */
164 	INIT_LIST_HEAD(&bus->link);
165 
166 	return bus;
167 }
168 
169 int mdio_register(struct mii_dev *bus)
170 {
171 	if (!bus || !bus->name || !bus->read || !bus->write)
172 		return -1;
173 
174 	/* check if we have unique name */
175 	if (miiphy_get_dev_by_name(bus->name)) {
176 		printf("mdio_register: non unique device name '%s'\n",
177 			bus->name);
178 		return -1;
179 	}
180 
181 	/* add it to the list */
182 	list_add_tail(&bus->link, &mii_devs);
183 
184 	if (!current_mii)
185 		current_mii = bus;
186 
187 	return 0;
188 }
189 
190 void mdio_list_devices(void)
191 {
192 	struct list_head *entry;
193 
194 	list_for_each(entry, &mii_devs) {
195 		int i;
196 		struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
197 
198 		printf("%s:\n", bus->name);
199 
200 		for (i = 0; i < PHY_MAX_ADDR; i++) {
201 			struct phy_device *phydev = bus->phymap[i];
202 
203 			if (phydev) {
204 				printf("%d - %s", i, phydev->drv->name);
205 
206 				if (phydev->dev)
207 					printf(" <--> %s\n", phydev->dev->name);
208 				else
209 					printf("\n");
210 			}
211 		}
212 	}
213 }
214 
215 int miiphy_set_current_dev(const char *devname)
216 {
217 	struct mii_dev *dev;
218 
219 	dev = miiphy_get_dev_by_name(devname);
220 	if (dev) {
221 		current_mii = dev;
222 		return 0;
223 	}
224 
225 	printf("No such device: %s\n", devname);
226 
227 	return 1;
228 }
229 
230 struct mii_dev *mdio_get_current_dev(void)
231 {
232 	return current_mii;
233 }
234 
235 struct phy_device *mdio_phydev_for_ethname(const char *ethname)
236 {
237 	struct list_head *entry;
238 	struct mii_dev *bus;
239 
240 	list_for_each(entry, &mii_devs) {
241 		int i;
242 		bus = list_entry(entry, struct mii_dev, link);
243 
244 		for (i = 0; i < PHY_MAX_ADDR; i++) {
245 			if (!bus->phymap[i] || !bus->phymap[i]->dev)
246 				continue;
247 
248 			if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
249 				return bus->phymap[i];
250 		}
251 	}
252 
253 	printf("%s is not a known ethernet\n", ethname);
254 	return NULL;
255 }
256 
257 const char *miiphy_get_current_dev(void)
258 {
259 	if (current_mii)
260 		return current_mii->name;
261 
262 	return NULL;
263 }
264 
265 static struct mii_dev *miiphy_get_active_dev(const char *devname)
266 {
267 	/* If the current mii is the one we want, return it */
268 	if (current_mii)
269 		if (strcmp(current_mii->name, devname) == 0)
270 			return current_mii;
271 
272 	/* Otherwise, set the active one to the one we want */
273 	if (miiphy_set_current_dev(devname))
274 		return NULL;
275 	else
276 		return current_mii;
277 }
278 
279 /*****************************************************************************
280  *
281  * Read to variable <value> from the PHY attached to device <devname>,
282  * use PHY address <addr> and register <reg>.
283  *
284  * Returns:
285  *   0 on success
286  */
287 int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
288 		 unsigned short *value)
289 {
290 	struct mii_dev *bus;
291 	int ret;
292 
293 	bus = miiphy_get_active_dev(devname);
294 	if (!bus)
295 		return 1;
296 
297 	ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
298 	if (ret < 0)
299 		return 1;
300 
301 	*value = (unsigned short)ret;
302 	return 0;
303 }
304 
305 /*****************************************************************************
306  *
307  * Write <value> to the PHY attached to device <devname>,
308  * use PHY address <addr> and register <reg>.
309  *
310  * Returns:
311  *   0 on success
312  */
313 int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
314 		  unsigned short value)
315 {
316 	struct mii_dev *bus;
317 
318 	bus = miiphy_get_active_dev(devname);
319 	if (bus)
320 		return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
321 
322 	return 1;
323 }
324 
325 /*****************************************************************************
326  *
327  * Print out list of registered MII capable devices.
328  */
329 void miiphy_listdev(void)
330 {
331 	struct list_head *entry;
332 	struct mii_dev *dev;
333 
334 	puts("MII devices: ");
335 	list_for_each(entry, &mii_devs) {
336 		dev = list_entry(entry, struct mii_dev, link);
337 		printf("'%s' ", dev->name);
338 	}
339 	puts("\n");
340 
341 	if (current_mii)
342 		printf("Current device: '%s'\n", current_mii->name);
343 }
344 
345 /*****************************************************************************
346  *
347  * Read the OUI, manufacture's model number, and revision number.
348  *
349  * OUI:     22 bits (unsigned int)
350  * Model:    6 bits (unsigned char)
351  * Revision: 4 bits (unsigned char)
352  *
353  * Returns:
354  *   0 on success
355  */
356 int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
357 		 unsigned char *model, unsigned char *rev)
358 {
359 	unsigned int reg = 0;
360 	unsigned short tmp;
361 
362 	if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
363 		debug("PHY ID register 2 read failed\n");
364 		return -1;
365 	}
366 	reg = tmp;
367 
368 	debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
369 
370 	if (reg == 0xFFFF) {
371 		/* No physical device present at this address */
372 		return -1;
373 	}
374 
375 	if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
376 		debug("PHY ID register 1 read failed\n");
377 		return -1;
378 	}
379 	reg |= tmp << 16;
380 	debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
381 
382 	*oui = (reg >> 10);
383 	*model = (unsigned char)((reg >> 4) & 0x0000003F);
384 	*rev = (unsigned char)(reg & 0x0000000F);
385 	return 0;
386 }
387 
388 #ifndef CONFIG_PHYLIB
389 /*****************************************************************************
390  *
391  * Reset the PHY.
392  * Returns:
393  *   0 on success
394  */
395 int miiphy_reset(const char *devname, unsigned char addr)
396 {
397 	unsigned short reg;
398 	int timeout = 500;
399 
400 	if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
401 		debug("PHY status read failed\n");
402 		return -1;
403 	}
404 	if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
405 		debug("PHY reset failed\n");
406 		return -1;
407 	}
408 #ifdef CONFIG_PHY_RESET_DELAY
409 	udelay(CONFIG_PHY_RESET_DELAY);	/* Intel LXT971A needs this */
410 #endif
411 	/*
412 	 * Poll the control register for the reset bit to go to 0 (it is
413 	 * auto-clearing).  This should happen within 0.5 seconds per the
414 	 * IEEE spec.
415 	 */
416 	reg = 0x8000;
417 	while (((reg & 0x8000) != 0) && timeout--) {
418 		if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
419 			debug("PHY status read failed\n");
420 			return -1;
421 		}
422 		udelay(1000);
423 	}
424 	if ((reg & 0x8000) == 0) {
425 		return 0;
426 	} else {
427 		puts("PHY reset timed out\n");
428 		return -1;
429 	}
430 	return 0;
431 }
432 #endif /* !PHYLIB */
433 
434 /*****************************************************************************
435  *
436  * Determine the ethernet speed (10/100/1000).  Return 10 on error.
437  */
438 int miiphy_speed(const char *devname, unsigned char addr)
439 {
440 	u16 bmcr, anlpar;
441 
442 #if defined(CONFIG_PHY_GIGE)
443 	u16 btsr;
444 
445 	/*
446 	 * Check for 1000BASE-X.  If it is supported, then assume that the speed
447 	 * is 1000.
448 	 */
449 	if (miiphy_is_1000base_x(devname, addr))
450 		return _1000BASET;
451 
452 	/*
453 	 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
454 	 */
455 	/* Check for 1000BASE-T. */
456 	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
457 		printf("PHY 1000BT status");
458 		goto miiphy_read_failed;
459 	}
460 	if (btsr != 0xFFFF &&
461 			(btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
462 		return _1000BASET;
463 #endif /* CONFIG_PHY_GIGE */
464 
465 	/* Check Basic Management Control Register first. */
466 	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
467 		printf("PHY speed");
468 		goto miiphy_read_failed;
469 	}
470 	/* Check if auto-negotiation is on. */
471 	if (bmcr & BMCR_ANENABLE) {
472 		/* Get auto-negotiation results. */
473 		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
474 			printf("PHY AN speed");
475 			goto miiphy_read_failed;
476 		}
477 		return (anlpar & LPA_100) ? _100BASET : _10BASET;
478 	}
479 	/* Get speed from basic control settings. */
480 	return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
481 
482 miiphy_read_failed:
483 	printf(" read failed, assuming 10BASE-T\n");
484 	return _10BASET;
485 }
486 
487 /*****************************************************************************
488  *
489  * Determine full/half duplex.  Return half on error.
490  */
491 int miiphy_duplex(const char *devname, unsigned char addr)
492 {
493 	u16 bmcr, anlpar;
494 
495 #if defined(CONFIG_PHY_GIGE)
496 	u16 btsr;
497 
498 	/* Check for 1000BASE-X. */
499 	if (miiphy_is_1000base_x(devname, addr)) {
500 		/* 1000BASE-X */
501 		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
502 			printf("1000BASE-X PHY AN duplex");
503 			goto miiphy_read_failed;
504 		}
505 	}
506 	/*
507 	 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
508 	 */
509 	/* Check for 1000BASE-T. */
510 	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
511 		printf("PHY 1000BT status");
512 		goto miiphy_read_failed;
513 	}
514 	if (btsr != 0xFFFF) {
515 		if (btsr & PHY_1000BTSR_1000FD) {
516 			return FULL;
517 		} else if (btsr & PHY_1000BTSR_1000HD) {
518 			return HALF;
519 		}
520 	}
521 #endif /* CONFIG_PHY_GIGE */
522 
523 	/* Check Basic Management Control Register first. */
524 	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
525 		puts("PHY duplex");
526 		goto miiphy_read_failed;
527 	}
528 	/* Check if auto-negotiation is on. */
529 	if (bmcr & BMCR_ANENABLE) {
530 		/* Get auto-negotiation results. */
531 		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
532 			puts("PHY AN duplex");
533 			goto miiphy_read_failed;
534 		}
535 		return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
536 		    FULL : HALF;
537 	}
538 	/* Get speed from basic control settings. */
539 	return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
540 
541 miiphy_read_failed:
542 	printf(" read failed, assuming half duplex\n");
543 	return HALF;
544 }
545 
546 /*****************************************************************************
547  *
548  * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
549  * 1000BASE-T, or on error.
550  */
551 int miiphy_is_1000base_x(const char *devname, unsigned char addr)
552 {
553 #if defined(CONFIG_PHY_GIGE)
554 	u16 exsr;
555 
556 	if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
557 		printf("PHY extended status read failed, assuming no "
558 			"1000BASE-X\n");
559 		return 0;
560 	}
561 	return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
562 #else
563 	return 0;
564 #endif
565 }
566 
567 #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
568 /*****************************************************************************
569  *
570  * Determine link status
571  */
572 int miiphy_link(const char *devname, unsigned char addr)
573 {
574 	unsigned short reg;
575 
576 	/* dummy read; needed to latch some phys */
577 	(void)miiphy_read(devname, addr, MII_BMSR, &reg);
578 	if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
579 		puts("MII_BMSR read failed, assuming no link\n");
580 		return 0;
581 	}
582 
583 	/* Determine if a link is active */
584 	if ((reg & BMSR_LSTATUS) != 0) {
585 		return 1;
586 	} else {
587 		return 0;
588 	}
589 }
590 #endif
591