1 /* 2 * (C) Copyright 2001 3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 /* 25 * This provides a bit-banged interface to the ethernet MII management 26 * channel. 27 */ 28 29 #include <common.h> 30 #include <miiphy.h> 31 #include <phy.h> 32 33 #include <asm/types.h> 34 #include <linux/list.h> 35 #include <malloc.h> 36 #include <net.h> 37 38 /* local debug macro */ 39 #undef MII_DEBUG 40 41 #undef debug 42 #ifdef MII_DEBUG 43 #define debug(fmt, args...) printf(fmt, ##args) 44 #else 45 #define debug(fmt, args...) 46 #endif /* MII_DEBUG */ 47 48 static struct list_head mii_devs; 49 static struct mii_dev *current_mii; 50 51 /* 52 * Lookup the mii_dev struct by the registered device name. 53 */ 54 struct mii_dev *miiphy_get_dev_by_name(const char *devname) 55 { 56 struct list_head *entry; 57 struct mii_dev *dev; 58 59 if (!devname) { 60 printf("NULL device name!\n"); 61 return NULL; 62 } 63 64 list_for_each(entry, &mii_devs) { 65 dev = list_entry(entry, struct mii_dev, link); 66 if (strcmp(dev->name, devname) == 0) 67 return dev; 68 } 69 70 return NULL; 71 } 72 73 /***************************************************************************** 74 * 75 * Initialize global data. Need to be called before any other miiphy routine. 76 */ 77 void miiphy_init(void) 78 { 79 INIT_LIST_HEAD(&mii_devs); 80 current_mii = NULL; 81 } 82 83 static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg) 84 { 85 unsigned short val; 86 int ret; 87 struct legacy_mii_dev *ldev = bus->priv; 88 89 ret = ldev->read(bus->name, addr, reg, &val); 90 91 return ret ? -1 : (int)val; 92 } 93 94 static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad, 95 int reg, u16 val) 96 { 97 struct legacy_mii_dev *ldev = bus->priv; 98 99 return ldev->write(bus->name, addr, reg, val); 100 } 101 102 /***************************************************************************** 103 * 104 * Register read and write MII access routines for the device <name>. 105 */ 106 void miiphy_register(const char *name, 107 int (*read)(const char *devname, unsigned char addr, 108 unsigned char reg, unsigned short *value), 109 int (*write)(const char *devname, unsigned char addr, 110 unsigned char reg, unsigned short value)) 111 { 112 struct mii_dev *new_dev; 113 struct legacy_mii_dev *ldev; 114 unsigned int name_len; 115 116 /* check if we have unique name */ 117 new_dev = miiphy_get_dev_by_name(name); 118 if (new_dev) { 119 printf("miiphy_register: non unique device name '%s'\n", name); 120 return; 121 } 122 123 /* allocate memory */ 124 name_len = strlen(name); 125 if (name_len > MDIO_NAME_LEN - 1) { 126 /* Hopefully this won't happen, but if it does, we'll know */ 127 printf("miiphy_register: MDIO name was longer than %d\n", 128 MDIO_NAME_LEN); 129 return; 130 } 131 132 new_dev = mdio_alloc(); 133 ldev = malloc(sizeof(*ldev)); 134 135 if (new_dev == NULL || ldev == NULL) { 136 printf("miiphy_register: cannot allocate memory for '%s'\n", 137 name); 138 return; 139 } 140 141 /* initalize mii_dev struct fields */ 142 new_dev->read = legacy_miiphy_read; 143 new_dev->write = legacy_miiphy_write; 144 sprintf(new_dev->name, name); 145 ldev->read = read; 146 ldev->write = write; 147 new_dev->priv = ldev; 148 149 debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n", 150 new_dev->name, ldev->read, ldev->write); 151 152 /* add it to the list */ 153 list_add_tail(&new_dev->link, &mii_devs); 154 155 if (!current_mii) 156 current_mii = new_dev; 157 } 158 159 struct mii_dev *mdio_alloc(void) 160 { 161 struct mii_dev *bus; 162 163 bus = malloc(sizeof(*bus)); 164 if (!bus) 165 return bus; 166 167 memset(bus, 0, sizeof(*bus)); 168 169 /* initalize mii_dev struct fields */ 170 INIT_LIST_HEAD(&bus->link); 171 172 return bus; 173 } 174 175 int mdio_register(struct mii_dev *bus) 176 { 177 if (!bus || !bus->name || !bus->read || !bus->write) 178 return -1; 179 180 /* check if we have unique name */ 181 if (miiphy_get_dev_by_name(bus->name)) { 182 printf("mdio_register: non unique device name '%s'\n", 183 bus->name); 184 return -1; 185 } 186 187 /* add it to the list */ 188 list_add_tail(&bus->link, &mii_devs); 189 190 if (!current_mii) 191 current_mii = bus; 192 193 return 0; 194 } 195 196 void mdio_list_devices(void) 197 { 198 struct list_head *entry; 199 200 list_for_each(entry, &mii_devs) { 201 int i; 202 struct mii_dev *bus = list_entry(entry, struct mii_dev, link); 203 204 printf("%s:\n", bus->name); 205 206 for (i = 0; i < PHY_MAX_ADDR; i++) { 207 struct phy_device *phydev = bus->phymap[i]; 208 209 if (phydev) { 210 printf("%d - %s", i, phydev->drv->name); 211 212 if (phydev->dev) 213 printf(" <--> %s\n", phydev->dev->name); 214 else 215 printf("\n"); 216 } 217 } 218 } 219 } 220 221 int miiphy_set_current_dev(const char *devname) 222 { 223 struct mii_dev *dev; 224 225 dev = miiphy_get_dev_by_name(devname); 226 if (dev) { 227 current_mii = dev; 228 return 0; 229 } 230 231 printf("No such device: %s\n", devname); 232 233 return 1; 234 } 235 236 struct mii_dev *mdio_get_current_dev(void) 237 { 238 return current_mii; 239 } 240 241 struct phy_device *mdio_phydev_for_ethname(const char *ethname) 242 { 243 struct list_head *entry; 244 struct mii_dev *bus; 245 246 list_for_each(entry, &mii_devs) { 247 int i; 248 bus = list_entry(entry, struct mii_dev, link); 249 250 for (i = 0; i < PHY_MAX_ADDR; i++) { 251 if (!bus->phymap[i] || !bus->phymap[i]->dev) 252 continue; 253 254 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0) 255 return bus->phymap[i]; 256 } 257 } 258 259 printf("%s is not a known ethernet\n", ethname); 260 return NULL; 261 } 262 263 const char *miiphy_get_current_dev(void) 264 { 265 if (current_mii) 266 return current_mii->name; 267 268 return NULL; 269 } 270 271 static struct mii_dev *miiphy_get_active_dev(const char *devname) 272 { 273 /* If the current mii is the one we want, return it */ 274 if (current_mii) 275 if (strcmp(current_mii->name, devname) == 0) 276 return current_mii; 277 278 /* Otherwise, set the active one to the one we want */ 279 if (miiphy_set_current_dev(devname)) 280 return NULL; 281 else 282 return current_mii; 283 } 284 285 /***************************************************************************** 286 * 287 * Read to variable <value> from the PHY attached to device <devname>, 288 * use PHY address <addr> and register <reg>. 289 * 290 * Returns: 291 * 0 on success 292 */ 293 int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, 294 unsigned short *value) 295 { 296 struct mii_dev *bus; 297 int ret; 298 299 bus = miiphy_get_active_dev(devname); 300 if (!bus) 301 return 1; 302 303 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg); 304 if (ret < 0) 305 return 1; 306 307 *value = (unsigned short)ret; 308 return 0; 309 } 310 311 /***************************************************************************** 312 * 313 * Write <value> to the PHY attached to device <devname>, 314 * use PHY address <addr> and register <reg>. 315 * 316 * Returns: 317 * 0 on success 318 */ 319 int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, 320 unsigned short value) 321 { 322 struct mii_dev *bus; 323 324 bus = miiphy_get_active_dev(devname); 325 if (bus) 326 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value); 327 328 return 1; 329 } 330 331 /***************************************************************************** 332 * 333 * Print out list of registered MII capable devices. 334 */ 335 void miiphy_listdev(void) 336 { 337 struct list_head *entry; 338 struct mii_dev *dev; 339 340 puts("MII devices: "); 341 list_for_each(entry, &mii_devs) { 342 dev = list_entry(entry, struct mii_dev, link); 343 printf("'%s' ", dev->name); 344 } 345 puts("\n"); 346 347 if (current_mii) 348 printf("Current device: '%s'\n", current_mii->name); 349 } 350 351 /***************************************************************************** 352 * 353 * Read the OUI, manufacture's model number, and revision number. 354 * 355 * OUI: 22 bits (unsigned int) 356 * Model: 6 bits (unsigned char) 357 * Revision: 4 bits (unsigned char) 358 * 359 * Returns: 360 * 0 on success 361 */ 362 int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, 363 unsigned char *model, unsigned char *rev) 364 { 365 unsigned int reg = 0; 366 unsigned short tmp; 367 368 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) { 369 debug("PHY ID register 2 read failed\n"); 370 return -1; 371 } 372 reg = tmp; 373 374 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg); 375 376 if (reg == 0xFFFF) { 377 /* No physical device present at this address */ 378 return -1; 379 } 380 381 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) { 382 debug("PHY ID register 1 read failed\n"); 383 return -1; 384 } 385 reg |= tmp << 16; 386 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); 387 388 *oui = (reg >> 10); 389 *model = (unsigned char)((reg >> 4) & 0x0000003F); 390 *rev = (unsigned char)(reg & 0x0000000F); 391 return 0; 392 } 393 394 #ifndef CONFIG_PHYLIB 395 /***************************************************************************** 396 * 397 * Reset the PHY. 398 * Returns: 399 * 0 on success 400 */ 401 int miiphy_reset(const char *devname, unsigned char addr) 402 { 403 unsigned short reg; 404 int timeout = 500; 405 406 if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { 407 debug("PHY status read failed\n"); 408 return -1; 409 } 410 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) { 411 debug("PHY reset failed\n"); 412 return -1; 413 } 414 #ifdef CONFIG_PHY_RESET_DELAY 415 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ 416 #endif 417 /* 418 * Poll the control register for the reset bit to go to 0 (it is 419 * auto-clearing). This should happen within 0.5 seconds per the 420 * IEEE spec. 421 */ 422 reg = 0x8000; 423 while (((reg & 0x8000) != 0) && timeout--) { 424 if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { 425 debug("PHY status read failed\n"); 426 return -1; 427 } 428 udelay(1000); 429 } 430 if ((reg & 0x8000) == 0) { 431 return 0; 432 } else { 433 puts("PHY reset timed out\n"); 434 return -1; 435 } 436 return 0; 437 } 438 #endif /* !PHYLIB */ 439 440 /***************************************************************************** 441 * 442 * Determine the ethernet speed (10/100/1000). Return 10 on error. 443 */ 444 int miiphy_speed(const char *devname, unsigned char addr) 445 { 446 u16 bmcr, anlpar; 447 448 #if defined(CONFIG_PHY_GIGE) 449 u16 btsr; 450 451 /* 452 * Check for 1000BASE-X. If it is supported, then assume that the speed 453 * is 1000. 454 */ 455 if (miiphy_is_1000base_x(devname, addr)) 456 return _1000BASET; 457 458 /* 459 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. 460 */ 461 /* Check for 1000BASE-T. */ 462 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { 463 printf("PHY 1000BT status"); 464 goto miiphy_read_failed; 465 } 466 if (btsr != 0xFFFF && 467 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) 468 return _1000BASET; 469 #endif /* CONFIG_PHY_GIGE */ 470 471 /* Check Basic Management Control Register first. */ 472 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { 473 printf("PHY speed"); 474 goto miiphy_read_failed; 475 } 476 /* Check if auto-negotiation is on. */ 477 if (bmcr & BMCR_ANENABLE) { 478 /* Get auto-negotiation results. */ 479 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { 480 printf("PHY AN speed"); 481 goto miiphy_read_failed; 482 } 483 return (anlpar & LPA_100) ? _100BASET : _10BASET; 484 } 485 /* Get speed from basic control settings. */ 486 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET; 487 488 miiphy_read_failed: 489 printf(" read failed, assuming 10BASE-T\n"); 490 return _10BASET; 491 } 492 493 /***************************************************************************** 494 * 495 * Determine full/half duplex. Return half on error. 496 */ 497 int miiphy_duplex(const char *devname, unsigned char addr) 498 { 499 u16 bmcr, anlpar; 500 501 #if defined(CONFIG_PHY_GIGE) 502 u16 btsr; 503 504 /* Check for 1000BASE-X. */ 505 if (miiphy_is_1000base_x(devname, addr)) { 506 /* 1000BASE-X */ 507 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { 508 printf("1000BASE-X PHY AN duplex"); 509 goto miiphy_read_failed; 510 } 511 } 512 /* 513 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. 514 */ 515 /* Check for 1000BASE-T. */ 516 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { 517 printf("PHY 1000BT status"); 518 goto miiphy_read_failed; 519 } 520 if (btsr != 0xFFFF) { 521 if (btsr & PHY_1000BTSR_1000FD) { 522 return FULL; 523 } else if (btsr & PHY_1000BTSR_1000HD) { 524 return HALF; 525 } 526 } 527 #endif /* CONFIG_PHY_GIGE */ 528 529 /* Check Basic Management Control Register first. */ 530 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { 531 puts("PHY duplex"); 532 goto miiphy_read_failed; 533 } 534 /* Check if auto-negotiation is on. */ 535 if (bmcr & BMCR_ANENABLE) { 536 /* Get auto-negotiation results. */ 537 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { 538 puts("PHY AN duplex"); 539 goto miiphy_read_failed; 540 } 541 return (anlpar & (LPA_10FULL | LPA_100FULL)) ? 542 FULL : HALF; 543 } 544 /* Get speed from basic control settings. */ 545 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF; 546 547 miiphy_read_failed: 548 printf(" read failed, assuming half duplex\n"); 549 return HALF; 550 } 551 552 /***************************************************************************** 553 * 554 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/ 555 * 1000BASE-T, or on error. 556 */ 557 int miiphy_is_1000base_x(const char *devname, unsigned char addr) 558 { 559 #if defined(CONFIG_PHY_GIGE) 560 u16 exsr; 561 562 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) { 563 printf("PHY extended status read failed, assuming no " 564 "1000BASE-X\n"); 565 return 0; 566 } 567 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH)); 568 #else 569 return 0; 570 #endif 571 } 572 573 #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 574 /***************************************************************************** 575 * 576 * Determine link status 577 */ 578 int miiphy_link(const char *devname, unsigned char addr) 579 { 580 unsigned short reg; 581 582 /* dummy read; needed to latch some phys */ 583 (void)miiphy_read(devname, addr, MII_BMSR, ®); 584 if (miiphy_read(devname, addr, MII_BMSR, ®)) { 585 puts("MII_BMSR read failed, assuming no link\n"); 586 return 0; 587 } 588 589 /* Determine if a link is active */ 590 if ((reg & BMSR_LSTATUS) != 0) { 591 return 1; 592 } else { 593 return 0; 594 } 595 } 596 #endif 597