1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <console.h> 15 #include <environment.h> 16 #include <dm.h> 17 #include <fdtdec.h> 18 #include <fs.h> 19 #include <i2c.h> 20 #include <initcall.h> 21 #include <init_helpers.h> 22 #include <logbuff.h> 23 #include <malloc.h> 24 #include <mapmem.h> 25 #include <os.h> 26 #include <post.h> 27 #include <relocate.h> 28 #include <spi.h> 29 #include <status_led.h> 30 #include <timer.h> 31 #include <trace.h> 32 #include <video.h> 33 #include <watchdog.h> 34 #if defined(CONFIG_MP) && defined(CONFIG_PPC) 35 #include <asm/mp.h> 36 #endif 37 #include <asm/io.h> 38 #include <asm/sections.h> 39 #include <dm/root.h> 40 #include <linux/errno.h> 41 42 /* 43 * Pointer to initial global data area 44 * 45 * Here we initialize it if needed. 46 */ 47 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 48 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 49 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 50 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 51 #else 52 DECLARE_GLOBAL_DATA_PTR; 53 #endif 54 55 /* 56 * TODO(sjg@chromium.org): IMO this code should be 57 * refactored to a single function, something like: 58 * 59 * void led_set_state(enum led_colour_t colour, int on); 60 */ 61 /************************************************************************ 62 * Coloured LED functionality 63 ************************************************************************ 64 * May be supplied by boards if desired 65 */ 66 __weak void coloured_LED_init(void) {} 67 __weak void red_led_on(void) {} 68 __weak void red_led_off(void) {} 69 __weak void green_led_on(void) {} 70 __weak void green_led_off(void) {} 71 __weak void yellow_led_on(void) {} 72 __weak void yellow_led_off(void) {} 73 __weak void blue_led_on(void) {} 74 __weak void blue_led_off(void) {} 75 76 /* 77 * Why is gd allocated a register? Prior to reloc it might be better to 78 * just pass it around to each function in this file? 79 * 80 * After reloc one could argue that it is hardly used and doesn't need 81 * to be in a register. Or if it is it should perhaps hold pointers to all 82 * global data for all modules, so that post-reloc we can avoid the massive 83 * literal pool we get on ARM. Or perhaps just encourage each module to use 84 * a structure... 85 */ 86 87 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 88 static int init_func_watchdog_init(void) 89 { 90 # if defined(CONFIG_HW_WATCHDOG) && \ 91 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 92 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 93 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 94 defined(CONFIG_IMX_WATCHDOG)) 95 hw_watchdog_init(); 96 puts(" Watchdog enabled\n"); 97 # endif 98 WATCHDOG_RESET(); 99 100 return 0; 101 } 102 103 int init_func_watchdog_reset(void) 104 { 105 WATCHDOG_RESET(); 106 107 return 0; 108 } 109 #endif /* CONFIG_WATCHDOG */ 110 111 __weak void board_add_ram_info(int use_default) 112 { 113 /* please define platform specific board_add_ram_info() */ 114 } 115 116 static int init_baud_rate(void) 117 { 118 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 119 return 0; 120 } 121 122 static int display_text_info(void) 123 { 124 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 125 ulong bss_start, bss_end, text_base; 126 127 bss_start = (ulong)&__bss_start; 128 bss_end = (ulong)&__bss_end; 129 130 #ifdef CONFIG_SYS_TEXT_BASE 131 text_base = CONFIG_SYS_TEXT_BASE; 132 #else 133 text_base = CONFIG_SYS_MONITOR_BASE; 134 #endif 135 136 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 137 text_base, bss_start, bss_end); 138 #endif 139 140 return 0; 141 } 142 143 static int announce_dram_init(void) 144 { 145 puts("DRAM: "); 146 return 0; 147 } 148 149 static int show_dram_config(void) 150 { 151 unsigned long long size; 152 153 #ifdef CONFIG_NR_DRAM_BANKS 154 int i; 155 156 debug("\nRAM Configuration:\n"); 157 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 158 size += gd->bd->bi_dram[i].size; 159 debug("Bank #%d: %llx ", i, 160 (unsigned long long)(gd->bd->bi_dram[i].start)); 161 #ifdef DEBUG 162 print_size(gd->bd->bi_dram[i].size, "\n"); 163 #endif 164 } 165 debug("\nDRAM: "); 166 #else 167 size = gd->ram_size; 168 #endif 169 170 print_size(size, ""); 171 board_add_ram_info(0); 172 putc('\n'); 173 174 return 0; 175 } 176 177 __weak int dram_init_banksize(void) 178 { 179 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 180 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 181 gd->bd->bi_dram[0].size = get_effective_memsize(); 182 #endif 183 184 return 0; 185 } 186 187 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 188 static int init_func_i2c(void) 189 { 190 puts("I2C: "); 191 #ifdef CONFIG_SYS_I2C 192 i2c_init_all(); 193 #else 194 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 195 #endif 196 puts("ready\n"); 197 return 0; 198 } 199 #endif 200 201 #if defined(CONFIG_HARD_SPI) 202 static int init_func_spi(void) 203 { 204 puts("SPI: "); 205 spi_init(); 206 puts("ready\n"); 207 return 0; 208 } 209 #endif 210 211 __maybe_unused 212 static int zero_global_data(void) 213 { 214 memset((void *)gd, '\0', sizeof(gd_t)); 215 216 return 0; 217 } 218 219 static int setup_mon_len(void) 220 { 221 #if defined(__ARM__) || defined(__MICROBLAZE__) 222 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 223 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 224 gd->mon_len = (ulong)&_end - (ulong)_init; 225 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 226 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 227 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 228 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 229 #elif defined(CONFIG_SYS_MONITOR_BASE) 230 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 231 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 232 #endif 233 return 0; 234 } 235 236 __weak int arch_cpu_init(void) 237 { 238 return 0; 239 } 240 241 __weak int mach_cpu_init(void) 242 { 243 return 0; 244 } 245 246 /* Get the top of usable RAM */ 247 __weak ulong board_get_usable_ram_top(ulong total_size) 248 { 249 #ifdef CONFIG_SYS_SDRAM_BASE 250 /* 251 * Detect whether we have so much RAM that it goes past the end of our 252 * 32-bit address space. If so, clip the usable RAM so it doesn't. 253 */ 254 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 255 /* 256 * Will wrap back to top of 32-bit space when reservations 257 * are made. 258 */ 259 return 0; 260 #endif 261 return gd->ram_top; 262 } 263 264 static int setup_dest_addr(void) 265 { 266 debug("Monitor len: %08lX\n", gd->mon_len); 267 /* 268 * Ram is setup, size stored in gd !! 269 */ 270 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 271 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 272 /* 273 * Subtract specified amount of memory to hide so that it won't 274 * get "touched" at all by U-Boot. By fixing up gd->ram_size 275 * the Linux kernel should now get passed the now "corrected" 276 * memory size and won't touch it either. This should work 277 * for arch/ppc and arch/powerpc. Only Linux board ports in 278 * arch/powerpc with bootwrapper support, that recalculate the 279 * memory size from the SDRAM controller setup will have to 280 * get fixed. 281 */ 282 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 283 #endif 284 #ifdef CONFIG_SYS_SDRAM_BASE 285 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 286 #endif 287 gd->ram_top += get_effective_memsize(); 288 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 289 gd->relocaddr = gd->ram_top; 290 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 291 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 292 /* 293 * We need to make sure the location we intend to put secondary core 294 * boot code is reserved and not used by any part of u-boot 295 */ 296 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 297 gd->relocaddr = determine_mp_bootpg(NULL); 298 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 299 } 300 #endif 301 return 0; 302 } 303 304 #if defined(CONFIG_LOGBUFFER) 305 static int reserve_logbuffer(void) 306 { 307 #ifndef CONFIG_ALT_LB_ADDR 308 /* reserve kernel log buffer */ 309 gd->relocaddr -= LOGBUFF_RESERVE; 310 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 311 gd->relocaddr); 312 #endif 313 314 return 0; 315 } 316 #endif 317 318 #ifdef CONFIG_PRAM 319 /* reserve protected RAM */ 320 static int reserve_pram(void) 321 { 322 ulong reg; 323 324 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 325 gd->relocaddr -= (reg << 10); /* size is in kB */ 326 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 327 gd->relocaddr); 328 return 0; 329 } 330 #endif /* CONFIG_PRAM */ 331 332 /* Round memory pointer down to next 4 kB limit */ 333 static int reserve_round_4k(void) 334 { 335 gd->relocaddr &= ~(4096 - 1); 336 return 0; 337 } 338 339 #ifdef CONFIG_ARM 340 static int reserve_mmu(void) 341 { 342 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 343 /* reserve TLB table */ 344 gd->arch.tlb_size = PGTABLE_SIZE; 345 gd->relocaddr -= gd->arch.tlb_size; 346 347 /* round down to next 64 kB limit */ 348 gd->relocaddr &= ~(0x10000 - 1); 349 350 gd->arch.tlb_addr = gd->relocaddr; 351 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 352 gd->arch.tlb_addr + gd->arch.tlb_size); 353 354 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 355 /* 356 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 357 * with location within secure ram. 358 */ 359 gd->arch.tlb_allocated = gd->arch.tlb_addr; 360 #endif 361 #endif 362 363 return 0; 364 } 365 #endif 366 367 static int reserve_video(void) 368 { 369 #ifdef CONFIG_DM_VIDEO 370 ulong addr; 371 int ret; 372 373 addr = gd->relocaddr; 374 ret = video_reserve(&addr); 375 if (ret) 376 return ret; 377 gd->relocaddr = addr; 378 #elif defined(CONFIG_LCD) 379 # ifdef CONFIG_FB_ADDR 380 gd->fb_base = CONFIG_FB_ADDR; 381 # else 382 /* reserve memory for LCD display (always full pages) */ 383 gd->relocaddr = lcd_setmem(gd->relocaddr); 384 gd->fb_base = gd->relocaddr; 385 # endif /* CONFIG_FB_ADDR */ 386 #elif defined(CONFIG_VIDEO) && \ 387 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 388 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 389 !defined(CONFIG_M68K) 390 /* reserve memory for video display (always full pages) */ 391 gd->relocaddr = video_setmem(gd->relocaddr); 392 gd->fb_base = gd->relocaddr; 393 #endif 394 395 return 0; 396 } 397 398 static int reserve_trace(void) 399 { 400 #ifdef CONFIG_TRACE 401 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 402 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 403 debug("Reserving %dk for trace data at: %08lx\n", 404 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 405 #endif 406 407 return 0; 408 } 409 410 static int reserve_uboot(void) 411 { 412 /* 413 * reserve memory for U-Boot code, data & bss 414 * round down to next 4 kB limit 415 */ 416 gd->relocaddr -= gd->mon_len; 417 gd->relocaddr &= ~(4096 - 1); 418 #ifdef CONFIG_E500 419 /* round down to next 64 kB limit so that IVPR stays aligned */ 420 gd->relocaddr &= ~(65536 - 1); 421 #endif 422 423 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 424 gd->relocaddr); 425 426 gd->start_addr_sp = gd->relocaddr; 427 428 return 0; 429 } 430 431 /* reserve memory for malloc() area */ 432 static int reserve_malloc(void) 433 { 434 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 435 debug("Reserving %dk for malloc() at: %08lx\n", 436 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 437 return 0; 438 } 439 440 /* (permanently) allocate a Board Info struct */ 441 static int reserve_board(void) 442 { 443 if (!gd->bd) { 444 gd->start_addr_sp -= sizeof(bd_t); 445 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 446 memset(gd->bd, '\0', sizeof(bd_t)); 447 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 448 sizeof(bd_t), gd->start_addr_sp); 449 } 450 return 0; 451 } 452 453 static int setup_machine(void) 454 { 455 #ifdef CONFIG_MACH_TYPE 456 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 457 #endif 458 return 0; 459 } 460 461 static int reserve_global_data(void) 462 { 463 gd->start_addr_sp -= sizeof(gd_t); 464 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 465 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 466 sizeof(gd_t), gd->start_addr_sp); 467 return 0; 468 } 469 470 static int reserve_fdt(void) 471 { 472 #ifndef CONFIG_OF_EMBED 473 /* 474 * If the device tree is sitting immediately above our image then we 475 * must relocate it. If it is embedded in the data section, then it 476 * will be relocated with other data. 477 */ 478 if (gd->fdt_blob) { 479 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 480 481 gd->start_addr_sp -= gd->fdt_size; 482 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 483 debug("Reserving %lu Bytes for FDT at: %08lx\n", 484 gd->fdt_size, gd->start_addr_sp); 485 } 486 #endif 487 488 return 0; 489 } 490 491 int arch_reserve_stacks(void) 492 { 493 return 0; 494 } 495 496 static int reserve_stacks(void) 497 { 498 /* make stack pointer 16-byte aligned */ 499 gd->start_addr_sp -= 16; 500 gd->start_addr_sp &= ~0xf; 501 502 /* 503 * let the architecture-specific code tailor gd->start_addr_sp and 504 * gd->irq_sp 505 */ 506 return arch_reserve_stacks(); 507 } 508 509 static int display_new_sp(void) 510 { 511 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 512 513 return 0; 514 } 515 516 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 517 defined(CONFIG_SH) 518 static int setup_board_part1(void) 519 { 520 bd_t *bd = gd->bd; 521 522 /* 523 * Save local variables to board info struct 524 */ 525 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 526 bd->bi_memsize = gd->ram_size; /* size in bytes */ 527 528 #ifdef CONFIG_SYS_SRAM_BASE 529 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 530 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 531 #endif 532 533 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 534 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 535 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 536 #endif 537 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 538 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 539 #endif 540 #if defined(CONFIG_MPC83xx) 541 bd->bi_immrbar = CONFIG_SYS_IMMR; 542 #endif 543 544 return 0; 545 } 546 #endif 547 548 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 549 static int setup_board_part2(void) 550 { 551 bd_t *bd = gd->bd; 552 553 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 554 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 555 #if defined(CONFIG_CPM2) 556 bd->bi_cpmfreq = gd->arch.cpm_clk; 557 bd->bi_brgfreq = gd->arch.brg_clk; 558 bd->bi_sccfreq = gd->arch.scc_clk; 559 bd->bi_vco = gd->arch.vco_out; 560 #endif /* CONFIG_CPM2 */ 561 #if defined(CONFIG_MPC512X) 562 bd->bi_ipsfreq = gd->arch.ips_clk; 563 #endif /* CONFIG_MPC512X */ 564 #if defined(CONFIG_MPC5xxx) 565 bd->bi_ipbfreq = gd->arch.ipb_clk; 566 bd->bi_pcifreq = gd->pci_clk; 567 #endif /* CONFIG_MPC5xxx */ 568 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 569 bd->bi_pcifreq = gd->pci_clk; 570 #endif 571 #if defined(CONFIG_EXTRA_CLOCK) 572 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 573 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 574 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 575 #endif 576 577 return 0; 578 } 579 #endif 580 581 #ifdef CONFIG_POST 582 static int init_post(void) 583 { 584 post_bootmode_init(); 585 post_run(NULL, POST_ROM | post_bootmode_get(0)); 586 587 return 0; 588 } 589 #endif 590 591 static int reloc_fdt(void) 592 { 593 #ifndef CONFIG_OF_EMBED 594 if (gd->flags & GD_FLG_SKIP_RELOC) 595 return 0; 596 if (gd->new_fdt) { 597 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 598 gd->fdt_blob = gd->new_fdt; 599 } 600 #endif 601 602 return 0; 603 } 604 605 static int setup_reloc(void) 606 { 607 if (gd->flags & GD_FLG_SKIP_RELOC) { 608 debug("Skipping relocation due to flag\n"); 609 return 0; 610 } 611 612 #ifdef CONFIG_SYS_TEXT_BASE 613 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 614 #ifdef CONFIG_M68K 615 /* 616 * On all ColdFire arch cpu, monitor code starts always 617 * just after the default vector table location, so at 0x400 618 */ 619 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 620 #endif 621 #endif 622 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 623 624 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 625 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 626 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 627 gd->start_addr_sp); 628 629 return 0; 630 } 631 632 #ifdef CONFIG_OF_BOARD_FIXUP 633 static int fix_fdt(void) 634 { 635 return board_fix_fdt((void *)gd->fdt_blob); 636 } 637 #endif 638 639 /* ARM calls relocate_code from its crt0.S */ 640 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 641 !CONFIG_IS_ENABLED(X86_64) 642 643 static int jump_to_copy(void) 644 { 645 if (gd->flags & GD_FLG_SKIP_RELOC) 646 return 0; 647 /* 648 * x86 is special, but in a nice way. It uses a trampoline which 649 * enables the dcache if possible. 650 * 651 * For now, other archs use relocate_code(), which is implemented 652 * similarly for all archs. When we do generic relocation, hopefully 653 * we can make all archs enable the dcache prior to relocation. 654 */ 655 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 656 /* 657 * SDRAM and console are now initialised. The final stack can now 658 * be setup in SDRAM. Code execution will continue in Flash, but 659 * with the stack in SDRAM and Global Data in temporary memory 660 * (CPU cache) 661 */ 662 arch_setup_gd(gd->new_gd); 663 board_init_f_r_trampoline(gd->start_addr_sp); 664 #else 665 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 666 #endif 667 668 return 0; 669 } 670 #endif 671 672 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 673 static int mark_bootstage(void) 674 { 675 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 676 677 return 0; 678 } 679 680 static int initf_console_record(void) 681 { 682 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 683 return console_record_init(); 684 #else 685 return 0; 686 #endif 687 } 688 689 static int initf_dm(void) 690 { 691 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 692 int ret; 693 694 ret = dm_init_and_scan(true); 695 if (ret) 696 return ret; 697 #endif 698 #ifdef CONFIG_TIMER_EARLY 699 ret = dm_timer_init(); 700 if (ret) 701 return ret; 702 #endif 703 704 return 0; 705 } 706 707 /* Architecture-specific memory reservation */ 708 __weak int reserve_arch(void) 709 { 710 return 0; 711 } 712 713 __weak int arch_cpu_init_dm(void) 714 { 715 return 0; 716 } 717 718 static const init_fnc_t init_sequence_f[] = { 719 setup_mon_len, 720 #ifdef CONFIG_OF_CONTROL 721 fdtdec_setup, 722 #endif 723 #ifdef CONFIG_TRACE 724 trace_early_init, 725 #endif 726 initf_malloc, 727 initf_console_record, 728 #if defined(CONFIG_HAVE_FSP) 729 arch_fsp_init, 730 #endif 731 arch_cpu_init, /* basic arch cpu dependent setup */ 732 mach_cpu_init, /* SoC/machine dependent CPU setup */ 733 initf_dm, 734 arch_cpu_init_dm, 735 mark_bootstage, /* need timer, go after init dm */ 736 #if defined(CONFIG_BOARD_EARLY_INIT_F) 737 board_early_init_f, 738 #endif 739 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 740 /* get CPU and bus clocks according to the environment variable */ 741 get_clocks, /* get CPU and bus clocks (etc.) */ 742 #endif 743 #if !defined(CONFIG_M68K) 744 timer_init, /* initialize timer */ 745 #endif 746 #if defined(CONFIG_BOARD_POSTCLK_INIT) 747 board_postclk_init, 748 #endif 749 env_init, /* initialize environment */ 750 init_baud_rate, /* initialze baudrate settings */ 751 serial_init, /* serial communications setup */ 752 console_init_f, /* stage 1 init of console */ 753 display_options, /* say that we are here */ 754 display_text_info, /* show debugging info if required */ 755 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 756 defined(CONFIG_X86) 757 checkcpu, 758 #endif 759 #if defined(CONFIG_DISPLAY_CPUINFO) 760 print_cpuinfo, /* display cpu info (and speed) */ 761 #endif 762 #if defined(CONFIG_DISPLAY_BOARDINFO) 763 show_board_info, 764 #endif 765 INIT_FUNC_WATCHDOG_INIT 766 #if defined(CONFIG_MISC_INIT_F) 767 misc_init_f, 768 #endif 769 INIT_FUNC_WATCHDOG_RESET 770 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 771 init_func_i2c, 772 #endif 773 #if defined(CONFIG_HARD_SPI) 774 init_func_spi, 775 #endif 776 announce_dram_init, 777 dram_init, /* configure available RAM banks */ 778 #ifdef CONFIG_POST 779 post_init_f, 780 #endif 781 INIT_FUNC_WATCHDOG_RESET 782 #if defined(CONFIG_SYS_DRAM_TEST) 783 testdram, 784 #endif /* CONFIG_SYS_DRAM_TEST */ 785 INIT_FUNC_WATCHDOG_RESET 786 787 #ifdef CONFIG_POST 788 init_post, 789 #endif 790 INIT_FUNC_WATCHDOG_RESET 791 /* 792 * Now that we have DRAM mapped and working, we can 793 * relocate the code and continue running from DRAM. 794 * 795 * Reserve memory at end of RAM for (top down in that order): 796 * - area that won't get touched by U-Boot and Linux (optional) 797 * - kernel log buffer 798 * - protected RAM 799 * - LCD framebuffer 800 * - monitor code 801 * - board info struct 802 */ 803 setup_dest_addr, 804 #if defined(CONFIG_LOGBUFFER) 805 reserve_logbuffer, 806 #endif 807 #ifdef CONFIG_PRAM 808 reserve_pram, 809 #endif 810 reserve_round_4k, 811 #ifdef CONFIG_ARM 812 reserve_mmu, 813 #endif 814 reserve_video, 815 reserve_trace, 816 reserve_uboot, 817 reserve_malloc, 818 reserve_board, 819 setup_machine, 820 reserve_global_data, 821 reserve_fdt, 822 reserve_arch, 823 reserve_stacks, 824 dram_init_banksize, 825 show_dram_config, 826 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 827 defined(CONFIG_SH) 828 setup_board_part1, 829 #endif 830 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 831 INIT_FUNC_WATCHDOG_RESET 832 setup_board_part2, 833 #endif 834 display_new_sp, 835 #ifdef CONFIG_SYS_EXTBDINFO 836 setup_board_extra, 837 #endif 838 #ifdef CONFIG_OF_BOARD_FIXUP 839 fix_fdt, 840 #endif 841 INIT_FUNC_WATCHDOG_RESET 842 reloc_fdt, 843 setup_reloc, 844 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 845 copy_uboot_to_ram, 846 do_elf_reloc_fixups, 847 clear_bss, 848 #endif 849 #if defined(CONFIG_XTENSA) 850 clear_bss, 851 #endif 852 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 853 !CONFIG_IS_ENABLED(X86_64) 854 jump_to_copy, 855 #endif 856 NULL, 857 }; 858 859 void board_init_f(ulong boot_flags) 860 { 861 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 862 /* 863 * For some architectures, global data is initialized and used before 864 * calling this function. The data should be preserved. For others, 865 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 866 * here to host global data until relocation. 867 */ 868 gd_t data; 869 870 gd = &data; 871 872 /* 873 * Clear global data before it is accessed at debug print 874 * in initcall_run_list. Otherwise the debug print probably 875 * get the wrong value of gd->have_console. 876 */ 877 zero_global_data(); 878 #endif 879 880 gd->flags = boot_flags; 881 gd->have_console = 0; 882 883 if (initcall_run_list(init_sequence_f)) 884 hang(); 885 886 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 887 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 888 /* NOTREACHED - jump_to_copy() does not return */ 889 hang(); 890 #endif 891 } 892 893 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 894 /* 895 * For now this code is only used on x86. 896 * 897 * init_sequence_f_r is the list of init functions which are run when 898 * U-Boot is executing from Flash with a semi-limited 'C' environment. 899 * The following limitations must be considered when implementing an 900 * '_f_r' function: 901 * - 'static' variables are read-only 902 * - Global Data (gd->xxx) is read/write 903 * 904 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 905 * supported). It _should_, if possible, copy global data to RAM and 906 * initialise the CPU caches (to speed up the relocation process) 907 * 908 * NOTE: At present only x86 uses this route, but it is intended that 909 * all archs will move to this when generic relocation is implemented. 910 */ 911 static const init_fnc_t init_sequence_f_r[] = { 912 #if !CONFIG_IS_ENABLED(X86_64) 913 init_cache_f_r, 914 #endif 915 916 NULL, 917 }; 918 919 void board_init_f_r(void) 920 { 921 if (initcall_run_list(init_sequence_f_r)) 922 hang(); 923 924 /* 925 * The pre-relocation drivers may be using memory that has now gone 926 * away. Mark serial as unavailable - this will fall back to the debug 927 * UART if available. 928 */ 929 gd->flags &= ~GD_FLG_SERIAL_READY; 930 931 /* 932 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 933 * Transfer execution from Flash to RAM by calculating the address 934 * of the in-RAM copy of board_init_r() and calling it 935 */ 936 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 937 938 /* NOTREACHED - board_init_r() does not return */ 939 hang(); 940 } 941 #endif /* CONFIG_X86 */ 942