1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <environment.h> 17 #include <dm.h> 18 #include <fdtdec.h> 19 #include <fs.h> 20 #if defined(CONFIG_CMD_IDE) 21 #include <ide.h> 22 #endif 23 #include <i2c.h> 24 #include <initcall.h> 25 #include <logbuff.h> 26 #include <mapmem.h> 27 28 /* TODO: Can we move these into arch/ headers? */ 29 #ifdef CONFIG_8xx 30 #include <mpc8xx.h> 31 #endif 32 #ifdef CONFIG_5xx 33 #include <mpc5xx.h> 34 #endif 35 #ifdef CONFIG_MPC5xxx 36 #include <mpc5xxx.h> 37 #endif 38 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 39 #include <asm/mp.h> 40 #endif 41 42 #include <os.h> 43 #include <post.h> 44 #include <spi.h> 45 #include <status_led.h> 46 #include <trace.h> 47 #include <watchdog.h> 48 #include <asm/errno.h> 49 #include <asm/io.h> 50 #include <asm/sections.h> 51 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 52 #include <asm/init_helpers.h> 53 #include <asm/relocate.h> 54 #endif 55 #ifdef CONFIG_SANDBOX 56 #include <asm/state.h> 57 #endif 58 #include <dm/root.h> 59 #include <linux/compiler.h> 60 61 /* 62 * Pointer to initial global data area 63 * 64 * Here we initialize it if needed. 65 */ 66 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 67 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 68 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 69 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 70 #else 71 DECLARE_GLOBAL_DATA_PTR; 72 #endif 73 74 /* 75 * sjg: IMO this code should be 76 * refactored to a single function, something like: 77 * 78 * void led_set_state(enum led_colour_t colour, int on); 79 */ 80 /************************************************************************ 81 * Coloured LED functionality 82 ************************************************************************ 83 * May be supplied by boards if desired 84 */ 85 __weak void coloured_LED_init(void) {} 86 __weak void red_led_on(void) {} 87 __weak void red_led_off(void) {} 88 __weak void green_led_on(void) {} 89 __weak void green_led_off(void) {} 90 __weak void yellow_led_on(void) {} 91 __weak void yellow_led_off(void) {} 92 __weak void blue_led_on(void) {} 93 __weak void blue_led_off(void) {} 94 95 /* 96 * Why is gd allocated a register? Prior to reloc it might be better to 97 * just pass it around to each function in this file? 98 * 99 * After reloc one could argue that it is hardly used and doesn't need 100 * to be in a register. Or if it is it should perhaps hold pointers to all 101 * global data for all modules, so that post-reloc we can avoid the massive 102 * literal pool we get on ARM. Or perhaps just encourage each module to use 103 * a structure... 104 */ 105 106 /* 107 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 108 */ 109 110 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 111 static int init_func_watchdog_init(void) 112 { 113 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \ 114 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 115 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 116 defined(CONFIG_IMX_WATCHDOG)) 117 hw_watchdog_init(); 118 # endif 119 puts(" Watchdog enabled\n"); 120 WATCHDOG_RESET(); 121 122 return 0; 123 } 124 125 int init_func_watchdog_reset(void) 126 { 127 WATCHDOG_RESET(); 128 129 return 0; 130 } 131 #endif /* CONFIG_WATCHDOG */ 132 133 __weak void board_add_ram_info(int use_default) 134 { 135 /* please define platform specific board_add_ram_info() */ 136 } 137 138 static int init_baud_rate(void) 139 { 140 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 141 return 0; 142 } 143 144 static int display_text_info(void) 145 { 146 #ifndef CONFIG_SANDBOX 147 ulong bss_start, bss_end, text_base; 148 149 bss_start = (ulong)&__bss_start; 150 bss_end = (ulong)&__bss_end; 151 152 #ifdef CONFIG_SYS_TEXT_BASE 153 text_base = CONFIG_SYS_TEXT_BASE; 154 #else 155 text_base = CONFIG_SYS_MONITOR_BASE; 156 #endif 157 158 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 159 text_base, bss_start, bss_end); 160 #endif 161 162 #ifdef CONFIG_MODEM_SUPPORT 163 debug("Modem Support enabled\n"); 164 #endif 165 #ifdef CONFIG_USE_IRQ 166 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 167 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 168 #endif 169 170 return 0; 171 } 172 173 static int announce_dram_init(void) 174 { 175 puts("DRAM: "); 176 return 0; 177 } 178 179 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 180 static int init_func_ram(void) 181 { 182 #ifdef CONFIG_BOARD_TYPES 183 int board_type = gd->board_type; 184 #else 185 int board_type = 0; /* use dummy arg */ 186 #endif 187 188 gd->ram_size = initdram(board_type); 189 190 if (gd->ram_size > 0) 191 return 0; 192 193 puts("*** failed ***\n"); 194 return 1; 195 } 196 #endif 197 198 static int show_dram_config(void) 199 { 200 unsigned long long size; 201 202 #ifdef CONFIG_NR_DRAM_BANKS 203 int i; 204 205 debug("\nRAM Configuration:\n"); 206 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 207 size += gd->bd->bi_dram[i].size; 208 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); 209 #ifdef DEBUG 210 print_size(gd->bd->bi_dram[i].size, "\n"); 211 #endif 212 } 213 debug("\nDRAM: "); 214 #else 215 size = gd->ram_size; 216 #endif 217 218 print_size(size, ""); 219 board_add_ram_info(0); 220 putc('\n'); 221 222 return 0; 223 } 224 225 __weak void dram_init_banksize(void) 226 { 227 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 228 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 229 gd->bd->bi_dram[0].size = get_effective_memsize(); 230 #endif 231 } 232 233 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 234 static int init_func_i2c(void) 235 { 236 puts("I2C: "); 237 #ifdef CONFIG_SYS_I2C 238 i2c_init_all(); 239 #else 240 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 241 #endif 242 puts("ready\n"); 243 return 0; 244 } 245 #endif 246 247 #if defined(CONFIG_HARD_SPI) 248 static int init_func_spi(void) 249 { 250 puts("SPI: "); 251 spi_init(); 252 puts("ready\n"); 253 return 0; 254 } 255 #endif 256 257 __maybe_unused 258 static int zero_global_data(void) 259 { 260 memset((void *)gd, '\0', sizeof(gd_t)); 261 262 return 0; 263 } 264 265 static int setup_mon_len(void) 266 { 267 #if defined(__ARM__) || defined(__MICROBLAZE__) 268 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 269 #elif defined(CONFIG_SANDBOX) 270 gd->mon_len = (ulong)&_end - (ulong)_init; 271 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 272 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 273 #else 274 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 275 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 276 #endif 277 return 0; 278 } 279 280 __weak int arch_cpu_init(void) 281 { 282 return 0; 283 } 284 285 #ifdef CONFIG_OF_HOSTFILE 286 287 static int read_fdt_from_file(void) 288 { 289 struct sandbox_state *state = state_get_current(); 290 const char *fname = state->fdt_fname; 291 void *blob; 292 loff_t size; 293 int err; 294 int fd; 295 296 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); 297 if (!state->fdt_fname) { 298 err = fdt_create_empty_tree(blob, 256); 299 if (!err) 300 goto done; 301 printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); 302 return -EINVAL; 303 } 304 305 err = os_get_filesize(fname, &size); 306 if (err < 0) { 307 printf("Failed to file FDT file '%s'\n", fname); 308 return err; 309 } 310 fd = os_open(fname, OS_O_RDONLY); 311 if (fd < 0) { 312 printf("Failed to open FDT file '%s'\n", fname); 313 return -EACCES; 314 } 315 if (os_read(fd, blob, size) != size) { 316 os_close(fd); 317 return -EIO; 318 } 319 os_close(fd); 320 321 done: 322 gd->fdt_blob = blob; 323 324 return 0; 325 } 326 #endif 327 328 #ifdef CONFIG_SANDBOX 329 static int setup_ram_buf(void) 330 { 331 struct sandbox_state *state = state_get_current(); 332 333 gd->arch.ram_buf = state->ram_buf; 334 gd->ram_size = state->ram_size; 335 336 return 0; 337 } 338 #endif 339 340 static int setup_fdt(void) 341 { 342 #ifdef CONFIG_OF_CONTROL 343 # ifdef CONFIG_OF_EMBED 344 /* Get a pointer to the FDT */ 345 gd->fdt_blob = __dtb_dt_begin; 346 # elif defined CONFIG_OF_SEPARATE 347 /* FDT is at end of image */ 348 gd->fdt_blob = (ulong *)&_end; 349 # elif defined(CONFIG_OF_HOSTFILE) 350 if (read_fdt_from_file()) { 351 puts("Failed to read control FDT\n"); 352 return -1; 353 } 354 # endif 355 /* Allow the early environment to override the fdt address */ 356 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, 357 (uintptr_t)gd->fdt_blob); 358 #endif 359 return 0; 360 } 361 362 /* Get the top of usable RAM */ 363 __weak ulong board_get_usable_ram_top(ulong total_size) 364 { 365 #ifdef CONFIG_SYS_SDRAM_BASE 366 /* 367 * Detect whether we have so much RAM it goes past the end of our 368 * 32-bit address space. If so, clip the usable RAM so it doesn't. 369 */ 370 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 371 /* 372 * Will wrap back to top of 32-bit space when reservations 373 * are made. 374 */ 375 return 0; 376 #endif 377 return gd->ram_top; 378 } 379 380 static int setup_dest_addr(void) 381 { 382 debug("Monitor len: %08lX\n", gd->mon_len); 383 /* 384 * Ram is setup, size stored in gd !! 385 */ 386 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 387 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 388 /* 389 * Subtract specified amount of memory to hide so that it won't 390 * get "touched" at all by U-Boot. By fixing up gd->ram_size 391 * the Linux kernel should now get passed the now "corrected" 392 * memory size and won't touch it either. This should work 393 * for arch/ppc and arch/powerpc. Only Linux board ports in 394 * arch/powerpc with bootwrapper support, that recalculate the 395 * memory size from the SDRAM controller setup will have to 396 * get fixed. 397 */ 398 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 399 #endif 400 #ifdef CONFIG_SYS_SDRAM_BASE 401 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 402 #endif 403 gd->ram_top += get_effective_memsize(); 404 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 405 gd->relocaddr = gd->ram_top; 406 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 407 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 408 /* 409 * We need to make sure the location we intend to put secondary core 410 * boot code is reserved and not used by any part of u-boot 411 */ 412 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 413 gd->relocaddr = determine_mp_bootpg(NULL); 414 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 415 } 416 #endif 417 return 0; 418 } 419 420 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 421 static int reserve_logbuffer(void) 422 { 423 /* reserve kernel log buffer */ 424 gd->relocaddr -= LOGBUFF_RESERVE; 425 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 426 gd->relocaddr); 427 return 0; 428 } 429 #endif 430 431 #ifdef CONFIG_PRAM 432 /* reserve protected RAM */ 433 static int reserve_pram(void) 434 { 435 ulong reg; 436 437 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 438 gd->relocaddr -= (reg << 10); /* size is in kB */ 439 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 440 gd->relocaddr); 441 return 0; 442 } 443 #endif /* CONFIG_PRAM */ 444 445 /* Round memory pointer down to next 4 kB limit */ 446 static int reserve_round_4k(void) 447 { 448 gd->relocaddr &= ~(4096 - 1); 449 return 0; 450 } 451 452 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 453 defined(CONFIG_ARM) 454 static int reserve_mmu(void) 455 { 456 /* reserve TLB table */ 457 gd->arch.tlb_size = PGTABLE_SIZE; 458 gd->relocaddr -= gd->arch.tlb_size; 459 460 /* round down to next 64 kB limit */ 461 gd->relocaddr &= ~(0x10000 - 1); 462 463 gd->arch.tlb_addr = gd->relocaddr; 464 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 465 gd->arch.tlb_addr + gd->arch.tlb_size); 466 return 0; 467 } 468 #endif 469 470 #ifdef CONFIG_LCD 471 static int reserve_lcd(void) 472 { 473 #ifdef CONFIG_FB_ADDR 474 gd->fb_base = CONFIG_FB_ADDR; 475 #else 476 /* reserve memory for LCD display (always full pages) */ 477 gd->relocaddr = lcd_setmem(gd->relocaddr); 478 gd->fb_base = gd->relocaddr; 479 #endif /* CONFIG_FB_ADDR */ 480 return 0; 481 } 482 #endif /* CONFIG_LCD */ 483 484 static int reserve_trace(void) 485 { 486 #ifdef CONFIG_TRACE 487 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 488 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 489 debug("Reserving %dk for trace data at: %08lx\n", 490 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 491 #endif 492 493 return 0; 494 } 495 496 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 497 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 498 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) 499 static int reserve_video(void) 500 { 501 /* reserve memory for video display (always full pages) */ 502 gd->relocaddr = video_setmem(gd->relocaddr); 503 gd->fb_base = gd->relocaddr; 504 505 return 0; 506 } 507 #endif 508 509 static int reserve_uboot(void) 510 { 511 /* 512 * reserve memory for U-Boot code, data & bss 513 * round down to next 4 kB limit 514 */ 515 gd->relocaddr -= gd->mon_len; 516 gd->relocaddr &= ~(4096 - 1); 517 #ifdef CONFIG_E500 518 /* round down to next 64 kB limit so that IVPR stays aligned */ 519 gd->relocaddr &= ~(65536 - 1); 520 #endif 521 522 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 523 gd->relocaddr); 524 525 gd->start_addr_sp = gd->relocaddr; 526 527 return 0; 528 } 529 530 #ifndef CONFIG_SPL_BUILD 531 /* reserve memory for malloc() area */ 532 static int reserve_malloc(void) 533 { 534 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 535 debug("Reserving %dk for malloc() at: %08lx\n", 536 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 537 return 0; 538 } 539 540 /* (permanently) allocate a Board Info struct */ 541 static int reserve_board(void) 542 { 543 if (!gd->bd) { 544 gd->start_addr_sp -= sizeof(bd_t); 545 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 546 memset(gd->bd, '\0', sizeof(bd_t)); 547 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 548 sizeof(bd_t), gd->start_addr_sp); 549 } 550 return 0; 551 } 552 #endif 553 554 static int setup_machine(void) 555 { 556 #ifdef CONFIG_MACH_TYPE 557 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 558 #endif 559 return 0; 560 } 561 562 static int reserve_global_data(void) 563 { 564 gd->start_addr_sp -= sizeof(gd_t); 565 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 566 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 567 sizeof(gd_t), gd->start_addr_sp); 568 return 0; 569 } 570 571 static int reserve_fdt(void) 572 { 573 /* 574 * If the device tree is sitting immediate above our image then we 575 * must relocate it. If it is embedded in the data section, then it 576 * will be relocated with other data. 577 */ 578 if (gd->fdt_blob) { 579 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 580 581 gd->start_addr_sp -= gd->fdt_size; 582 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 583 debug("Reserving %lu Bytes for FDT at: %08lx\n", 584 gd->fdt_size, gd->start_addr_sp); 585 } 586 587 return 0; 588 } 589 590 int arch_reserve_stacks(void) 591 { 592 return 0; 593 } 594 595 static int reserve_stacks(void) 596 { 597 /* make stack pointer 16-byte aligned */ 598 gd->start_addr_sp -= 16; 599 gd->start_addr_sp &= ~0xf; 600 601 /* 602 * let the architecture specific code tailor gd->start_addr_sp and 603 * gd->irq_sp 604 */ 605 return arch_reserve_stacks(); 606 } 607 608 static int display_new_sp(void) 609 { 610 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 611 612 return 0; 613 } 614 615 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 616 static int setup_board_part1(void) 617 { 618 bd_t *bd = gd->bd; 619 620 /* 621 * Save local variables to board info struct 622 */ 623 624 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 625 bd->bi_memsize = gd->ram_size; /* size in bytes */ 626 627 #ifdef CONFIG_SYS_SRAM_BASE 628 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 629 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 630 #endif 631 632 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 633 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 634 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 635 #endif 636 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 637 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 638 #endif 639 #if defined(CONFIG_MPC83xx) 640 bd->bi_immrbar = CONFIG_SYS_IMMR; 641 #endif 642 643 return 0; 644 } 645 646 static int setup_board_part2(void) 647 { 648 bd_t *bd = gd->bd; 649 650 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 651 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 652 #if defined(CONFIG_CPM2) 653 bd->bi_cpmfreq = gd->arch.cpm_clk; 654 bd->bi_brgfreq = gd->arch.brg_clk; 655 bd->bi_sccfreq = gd->arch.scc_clk; 656 bd->bi_vco = gd->arch.vco_out; 657 #endif /* CONFIG_CPM2 */ 658 #if defined(CONFIG_MPC512X) 659 bd->bi_ipsfreq = gd->arch.ips_clk; 660 #endif /* CONFIG_MPC512X */ 661 #if defined(CONFIG_MPC5xxx) 662 bd->bi_ipbfreq = gd->arch.ipb_clk; 663 bd->bi_pcifreq = gd->pci_clk; 664 #endif /* CONFIG_MPC5xxx */ 665 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 666 bd->bi_pcifreq = gd->pci_clk; 667 #endif 668 #if defined(CONFIG_EXTRA_CLOCK) 669 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 670 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 671 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 672 #endif 673 674 return 0; 675 } 676 #endif 677 678 #ifdef CONFIG_SYS_EXTBDINFO 679 static int setup_board_extra(void) 680 { 681 bd_t *bd = gd->bd; 682 683 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 684 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 685 sizeof(bd->bi_r_version)); 686 687 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 688 bd->bi_plb_busfreq = gd->bus_clk; 689 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 690 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 691 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 692 bd->bi_pci_busfreq = get_PCI_freq(); 693 bd->bi_opbfreq = get_OPB_freq(); 694 #elif defined(CONFIG_XILINX_405) 695 bd->bi_pci_busfreq = get_PCI_freq(); 696 #endif 697 698 return 0; 699 } 700 #endif 701 702 #ifdef CONFIG_POST 703 static int init_post(void) 704 { 705 post_bootmode_init(); 706 post_run(NULL, POST_ROM | post_bootmode_get(0)); 707 708 return 0; 709 } 710 #endif 711 712 static int setup_dram_config(void) 713 { 714 /* Ram is board specific, so move it to board code ... */ 715 dram_init_banksize(); 716 717 return 0; 718 } 719 720 static int reloc_fdt(void) 721 { 722 if (gd->new_fdt) { 723 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 724 gd->fdt_blob = gd->new_fdt; 725 } 726 727 return 0; 728 } 729 730 static int setup_reloc(void) 731 { 732 #ifdef CONFIG_SYS_TEXT_BASE 733 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 734 #ifdef CONFIG_M68K 735 /* 736 * On all ColdFire arch cpu, monitor code starts always 737 * just after the default vector table location, so at 0x400 738 */ 739 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 740 #endif 741 #endif 742 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 743 744 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 745 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 746 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 747 gd->start_addr_sp); 748 749 return 0; 750 } 751 752 /* ARM calls relocate_code from its crt0.S */ 753 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 754 755 static int jump_to_copy(void) 756 { 757 /* 758 * x86 is special, but in a nice way. It uses a trampoline which 759 * enables the dcache if possible. 760 * 761 * For now, other archs use relocate_code(), which is implemented 762 * similarly for all archs. When we do generic relocation, hopefully 763 * we can make all archs enable the dcache prior to relocation. 764 */ 765 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 766 /* 767 * SDRAM and console are now initialised. The final stack can now 768 * be setup in SDRAM. Code execution will continue in Flash, but 769 * with the stack in SDRAM and Global Data in temporary memory 770 * (CPU cache) 771 */ 772 board_init_f_r_trampoline(gd->start_addr_sp); 773 #else 774 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 775 #endif 776 777 return 0; 778 } 779 #endif 780 781 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 782 static int mark_bootstage(void) 783 { 784 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 785 786 return 0; 787 } 788 789 static int initf_malloc(void) 790 { 791 #ifdef CONFIG_SYS_MALLOC_F_LEN 792 assert(gd->malloc_base); /* Set up by crt0.S */ 793 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN; 794 gd->malloc_ptr = 0; 795 #endif 796 797 return 0; 798 } 799 800 static int initf_dm(void) 801 { 802 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 803 int ret; 804 805 ret = dm_init_and_scan(true); 806 if (ret) 807 return ret; 808 #endif 809 810 return 0; 811 } 812 813 /* Architecture-specific memory reservation */ 814 __weak int reserve_arch(void) 815 { 816 return 0; 817 } 818 819 __weak int arch_cpu_init_dm(void) 820 { 821 return 0; 822 } 823 824 static init_fnc_t init_sequence_f[] = { 825 #ifdef CONFIG_SANDBOX 826 setup_ram_buf, 827 #endif 828 setup_mon_len, 829 setup_fdt, 830 #ifdef CONFIG_TRACE 831 trace_early_init, 832 #endif 833 initf_malloc, 834 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 835 /* TODO: can this go into arch_cpu_init()? */ 836 probecpu, 837 #endif 838 arch_cpu_init, /* basic arch cpu dependent setup */ 839 mark_bootstage, 840 #ifdef CONFIG_OF_CONTROL 841 fdtdec_check_fdt, 842 #endif 843 initf_dm, 844 arch_cpu_init_dm, 845 #if defined(CONFIG_BOARD_EARLY_INIT_F) 846 board_early_init_f, 847 #endif 848 /* TODO: can any of this go into arch_cpu_init()? */ 849 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 850 get_clocks, /* get CPU and bus clocks (etc.) */ 851 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 852 && !defined(CONFIG_TQM885D) 853 adjust_sdram_tbs_8xx, 854 #endif 855 /* TODO: can we rename this to timer_init()? */ 856 init_timebase, 857 #endif 858 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN) 859 timer_init, /* initialize timer */ 860 #endif 861 #ifdef CONFIG_SYS_ALLOC_DPRAM 862 #if !defined(CONFIG_CPM2) 863 dpram_init, 864 #endif 865 #endif 866 #if defined(CONFIG_BOARD_POSTCLK_INIT) 867 board_postclk_init, 868 #endif 869 #ifdef CONFIG_FSL_ESDHC 870 get_clocks, 871 #endif 872 #ifdef CONFIG_M68K 873 get_clocks, 874 #endif 875 env_init, /* initialize environment */ 876 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 877 /* get CPU and bus clocks according to the environment variable */ 878 get_clocks_866, 879 /* adjust sdram refresh rate according to the new clock */ 880 sdram_adjust_866, 881 init_timebase, 882 #endif 883 init_baud_rate, /* initialze baudrate settings */ 884 serial_init, /* serial communications setup */ 885 console_init_f, /* stage 1 init of console */ 886 #ifdef CONFIG_SANDBOX 887 sandbox_early_getopt_check, 888 #endif 889 #ifdef CONFIG_OF_CONTROL 890 fdtdec_prepare_fdt, 891 #endif 892 display_options, /* say that we are here */ 893 display_text_info, /* show debugging info if required */ 894 #if defined(CONFIG_MPC8260) 895 prt_8260_rsr, 896 prt_8260_clks, 897 #endif /* CONFIG_MPC8260 */ 898 #if defined(CONFIG_MPC83xx) 899 prt_83xx_rsr, 900 #endif 901 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 902 checkcpu, 903 #endif 904 print_cpuinfo, /* display cpu info (and speed) */ 905 #if defined(CONFIG_MPC5xxx) 906 prt_mpc5xxx_clks, 907 #endif /* CONFIG_MPC5xxx */ 908 #if defined(CONFIG_DISPLAY_BOARDINFO) 909 show_board_info, 910 #endif 911 INIT_FUNC_WATCHDOG_INIT 912 #if defined(CONFIG_MISC_INIT_F) 913 misc_init_f, 914 #endif 915 INIT_FUNC_WATCHDOG_RESET 916 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 917 init_func_i2c, 918 #endif 919 #if defined(CONFIG_HARD_SPI) 920 init_func_spi, 921 #endif 922 announce_dram_init, 923 /* TODO: unify all these dram functions? */ 924 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) 925 dram_init, /* configure available RAM banks */ 926 #endif 927 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 928 init_func_ram, 929 #endif 930 #ifdef CONFIG_POST 931 post_init_f, 932 #endif 933 INIT_FUNC_WATCHDOG_RESET 934 #if defined(CONFIG_SYS_DRAM_TEST) 935 testdram, 936 #endif /* CONFIG_SYS_DRAM_TEST */ 937 INIT_FUNC_WATCHDOG_RESET 938 939 #ifdef CONFIG_POST 940 init_post, 941 #endif 942 INIT_FUNC_WATCHDOG_RESET 943 /* 944 * Now that we have DRAM mapped and working, we can 945 * relocate the code and continue running from DRAM. 946 * 947 * Reserve memory at end of RAM for (top down in that order): 948 * - area that won't get touched by U-Boot and Linux (optional) 949 * - kernel log buffer 950 * - protected RAM 951 * - LCD framebuffer 952 * - monitor code 953 * - board info struct 954 */ 955 setup_dest_addr, 956 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 957 /* Blackfin u-boot monitor should be on top of the ram */ 958 reserve_uboot, 959 #endif 960 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 961 reserve_logbuffer, 962 #endif 963 #ifdef CONFIG_PRAM 964 reserve_pram, 965 #endif 966 reserve_round_4k, 967 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 968 defined(CONFIG_ARM) 969 reserve_mmu, 970 #endif 971 #ifdef CONFIG_LCD 972 reserve_lcd, 973 #endif 974 reserve_trace, 975 /* TODO: Why the dependency on CONFIG_8xx? */ 976 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 977 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 978 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) 979 reserve_video, 980 #endif 981 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2) 982 reserve_uboot, 983 #endif 984 #ifndef CONFIG_SPL_BUILD 985 reserve_malloc, 986 reserve_board, 987 #endif 988 setup_machine, 989 reserve_global_data, 990 reserve_fdt, 991 reserve_arch, 992 reserve_stacks, 993 setup_dram_config, 994 show_dram_config, 995 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 996 setup_board_part1, 997 INIT_FUNC_WATCHDOG_RESET 998 setup_board_part2, 999 #endif 1000 display_new_sp, 1001 #ifdef CONFIG_SYS_EXTBDINFO 1002 setup_board_extra, 1003 #endif 1004 INIT_FUNC_WATCHDOG_RESET 1005 reloc_fdt, 1006 setup_reloc, 1007 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1008 copy_uboot_to_ram, 1009 clear_bss, 1010 do_elf_reloc_fixups, 1011 #endif 1012 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 1013 jump_to_copy, 1014 #endif 1015 NULL, 1016 }; 1017 1018 void board_init_f(ulong boot_flags) 1019 { 1020 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 1021 /* 1022 * For some archtectures, global data is initialized and used before 1023 * calling this function. The data should be preserved. For others, 1024 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 1025 * here to host global data until relocation. 1026 */ 1027 gd_t data; 1028 1029 gd = &data; 1030 1031 /* 1032 * Clear global data before it is accessed at debug print 1033 * in initcall_run_list. Otherwise the debug print probably 1034 * get the wrong vaule of gd->have_console. 1035 */ 1036 zero_global_data(); 1037 #endif 1038 1039 gd->flags = boot_flags; 1040 gd->have_console = 0; 1041 1042 if (initcall_run_list(init_sequence_f)) 1043 hang(); 1044 1045 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 1046 /* NOTREACHED - jump_to_copy() does not return */ 1047 hang(); 1048 #endif 1049 } 1050 1051 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1052 /* 1053 * For now this code is only used on x86. 1054 * 1055 * init_sequence_f_r is the list of init functions which are run when 1056 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1057 * The following limitations must be considered when implementing an 1058 * '_f_r' function: 1059 * - 'static' variables are read-only 1060 * - Global Data (gd->xxx) is read/write 1061 * 1062 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1063 * supported). It _should_, if possible, copy global data to RAM and 1064 * initialise the CPU caches (to speed up the relocation process) 1065 * 1066 * NOTE: At present only x86 uses this route, but it is intended that 1067 * all archs will move to this when generic relocation is implemented. 1068 */ 1069 static init_fnc_t init_sequence_f_r[] = { 1070 init_cache_f_r, 1071 1072 NULL, 1073 }; 1074 1075 void board_init_f_r(void) 1076 { 1077 if (initcall_run_list(init_sequence_f_r)) 1078 hang(); 1079 1080 /* 1081 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1082 * Transfer execution from Flash to RAM by calculating the address 1083 * of the in-RAM copy of board_init_r() and calling it 1084 */ 1085 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1086 1087 /* NOTREACHED - board_init_r() does not return */ 1088 hang(); 1089 } 1090 #endif /* CONFIG_X86 */ 1091 1092 #ifndef CONFIG_X86 1093 ulong board_init_f_mem(ulong top) 1094 { 1095 /* Leave space for the stack we are running with now */ 1096 top -= 0x40; 1097 1098 top -= sizeof(struct global_data); 1099 top = ALIGN(top, 16); 1100 gd = (struct global_data *)top; 1101 memset((void *)gd, '\0', sizeof(*gd)); 1102 1103 #ifdef CONFIG_SYS_MALLOC_F_LEN 1104 top -= CONFIG_SYS_MALLOC_F_LEN; 1105 gd->malloc_base = top; 1106 #endif 1107 1108 return top; 1109 } 1110 #endif /* !CONFIG_X86 */ 1111