1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <console.h> 17 #include <environment.h> 18 #include <dm.h> 19 #include <fdtdec.h> 20 #include <fs.h> 21 #if defined(CONFIG_CMD_IDE) 22 #include <ide.h> 23 #endif 24 #include <i2c.h> 25 #include <initcall.h> 26 #include <logbuff.h> 27 #include <malloc.h> 28 #include <mapmem.h> 29 30 /* TODO: Can we move these into arch/ headers? */ 31 #ifdef CONFIG_8xx 32 #include <mpc8xx.h> 33 #endif 34 #ifdef CONFIG_5xx 35 #include <mpc5xx.h> 36 #endif 37 #ifdef CONFIG_MPC5xxx 38 #include <mpc5xxx.h> 39 #endif 40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 41 #include <asm/mp.h> 42 #endif 43 44 #include <os.h> 45 #include <post.h> 46 #include <spi.h> 47 #include <status_led.h> 48 #include <trace.h> 49 #include <video.h> 50 #include <watchdog.h> 51 #include <asm/errno.h> 52 #include <asm/io.h> 53 #include <asm/sections.h> 54 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 55 #include <asm/init_helpers.h> 56 #include <asm/relocate.h> 57 #endif 58 #ifdef CONFIG_SANDBOX 59 #include <asm/state.h> 60 #endif 61 #include <dm/root.h> 62 #include <linux/compiler.h> 63 64 /* 65 * Pointer to initial global data area 66 * 67 * Here we initialize it if needed. 68 */ 69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 73 #else 74 DECLARE_GLOBAL_DATA_PTR; 75 #endif 76 77 /* 78 * TODO(sjg@chromium.org): IMO this code should be 79 * refactored to a single function, something like: 80 * 81 * void led_set_state(enum led_colour_t colour, int on); 82 */ 83 /************************************************************************ 84 * Coloured LED functionality 85 ************************************************************************ 86 * May be supplied by boards if desired 87 */ 88 __weak void coloured_LED_init(void) {} 89 __weak void red_led_on(void) {} 90 __weak void red_led_off(void) {} 91 __weak void green_led_on(void) {} 92 __weak void green_led_off(void) {} 93 __weak void yellow_led_on(void) {} 94 __weak void yellow_led_off(void) {} 95 __weak void blue_led_on(void) {} 96 __weak void blue_led_off(void) {} 97 98 /* 99 * Why is gd allocated a register? Prior to reloc it might be better to 100 * just pass it around to each function in this file? 101 * 102 * After reloc one could argue that it is hardly used and doesn't need 103 * to be in a register. Or if it is it should perhaps hold pointers to all 104 * global data for all modules, so that post-reloc we can avoid the massive 105 * literal pool we get on ARM. Or perhaps just encourage each module to use 106 * a structure... 107 */ 108 109 /* 110 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 111 */ 112 113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 114 static int init_func_watchdog_init(void) 115 { 116 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \ 117 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 118 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 119 defined(CONFIG_IMX_WATCHDOG)) 120 hw_watchdog_init(); 121 # endif 122 puts(" Watchdog enabled\n"); 123 WATCHDOG_RESET(); 124 125 return 0; 126 } 127 128 int init_func_watchdog_reset(void) 129 { 130 WATCHDOG_RESET(); 131 132 return 0; 133 } 134 #endif /* CONFIG_WATCHDOG */ 135 136 __weak void board_add_ram_info(int use_default) 137 { 138 /* please define platform specific board_add_ram_info() */ 139 } 140 141 static int init_baud_rate(void) 142 { 143 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 144 return 0; 145 } 146 147 static int display_text_info(void) 148 { 149 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 150 ulong bss_start, bss_end, text_base; 151 152 bss_start = (ulong)&__bss_start; 153 bss_end = (ulong)&__bss_end; 154 155 #ifdef CONFIG_SYS_TEXT_BASE 156 text_base = CONFIG_SYS_TEXT_BASE; 157 #else 158 text_base = CONFIG_SYS_MONITOR_BASE; 159 #endif 160 161 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 162 text_base, bss_start, bss_end); 163 #endif 164 165 #ifdef CONFIG_MODEM_SUPPORT 166 debug("Modem Support enabled\n"); 167 #endif 168 #ifdef CONFIG_USE_IRQ 169 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 170 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 171 #endif 172 173 return 0; 174 } 175 176 static int announce_dram_init(void) 177 { 178 puts("DRAM: "); 179 return 0; 180 } 181 182 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 183 static int init_func_ram(void) 184 { 185 #ifdef CONFIG_BOARD_TYPES 186 int board_type = gd->board_type; 187 #else 188 int board_type = 0; /* use dummy arg */ 189 #endif 190 191 gd->ram_size = initdram(board_type); 192 193 if (gd->ram_size > 0) 194 return 0; 195 196 puts("*** failed ***\n"); 197 return 1; 198 } 199 #endif 200 201 static int show_dram_config(void) 202 { 203 unsigned long long size; 204 205 #ifdef CONFIG_NR_DRAM_BANKS 206 int i; 207 208 debug("\nRAM Configuration:\n"); 209 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 210 size += gd->bd->bi_dram[i].size; 211 debug("Bank #%d: %llx ", i, 212 (unsigned long long)(gd->bd->bi_dram[i].start)); 213 #ifdef DEBUG 214 print_size(gd->bd->bi_dram[i].size, "\n"); 215 #endif 216 } 217 debug("\nDRAM: "); 218 #else 219 size = gd->ram_size; 220 #endif 221 222 print_size(size, ""); 223 board_add_ram_info(0); 224 putc('\n'); 225 226 return 0; 227 } 228 229 __weak void dram_init_banksize(void) 230 { 231 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 232 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 233 gd->bd->bi_dram[0].size = get_effective_memsize(); 234 #endif 235 } 236 237 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 238 static int init_func_i2c(void) 239 { 240 puts("I2C: "); 241 #ifdef CONFIG_SYS_I2C 242 i2c_init_all(); 243 #else 244 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 245 #endif 246 puts("ready\n"); 247 return 0; 248 } 249 #endif 250 251 #if defined(CONFIG_HARD_SPI) 252 static int init_func_spi(void) 253 { 254 puts("SPI: "); 255 spi_init(); 256 puts("ready\n"); 257 return 0; 258 } 259 #endif 260 261 __maybe_unused 262 static int zero_global_data(void) 263 { 264 memset((void *)gd, '\0', sizeof(gd_t)); 265 266 return 0; 267 } 268 269 static int setup_mon_len(void) 270 { 271 #if defined(__ARM__) || defined(__MICROBLAZE__) 272 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 273 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 274 gd->mon_len = (ulong)&_end - (ulong)_init; 275 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 276 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 277 #elif defined(CONFIG_NDS32) 278 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 279 #else 280 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 281 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 282 #endif 283 return 0; 284 } 285 286 __weak int arch_cpu_init(void) 287 { 288 return 0; 289 } 290 291 #ifdef CONFIG_SANDBOX 292 static int setup_ram_buf(void) 293 { 294 struct sandbox_state *state = state_get_current(); 295 296 gd->arch.ram_buf = state->ram_buf; 297 gd->ram_size = state->ram_size; 298 299 return 0; 300 } 301 #endif 302 303 /* Get the top of usable RAM */ 304 __weak ulong board_get_usable_ram_top(ulong total_size) 305 { 306 #ifdef CONFIG_SYS_SDRAM_BASE 307 /* 308 * Detect whether we have so much RAM that it goes past the end of our 309 * 32-bit address space. If so, clip the usable RAM so it doesn't. 310 */ 311 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 312 /* 313 * Will wrap back to top of 32-bit space when reservations 314 * are made. 315 */ 316 return 0; 317 #endif 318 return gd->ram_top; 319 } 320 321 __weak phys_size_t board_reserve_ram_top(phys_size_t ram_size) 322 { 323 #ifdef CONFIG_SYS_MEM_TOP_HIDE 324 return ram_size - CONFIG_SYS_MEM_TOP_HIDE; 325 #else 326 return ram_size; 327 #endif 328 } 329 330 static int setup_dest_addr(void) 331 { 332 debug("Monitor len: %08lX\n", gd->mon_len); 333 /* 334 * Ram is setup, size stored in gd !! 335 */ 336 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 337 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 338 /* Reserve memory for secure MMU tables, and/or security monitor */ 339 gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE; 340 /* 341 * Record secure memory location. Need recalcuate if memory splits 342 * into banks, or the ram base is not zero. 343 */ 344 gd->secure_ram = gd->ram_size; 345 #endif 346 /* 347 * Subtract specified amount of memory to hide so that it won't 348 * get "touched" at all by U-Boot. By fixing up gd->ram_size 349 * the Linux kernel should now get passed the now "corrected" 350 * memory size and won't touch it either. This has been used 351 * by arch/powerpc exclusively. Now ARMv8 takes advantage of 352 * thie mechanism. If memory is split into banks, addresses 353 * need to be calculated. 354 */ 355 gd->ram_size = board_reserve_ram_top(gd->ram_size); 356 357 #ifdef CONFIG_SYS_SDRAM_BASE 358 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 359 #endif 360 gd->ram_top += get_effective_memsize(); 361 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 362 gd->relocaddr = gd->ram_top; 363 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 364 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 365 /* 366 * We need to make sure the location we intend to put secondary core 367 * boot code is reserved and not used by any part of u-boot 368 */ 369 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 370 gd->relocaddr = determine_mp_bootpg(NULL); 371 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 372 } 373 #endif 374 return 0; 375 } 376 377 #if defined(CONFIG_SPARC) 378 static int reserve_prom(void) 379 { 380 /* defined in arch/sparc/cpu/leon?/prom.c */ 381 extern void *__prom_start_reloc; 382 int size = 8192; /* page table = 2k, prom = 6k */ 383 gd->relocaddr -= size; 384 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048); 385 debug("Reserving %dk for PROM and page table at %08lx\n", size, 386 gd->relocaddr); 387 return 0; 388 } 389 #endif 390 391 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 392 static int reserve_logbuffer(void) 393 { 394 /* reserve kernel log buffer */ 395 gd->relocaddr -= LOGBUFF_RESERVE; 396 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 397 gd->relocaddr); 398 return 0; 399 } 400 #endif 401 402 #ifdef CONFIG_PRAM 403 /* reserve protected RAM */ 404 static int reserve_pram(void) 405 { 406 ulong reg; 407 408 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 409 gd->relocaddr -= (reg << 10); /* size is in kB */ 410 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 411 gd->relocaddr); 412 return 0; 413 } 414 #endif /* CONFIG_PRAM */ 415 416 /* Round memory pointer down to next 4 kB limit */ 417 static int reserve_round_4k(void) 418 { 419 gd->relocaddr &= ~(4096 - 1); 420 return 0; 421 } 422 423 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 424 defined(CONFIG_ARM) 425 static int reserve_mmu(void) 426 { 427 /* reserve TLB table */ 428 gd->arch.tlb_size = PGTABLE_SIZE; 429 gd->relocaddr -= gd->arch.tlb_size; 430 431 /* round down to next 64 kB limit */ 432 gd->relocaddr &= ~(0x10000 - 1); 433 434 gd->arch.tlb_addr = gd->relocaddr; 435 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 436 gd->arch.tlb_addr + gd->arch.tlb_size); 437 return 0; 438 } 439 #endif 440 441 #ifdef CONFIG_DM_VIDEO 442 static int reserve_video(void) 443 { 444 ulong addr; 445 int ret; 446 447 addr = gd->relocaddr; 448 ret = video_reserve(&addr); 449 if (ret) 450 return ret; 451 gd->relocaddr = addr; 452 453 return 0; 454 } 455 #else 456 457 # ifdef CONFIG_LCD 458 static int reserve_lcd(void) 459 { 460 # ifdef CONFIG_FB_ADDR 461 gd->fb_base = CONFIG_FB_ADDR; 462 # else 463 /* reserve memory for LCD display (always full pages) */ 464 gd->relocaddr = lcd_setmem(gd->relocaddr); 465 gd->fb_base = gd->relocaddr; 466 # endif /* CONFIG_FB_ADDR */ 467 468 return 0; 469 } 470 # endif /* CONFIG_LCD */ 471 472 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 473 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 474 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) 475 static int reserve_legacy_video(void) 476 { 477 /* reserve memory for video display (always full pages) */ 478 gd->relocaddr = video_setmem(gd->relocaddr); 479 gd->fb_base = gd->relocaddr; 480 481 return 0; 482 } 483 # endif 484 #endif /* !CONFIG_DM_VIDEO */ 485 486 static int reserve_trace(void) 487 { 488 #ifdef CONFIG_TRACE 489 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 490 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 491 debug("Reserving %dk for trace data at: %08lx\n", 492 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 493 #endif 494 495 return 0; 496 } 497 498 static int reserve_uboot(void) 499 { 500 /* 501 * reserve memory for U-Boot code, data & bss 502 * round down to next 4 kB limit 503 */ 504 gd->relocaddr -= gd->mon_len; 505 gd->relocaddr &= ~(4096 - 1); 506 #ifdef CONFIG_E500 507 /* round down to next 64 kB limit so that IVPR stays aligned */ 508 gd->relocaddr &= ~(65536 - 1); 509 #endif 510 511 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 512 gd->relocaddr); 513 514 gd->start_addr_sp = gd->relocaddr; 515 516 return 0; 517 } 518 519 #ifndef CONFIG_SPL_BUILD 520 /* reserve memory for malloc() area */ 521 static int reserve_malloc(void) 522 { 523 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 524 debug("Reserving %dk for malloc() at: %08lx\n", 525 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 526 return 0; 527 } 528 529 /* (permanently) allocate a Board Info struct */ 530 static int reserve_board(void) 531 { 532 if (!gd->bd) { 533 gd->start_addr_sp -= sizeof(bd_t); 534 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 535 memset(gd->bd, '\0', sizeof(bd_t)); 536 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 537 sizeof(bd_t), gd->start_addr_sp); 538 } 539 return 0; 540 } 541 #endif 542 543 static int setup_machine(void) 544 { 545 #ifdef CONFIG_MACH_TYPE 546 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 547 #endif 548 return 0; 549 } 550 551 static int reserve_global_data(void) 552 { 553 gd->start_addr_sp -= sizeof(gd_t); 554 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 555 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 556 sizeof(gd_t), gd->start_addr_sp); 557 return 0; 558 } 559 560 static int reserve_fdt(void) 561 { 562 #ifndef CONFIG_OF_EMBED 563 /* 564 * If the device tree is sitting immediately above our image then we 565 * must relocate it. If it is embedded in the data section, then it 566 * will be relocated with other data. 567 */ 568 if (gd->fdt_blob) { 569 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 570 571 gd->start_addr_sp -= gd->fdt_size; 572 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 573 debug("Reserving %lu Bytes for FDT at: %08lx\n", 574 gd->fdt_size, gd->start_addr_sp); 575 } 576 #endif 577 578 return 0; 579 } 580 581 int arch_reserve_stacks(void) 582 { 583 return 0; 584 } 585 586 static int reserve_stacks(void) 587 { 588 /* make stack pointer 16-byte aligned */ 589 gd->start_addr_sp -= 16; 590 gd->start_addr_sp &= ~0xf; 591 592 /* 593 * let the architecture-specific code tailor gd->start_addr_sp and 594 * gd->irq_sp 595 */ 596 return arch_reserve_stacks(); 597 } 598 599 static int display_new_sp(void) 600 { 601 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 602 603 return 0; 604 } 605 606 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS) 607 static int setup_board_part1(void) 608 { 609 bd_t *bd = gd->bd; 610 611 /* 612 * Save local variables to board info struct 613 */ 614 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 615 bd->bi_memsize = gd->ram_size; /* size in bytes */ 616 617 #ifdef CONFIG_SYS_SRAM_BASE 618 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 619 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 620 #endif 621 622 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 623 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 624 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 625 #endif 626 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 627 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 628 #endif 629 #if defined(CONFIG_MPC83xx) 630 bd->bi_immrbar = CONFIG_SYS_IMMR; 631 #endif 632 633 return 0; 634 } 635 #endif 636 637 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 638 static int setup_board_part2(void) 639 { 640 bd_t *bd = gd->bd; 641 642 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 643 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 644 #if defined(CONFIG_CPM2) 645 bd->bi_cpmfreq = gd->arch.cpm_clk; 646 bd->bi_brgfreq = gd->arch.brg_clk; 647 bd->bi_sccfreq = gd->arch.scc_clk; 648 bd->bi_vco = gd->arch.vco_out; 649 #endif /* CONFIG_CPM2 */ 650 #if defined(CONFIG_MPC512X) 651 bd->bi_ipsfreq = gd->arch.ips_clk; 652 #endif /* CONFIG_MPC512X */ 653 #if defined(CONFIG_MPC5xxx) 654 bd->bi_ipbfreq = gd->arch.ipb_clk; 655 bd->bi_pcifreq = gd->pci_clk; 656 #endif /* CONFIG_MPC5xxx */ 657 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 658 bd->bi_pcifreq = gd->pci_clk; 659 #endif 660 #if defined(CONFIG_EXTRA_CLOCK) 661 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 662 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 663 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 664 #endif 665 666 return 0; 667 } 668 #endif 669 670 #ifdef CONFIG_SYS_EXTBDINFO 671 static int setup_board_extra(void) 672 { 673 bd_t *bd = gd->bd; 674 675 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 676 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 677 sizeof(bd->bi_r_version)); 678 679 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 680 bd->bi_plb_busfreq = gd->bus_clk; 681 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 682 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 683 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 684 bd->bi_pci_busfreq = get_PCI_freq(); 685 bd->bi_opbfreq = get_OPB_freq(); 686 #elif defined(CONFIG_XILINX_405) 687 bd->bi_pci_busfreq = get_PCI_freq(); 688 #endif 689 690 return 0; 691 } 692 #endif 693 694 #ifdef CONFIG_POST 695 static int init_post(void) 696 { 697 post_bootmode_init(); 698 post_run(NULL, POST_ROM | post_bootmode_get(0)); 699 700 return 0; 701 } 702 #endif 703 704 static int setup_dram_config(void) 705 { 706 /* Ram is board specific, so move it to board code ... */ 707 dram_init_banksize(); 708 709 return 0; 710 } 711 712 static int reloc_fdt(void) 713 { 714 #ifndef CONFIG_OF_EMBED 715 if (gd->flags & GD_FLG_SKIP_RELOC) 716 return 0; 717 if (gd->new_fdt) { 718 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 719 gd->fdt_blob = gd->new_fdt; 720 } 721 #endif 722 723 return 0; 724 } 725 726 static int setup_reloc(void) 727 { 728 if (gd->flags & GD_FLG_SKIP_RELOC) { 729 debug("Skipping relocation due to flag\n"); 730 return 0; 731 } 732 733 #ifdef CONFIG_SYS_TEXT_BASE 734 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 735 #ifdef CONFIG_M68K 736 /* 737 * On all ColdFire arch cpu, monitor code starts always 738 * just after the default vector table location, so at 0x400 739 */ 740 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 741 #endif 742 #endif 743 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 744 745 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 746 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 747 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 748 gd->start_addr_sp); 749 750 return 0; 751 } 752 753 /* ARM calls relocate_code from its crt0.S */ 754 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 755 756 static int jump_to_copy(void) 757 { 758 if (gd->flags & GD_FLG_SKIP_RELOC) 759 return 0; 760 /* 761 * x86 is special, but in a nice way. It uses a trampoline which 762 * enables the dcache if possible. 763 * 764 * For now, other archs use relocate_code(), which is implemented 765 * similarly for all archs. When we do generic relocation, hopefully 766 * we can make all archs enable the dcache prior to relocation. 767 */ 768 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 769 /* 770 * SDRAM and console are now initialised. The final stack can now 771 * be setup in SDRAM. Code execution will continue in Flash, but 772 * with the stack in SDRAM and Global Data in temporary memory 773 * (CPU cache) 774 */ 775 arch_setup_gd(gd->new_gd); 776 board_init_f_r_trampoline(gd->start_addr_sp); 777 #else 778 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 779 #endif 780 781 return 0; 782 } 783 #endif 784 785 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 786 static int mark_bootstage(void) 787 { 788 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 789 790 return 0; 791 } 792 793 static int initf_console_record(void) 794 { 795 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 796 return console_record_init(); 797 #else 798 return 0; 799 #endif 800 } 801 802 static int initf_dm(void) 803 { 804 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 805 int ret; 806 807 ret = dm_init_and_scan(true); 808 if (ret) 809 return ret; 810 #endif 811 812 return 0; 813 } 814 815 /* Architecture-specific memory reservation */ 816 __weak int reserve_arch(void) 817 { 818 return 0; 819 } 820 821 __weak int arch_cpu_init_dm(void) 822 { 823 return 0; 824 } 825 826 static init_fnc_t init_sequence_f[] = { 827 #ifdef CONFIG_SANDBOX 828 setup_ram_buf, 829 #endif 830 setup_mon_len, 831 #ifdef CONFIG_OF_CONTROL 832 fdtdec_setup, 833 #endif 834 #ifdef CONFIG_TRACE 835 trace_early_init, 836 #endif 837 initf_malloc, 838 initf_console_record, 839 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 840 /* TODO: can this go into arch_cpu_init()? */ 841 probecpu, 842 #endif 843 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) 844 x86_fsp_init, 845 #endif 846 arch_cpu_init, /* basic arch cpu dependent setup */ 847 initf_dm, 848 arch_cpu_init_dm, 849 mark_bootstage, /* need timer, go after init dm */ 850 #if defined(CONFIG_BOARD_EARLY_INIT_F) 851 board_early_init_f, 852 #endif 853 /* TODO: can any of this go into arch_cpu_init()? */ 854 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 855 get_clocks, /* get CPU and bus clocks (etc.) */ 856 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 857 && !defined(CONFIG_TQM885D) 858 adjust_sdram_tbs_8xx, 859 #endif 860 /* TODO: can we rename this to timer_init()? */ 861 init_timebase, 862 #endif 863 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \ 864 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \ 865 defined(CONFIG_SPARC) 866 timer_init, /* initialize timer */ 867 #endif 868 #ifdef CONFIG_SYS_ALLOC_DPRAM 869 #if !defined(CONFIG_CPM2) 870 dpram_init, 871 #endif 872 #endif 873 #if defined(CONFIG_BOARD_POSTCLK_INIT) 874 board_postclk_init, 875 #endif 876 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 877 get_clocks, 878 #endif 879 env_init, /* initialize environment */ 880 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 881 /* get CPU and bus clocks according to the environment variable */ 882 get_clocks_866, 883 /* adjust sdram refresh rate according to the new clock */ 884 sdram_adjust_866, 885 init_timebase, 886 #endif 887 init_baud_rate, /* initialze baudrate settings */ 888 serial_init, /* serial communications setup */ 889 console_init_f, /* stage 1 init of console */ 890 #ifdef CONFIG_SANDBOX 891 sandbox_early_getopt_check, 892 #endif 893 #ifdef CONFIG_OF_CONTROL 894 fdtdec_prepare_fdt, 895 #endif 896 display_options, /* say that we are here */ 897 display_text_info, /* show debugging info if required */ 898 #if defined(CONFIG_MPC8260) 899 prt_8260_rsr, 900 prt_8260_clks, 901 #endif /* CONFIG_MPC8260 */ 902 #if defined(CONFIG_MPC83xx) 903 prt_83xx_rsr, 904 #endif 905 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 906 checkcpu, 907 #endif 908 print_cpuinfo, /* display cpu info (and speed) */ 909 #if defined(CONFIG_MPC5xxx) 910 prt_mpc5xxx_clks, 911 #endif /* CONFIG_MPC5xxx */ 912 #if defined(CONFIG_DISPLAY_BOARDINFO) 913 show_board_info, 914 #endif 915 INIT_FUNC_WATCHDOG_INIT 916 #if defined(CONFIG_MISC_INIT_F) 917 misc_init_f, 918 #endif 919 INIT_FUNC_WATCHDOG_RESET 920 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 921 init_func_i2c, 922 #endif 923 #if defined(CONFIG_HARD_SPI) 924 init_func_spi, 925 #endif 926 announce_dram_init, 927 /* TODO: unify all these dram functions? */ 928 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 929 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) 930 dram_init, /* configure available RAM banks */ 931 #endif 932 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 933 init_func_ram, 934 #endif 935 #ifdef CONFIG_POST 936 post_init_f, 937 #endif 938 INIT_FUNC_WATCHDOG_RESET 939 #if defined(CONFIG_SYS_DRAM_TEST) 940 testdram, 941 #endif /* CONFIG_SYS_DRAM_TEST */ 942 INIT_FUNC_WATCHDOG_RESET 943 944 #ifdef CONFIG_POST 945 init_post, 946 #endif 947 INIT_FUNC_WATCHDOG_RESET 948 /* 949 * Now that we have DRAM mapped and working, we can 950 * relocate the code and continue running from DRAM. 951 * 952 * Reserve memory at end of RAM for (top down in that order): 953 * - area that won't get touched by U-Boot and Linux (optional) 954 * - kernel log buffer 955 * - protected RAM 956 * - LCD framebuffer 957 * - monitor code 958 * - board info struct 959 */ 960 setup_dest_addr, 961 #if defined(CONFIG_BLACKFIN) 962 /* Blackfin u-boot monitor should be on top of the ram */ 963 reserve_uboot, 964 #endif 965 #if defined(CONFIG_SPARC) 966 reserve_prom, 967 #endif 968 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 969 reserve_logbuffer, 970 #endif 971 #ifdef CONFIG_PRAM 972 reserve_pram, 973 #endif 974 reserve_round_4k, 975 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 976 defined(CONFIG_ARM) 977 reserve_mmu, 978 #endif 979 #ifdef CONFIG_DM_VIDEO 980 reserve_video, 981 #else 982 # ifdef CONFIG_LCD 983 reserve_lcd, 984 # endif 985 /* TODO: Why the dependency on CONFIG_8xx? */ 986 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 987 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 988 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) 989 reserve_legacy_video, 990 # endif 991 #endif /* CONFIG_DM_VIDEO */ 992 reserve_trace, 993 #if !defined(CONFIG_BLACKFIN) 994 reserve_uboot, 995 #endif 996 #ifndef CONFIG_SPL_BUILD 997 reserve_malloc, 998 reserve_board, 999 #endif 1000 setup_machine, 1001 reserve_global_data, 1002 reserve_fdt, 1003 reserve_arch, 1004 reserve_stacks, 1005 setup_dram_config, 1006 show_dram_config, 1007 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS) 1008 setup_board_part1, 1009 #endif 1010 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 1011 INIT_FUNC_WATCHDOG_RESET 1012 setup_board_part2, 1013 #endif 1014 display_new_sp, 1015 #ifdef CONFIG_SYS_EXTBDINFO 1016 setup_board_extra, 1017 #endif 1018 INIT_FUNC_WATCHDOG_RESET 1019 reloc_fdt, 1020 setup_reloc, 1021 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1022 copy_uboot_to_ram, 1023 clear_bss, 1024 do_elf_reloc_fixups, 1025 #endif 1026 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 1027 jump_to_copy, 1028 #endif 1029 NULL, 1030 }; 1031 1032 void board_init_f(ulong boot_flags) 1033 { 1034 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 1035 /* 1036 * For some archtectures, global data is initialized and used before 1037 * calling this function. The data should be preserved. For others, 1038 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 1039 * here to host global data until relocation. 1040 */ 1041 gd_t data; 1042 1043 gd = &data; 1044 1045 /* 1046 * Clear global data before it is accessed at debug print 1047 * in initcall_run_list. Otherwise the debug print probably 1048 * get the wrong vaule of gd->have_console. 1049 */ 1050 zero_global_data(); 1051 #endif 1052 1053 gd->flags = boot_flags; 1054 gd->have_console = 0; 1055 1056 if (initcall_run_list(init_sequence_f)) 1057 hang(); 1058 1059 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 1060 !defined(CONFIG_EFI_APP) 1061 /* NOTREACHED - jump_to_copy() does not return */ 1062 hang(); 1063 #endif 1064 } 1065 1066 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1067 /* 1068 * For now this code is only used on x86. 1069 * 1070 * init_sequence_f_r is the list of init functions which are run when 1071 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1072 * The following limitations must be considered when implementing an 1073 * '_f_r' function: 1074 * - 'static' variables are read-only 1075 * - Global Data (gd->xxx) is read/write 1076 * 1077 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1078 * supported). It _should_, if possible, copy global data to RAM and 1079 * initialise the CPU caches (to speed up the relocation process) 1080 * 1081 * NOTE: At present only x86 uses this route, but it is intended that 1082 * all archs will move to this when generic relocation is implemented. 1083 */ 1084 static init_fnc_t init_sequence_f_r[] = { 1085 init_cache_f_r, 1086 1087 NULL, 1088 }; 1089 1090 void board_init_f_r(void) 1091 { 1092 if (initcall_run_list(init_sequence_f_r)) 1093 hang(); 1094 1095 /* 1096 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1097 * Transfer execution from Flash to RAM by calculating the address 1098 * of the in-RAM copy of board_init_r() and calling it 1099 */ 1100 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1101 1102 /* NOTREACHED - board_init_r() does not return */ 1103 hang(); 1104 } 1105 #endif /* CONFIG_X86 */ 1106