1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <environment.h> 17 #include <fdtdec.h> 18 #include <fs.h> 19 #if defined(CONFIG_CMD_IDE) 20 #include <ide.h> 21 #endif 22 #include <i2c.h> 23 #include <initcall.h> 24 #include <logbuff.h> 25 26 /* TODO: Can we move these into arch/ headers? */ 27 #ifdef CONFIG_8xx 28 #include <mpc8xx.h> 29 #endif 30 #ifdef CONFIG_5xx 31 #include <mpc5xx.h> 32 #endif 33 #ifdef CONFIG_MPC5xxx 34 #include <mpc5xxx.h> 35 #endif 36 37 #include <os.h> 38 #include <post.h> 39 #include <spi.h> 40 #include <trace.h> 41 #include <watchdog.h> 42 #include <asm/errno.h> 43 #include <asm/io.h> 44 #ifdef CONFIG_MP 45 #include <asm/mp.h> 46 #endif 47 #include <asm/sections.h> 48 #ifdef CONFIG_X86 49 #include <asm/init_helpers.h> 50 #include <asm/relocate.h> 51 #endif 52 #ifdef CONFIG_SANDBOX 53 #include <asm/state.h> 54 #endif 55 #include <linux/compiler.h> 56 57 /* 58 * Pointer to initial global data area 59 * 60 * Here we initialize it if needed. 61 */ 62 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 63 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 64 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 65 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 66 #else 67 DECLARE_GLOBAL_DATA_PTR; 68 #endif 69 70 /* 71 * sjg: IMO this code should be 72 * refactored to a single function, something like: 73 * 74 * void led_set_state(enum led_colour_t colour, int on); 75 */ 76 /************************************************************************ 77 * Coloured LED functionality 78 ************************************************************************ 79 * May be supplied by boards if desired 80 */ 81 inline void __coloured_LED_init(void) {} 82 void coloured_LED_init(void) 83 __attribute__((weak, alias("__coloured_LED_init"))); 84 inline void __red_led_on(void) {} 85 void red_led_on(void) __attribute__((weak, alias("__red_led_on"))); 86 inline void __red_led_off(void) {} 87 void red_led_off(void) __attribute__((weak, alias("__red_led_off"))); 88 inline void __green_led_on(void) {} 89 void green_led_on(void) __attribute__((weak, alias("__green_led_on"))); 90 inline void __green_led_off(void) {} 91 void green_led_off(void) __attribute__((weak, alias("__green_led_off"))); 92 inline void __yellow_led_on(void) {} 93 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on"))); 94 inline void __yellow_led_off(void) {} 95 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off"))); 96 inline void __blue_led_on(void) {} 97 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on"))); 98 inline void __blue_led_off(void) {} 99 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off"))); 100 101 /* 102 * Why is gd allocated a register? Prior to reloc it might be better to 103 * just pass it around to each function in this file? 104 * 105 * After reloc one could argue that it is hardly used and doesn't need 106 * to be in a register. Or if it is it should perhaps hold pointers to all 107 * global data for all modules, so that post-reloc we can avoid the massive 108 * literal pool we get on ARM. Or perhaps just encourage each module to use 109 * a structure... 110 */ 111 112 /* 113 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 114 */ 115 116 #if defined(CONFIG_WATCHDOG) 117 static int init_func_watchdog_init(void) 118 { 119 puts(" Watchdog enabled\n"); 120 WATCHDOG_RESET(); 121 122 return 0; 123 } 124 125 int init_func_watchdog_reset(void) 126 { 127 WATCHDOG_RESET(); 128 129 return 0; 130 } 131 #endif /* CONFIG_WATCHDOG */ 132 133 void __board_add_ram_info(int use_default) 134 { 135 /* please define platform specific board_add_ram_info() */ 136 } 137 138 void board_add_ram_info(int) 139 __attribute__ ((weak, alias("__board_add_ram_info"))); 140 141 static int init_baud_rate(void) 142 { 143 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 144 return 0; 145 } 146 147 static int display_text_info(void) 148 { 149 #ifndef CONFIG_SANDBOX 150 ulong bss_start, bss_end; 151 152 #ifdef CONFIG_SYS_SYM_OFFSETS 153 bss_start = _bss_start_ofs + _TEXT_BASE; 154 bss_end = _bss_end_ofs + _TEXT_BASE; 155 #else 156 bss_start = (ulong)&__bss_start; 157 bss_end = (ulong)&__bss_end; 158 #endif 159 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n", 160 CONFIG_SYS_TEXT_BASE, bss_start, bss_end); 161 #endif 162 163 #ifdef CONFIG_MODEM_SUPPORT 164 debug("Modem Support enabled\n"); 165 #endif 166 #ifdef CONFIG_USE_IRQ 167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 169 #endif 170 171 return 0; 172 } 173 174 static int announce_dram_init(void) 175 { 176 puts("DRAM: "); 177 return 0; 178 } 179 180 #ifdef CONFIG_PPC 181 static int init_func_ram(void) 182 { 183 #ifdef CONFIG_BOARD_TYPES 184 int board_type = gd->board_type; 185 #else 186 int board_type = 0; /* use dummy arg */ 187 #endif 188 189 gd->ram_size = initdram(board_type); 190 191 if (gd->ram_size > 0) 192 return 0; 193 194 puts("*** failed ***\n"); 195 return 1; 196 } 197 #endif 198 199 static int show_dram_config(void) 200 { 201 ulong size; 202 203 #ifdef CONFIG_NR_DRAM_BANKS 204 int i; 205 206 debug("\nRAM Configuration:\n"); 207 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 208 size += gd->bd->bi_dram[i].size; 209 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); 210 #ifdef DEBUG 211 print_size(gd->bd->bi_dram[i].size, "\n"); 212 #endif 213 } 214 debug("\nDRAM: "); 215 #else 216 size = gd->ram_size; 217 #endif 218 219 print_size(size, ""); 220 board_add_ram_info(0); 221 putc('\n'); 222 223 return 0; 224 } 225 226 ulong get_effective_memsize(void) 227 { 228 #ifndef CONFIG_VERY_BIG_RAM 229 return gd->ram_size; 230 #else 231 /* limit stack to what we can reasonable map */ 232 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ? 233 CONFIG_MAX_MEM_MAPPED : gd->ram_size); 234 #endif 235 } 236 237 void __dram_init_banksize(void) 238 { 239 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 240 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 241 gd->bd->bi_dram[0].size = get_effective_memsize(); 242 #endif 243 } 244 245 void dram_init_banksize(void) 246 __attribute__((weak, alias("__dram_init_banksize"))); 247 248 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 249 static int init_func_i2c(void) 250 { 251 puts("I2C: "); 252 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 253 puts("ready\n"); 254 return 0; 255 } 256 #endif 257 258 #if defined(CONFIG_HARD_SPI) 259 static int init_func_spi(void) 260 { 261 puts("SPI: "); 262 spi_init(); 263 puts("ready\n"); 264 return 0; 265 } 266 #endif 267 268 __maybe_unused 269 static int zero_global_data(void) 270 { 271 memset((void *)gd, '\0', sizeof(gd_t)); 272 273 return 0; 274 } 275 276 static int setup_mon_len(void) 277 { 278 #ifdef CONFIG_SYS_SYM_OFFSETS 279 gd->mon_len = _bss_end_ofs; 280 #elif defined(CONFIG_SANDBOX) 281 gd->mon_len = (ulong)&_end - (ulong)_init; 282 #else 283 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 284 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 285 #endif 286 return 0; 287 } 288 289 __weak int arch_cpu_init(void) 290 { 291 return 0; 292 } 293 294 #ifdef CONFIG_OF_HOSTFILE 295 296 #define CHECK(x) err = (x); if (err) goto failed; 297 298 /* Create an empty device tree blob */ 299 static int make_empty_fdt(void *fdt) 300 { 301 int err; 302 303 CHECK(fdt_create(fdt, 256)); 304 CHECK(fdt_finish_reservemap(fdt)); 305 CHECK(fdt_begin_node(fdt, "")); 306 CHECK(fdt_end_node(fdt)); 307 CHECK(fdt_finish(fdt)); 308 309 return 0; 310 failed: 311 printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); 312 return -EACCES; 313 } 314 315 static int read_fdt_from_file(void) 316 { 317 struct sandbox_state *state = state_get_current(); 318 void *blob; 319 int size; 320 int err; 321 322 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); 323 if (!state->fdt_fname) { 324 err = make_empty_fdt(blob); 325 if (!err) 326 goto done; 327 return err; 328 } 329 err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX); 330 if (err) 331 return err; 332 size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0); 333 if (size < 0) 334 return -EIO; 335 336 done: 337 gd->fdt_blob = blob; 338 339 return 0; 340 } 341 #endif 342 343 #ifdef CONFIG_SANDBOX 344 static int setup_ram_buf(void) 345 { 346 gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE); 347 assert(gd->arch.ram_buf); 348 gd->ram_size = CONFIG_SYS_SDRAM_SIZE; 349 350 return 0; 351 } 352 #endif 353 354 static int setup_fdt(void) 355 { 356 #ifdef CONFIG_OF_EMBED 357 /* Get a pointer to the FDT */ 358 gd->fdt_blob = _binary_dt_dtb_start; 359 #elif defined CONFIG_OF_SEPARATE 360 /* FDT is at end of image */ 361 # ifdef CONFIG_SYS_SYM_OFFSETS 362 gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE); 363 # else 364 gd->fdt_blob = (ulong *)&_end; 365 # endif 366 #elif defined(CONFIG_OF_HOSTFILE) 367 if (read_fdt_from_file()) { 368 puts("Failed to read control FDT\n"); 369 return -1; 370 } 371 #endif 372 /* Allow the early environment to override the fdt address */ 373 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, 374 (uintptr_t)gd->fdt_blob); 375 return 0; 376 } 377 378 /* Get the top of usable RAM */ 379 __weak ulong board_get_usable_ram_top(ulong total_size) 380 { 381 return gd->ram_top; 382 } 383 384 static int setup_dest_addr(void) 385 { 386 debug("Monitor len: %08lX\n", gd->mon_len); 387 /* 388 * Ram is setup, size stored in gd !! 389 */ 390 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 391 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 392 /* 393 * Subtract specified amount of memory to hide so that it won't 394 * get "touched" at all by U-Boot. By fixing up gd->ram_size 395 * the Linux kernel should now get passed the now "corrected" 396 * memory size and won't touch it either. This should work 397 * for arch/ppc and arch/powerpc. Only Linux board ports in 398 * arch/powerpc with bootwrapper support, that recalculate the 399 * memory size from the SDRAM controller setup will have to 400 * get fixed. 401 */ 402 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 403 #endif 404 #ifdef CONFIG_SYS_SDRAM_BASE 405 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 406 #endif 407 gd->ram_top += get_effective_memsize(); 408 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 409 gd->relocaddr = gd->ram_top; 410 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 411 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 412 /* 413 * We need to make sure the location we intend to put secondary core 414 * boot code is reserved and not used by any part of u-boot 415 */ 416 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 417 gd->relocaddr = determine_mp_bootpg(NULL); 418 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 419 } 420 #endif 421 return 0; 422 } 423 424 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 425 static int reserve_logbuffer(void) 426 { 427 /* reserve kernel log buffer */ 428 gd->relocaddr -= LOGBUFF_RESERVE; 429 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 430 gd->relocaddr); 431 return 0; 432 } 433 #endif 434 435 #ifdef CONFIG_PRAM 436 /* reserve protected RAM */ 437 static int reserve_pram(void) 438 { 439 ulong reg; 440 441 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 442 gd->relocaddr -= (reg << 10); /* size is in kB */ 443 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 444 gd->relocaddr); 445 return 0; 446 } 447 #endif /* CONFIG_PRAM */ 448 449 /* Round memory pointer down to next 4 kB limit */ 450 static int reserve_round_4k(void) 451 { 452 gd->relocaddr &= ~(4096 - 1); 453 return 0; 454 } 455 456 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 457 defined(CONFIG_ARM) 458 static int reserve_mmu(void) 459 { 460 /* reserve TLB table */ 461 gd->arch.tlb_size = 4096 * 4; 462 gd->relocaddr -= gd->arch.tlb_size; 463 464 /* round down to next 64 kB limit */ 465 gd->relocaddr &= ~(0x10000 - 1); 466 467 gd->arch.tlb_addr = gd->relocaddr; 468 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 469 gd->arch.tlb_addr + gd->arch.tlb_size); 470 return 0; 471 } 472 #endif 473 474 #ifdef CONFIG_LCD 475 static int reserve_lcd(void) 476 { 477 #ifdef CONFIG_FB_ADDR 478 gd->fb_base = CONFIG_FB_ADDR; 479 #else 480 /* reserve memory for LCD display (always full pages) */ 481 gd->relocaddr = lcd_setmem(gd->relocaddr); 482 gd->fb_base = gd->relocaddr; 483 #endif /* CONFIG_FB_ADDR */ 484 return 0; 485 } 486 #endif /* CONFIG_LCD */ 487 488 static int reserve_trace(void) 489 { 490 #ifdef CONFIG_TRACE 491 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 492 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 493 debug("Reserving %dk for trace data at: %08lx\n", 494 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 495 #endif 496 497 return 0; 498 } 499 500 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ 501 && !defined(CONFIG_ARM) && !defined(CONFIG_X86) 502 static int reserve_video(void) 503 { 504 /* reserve memory for video display (always full pages) */ 505 gd->relocaddr = video_setmem(gd->relocaddr); 506 gd->fb_base = gd->relocaddr; 507 508 return 0; 509 } 510 #endif 511 512 static int reserve_uboot(void) 513 { 514 /* 515 * reserve memory for U-Boot code, data & bss 516 * round down to next 4 kB limit 517 */ 518 gd->relocaddr -= gd->mon_len; 519 gd->relocaddr &= ~(4096 - 1); 520 #ifdef CONFIG_E500 521 /* round down to next 64 kB limit so that IVPR stays aligned */ 522 gd->relocaddr &= ~(65536 - 1); 523 #endif 524 525 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 526 gd->relocaddr); 527 528 gd->start_addr_sp = gd->relocaddr; 529 530 return 0; 531 } 532 533 #ifndef CONFIG_SPL_BUILD 534 /* reserve memory for malloc() area */ 535 static int reserve_malloc(void) 536 { 537 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 538 debug("Reserving %dk for malloc() at: %08lx\n", 539 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 540 return 0; 541 } 542 543 /* (permanently) allocate a Board Info struct */ 544 static int reserve_board(void) 545 { 546 gd->start_addr_sp -= sizeof(bd_t); 547 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 548 memset(gd->bd, '\0', sizeof(bd_t)); 549 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 550 sizeof(bd_t), gd->start_addr_sp); 551 return 0; 552 } 553 #endif 554 555 static int setup_machine(void) 556 { 557 #ifdef CONFIG_MACH_TYPE 558 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 559 #endif 560 return 0; 561 } 562 563 static int reserve_global_data(void) 564 { 565 gd->start_addr_sp -= sizeof(gd_t); 566 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 567 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 568 sizeof(gd_t), gd->start_addr_sp); 569 return 0; 570 } 571 572 static int reserve_fdt(void) 573 { 574 /* 575 * If the device tree is sitting immediate above our image then we 576 * must relocate it. If it is embedded in the data section, then it 577 * will be relocated with other data. 578 */ 579 if (gd->fdt_blob) { 580 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 581 582 gd->start_addr_sp -= gd->fdt_size; 583 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 584 debug("Reserving %lu Bytes for FDT at: %08lx\n", 585 gd->fdt_size, gd->start_addr_sp); 586 } 587 588 return 0; 589 } 590 591 static int reserve_stacks(void) 592 { 593 #ifdef CONFIG_SPL_BUILD 594 # ifdef CONFIG_ARM 595 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */ 596 gd->irq_sp = gd->start_addr_sp; 597 # endif 598 #else 599 # ifdef CONFIG_PPC 600 ulong *s; 601 # endif 602 603 /* setup stack pointer for exceptions */ 604 gd->start_addr_sp -= 16; 605 gd->start_addr_sp &= ~0xf; 606 gd->irq_sp = gd->start_addr_sp; 607 608 /* 609 * Handle architecture-specific things here 610 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() 611 * to handle this and put in arch/xxx/lib/stack.c 612 */ 613 # ifdef CONFIG_ARM 614 # ifdef CONFIG_USE_IRQ 615 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); 616 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", 617 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp); 618 619 /* 8-byte alignment for ARM ABI compliance */ 620 gd->start_addr_sp &= ~0x07; 621 # endif 622 /* leave 3 words for abort-stack, plus 1 for alignment */ 623 gd->start_addr_sp -= 16; 624 # elif defined(CONFIG_PPC) 625 /* Clear initial stack frame */ 626 s = (ulong *) gd->start_addr_sp; 627 *s = 0; /* Terminate back chain */ 628 *++s = 0; /* NULL return address */ 629 # endif /* Architecture specific code */ 630 631 return 0; 632 #endif 633 } 634 635 static int display_new_sp(void) 636 { 637 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 638 639 return 0; 640 } 641 642 #ifdef CONFIG_PPC 643 static int setup_board_part1(void) 644 { 645 bd_t *bd = gd->bd; 646 647 /* 648 * Save local variables to board info struct 649 */ 650 651 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 652 bd->bi_memsize = gd->ram_size; /* size in bytes */ 653 654 #ifdef CONFIG_SYS_SRAM_BASE 655 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 656 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 657 #endif 658 659 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ 660 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 661 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 662 #endif 663 #if defined(CONFIG_MPC5xxx) 664 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 665 #endif 666 #if defined(CONFIG_MPC83xx) 667 bd->bi_immrbar = CONFIG_SYS_IMMR; 668 #endif 669 670 return 0; 671 } 672 673 static int setup_board_part2(void) 674 { 675 bd_t *bd = gd->bd; 676 677 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 678 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 679 #if defined(CONFIG_CPM2) 680 bd->bi_cpmfreq = gd->arch.cpm_clk; 681 bd->bi_brgfreq = gd->arch.brg_clk; 682 bd->bi_sccfreq = gd->arch.scc_clk; 683 bd->bi_vco = gd->arch.vco_out; 684 #endif /* CONFIG_CPM2 */ 685 #if defined(CONFIG_MPC512X) 686 bd->bi_ipsfreq = gd->arch.ips_clk; 687 #endif /* CONFIG_MPC512X */ 688 #if defined(CONFIG_MPC5xxx) 689 bd->bi_ipbfreq = gd->arch.ipb_clk; 690 bd->bi_pcifreq = gd->pci_clk; 691 #endif /* CONFIG_MPC5xxx */ 692 693 return 0; 694 } 695 #endif 696 697 #ifdef CONFIG_SYS_EXTBDINFO 698 static int setup_board_extra(void) 699 { 700 bd_t *bd = gd->bd; 701 702 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 703 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 704 sizeof(bd->bi_r_version)); 705 706 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 707 bd->bi_plb_busfreq = gd->bus_clk; 708 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 709 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 710 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 711 bd->bi_pci_busfreq = get_PCI_freq(); 712 bd->bi_opbfreq = get_OPB_freq(); 713 #elif defined(CONFIG_XILINX_405) 714 bd->bi_pci_busfreq = get_PCI_freq(); 715 #endif 716 717 return 0; 718 } 719 #endif 720 721 #ifdef CONFIG_POST 722 static int init_post(void) 723 { 724 post_bootmode_init(); 725 post_run(NULL, POST_ROM | post_bootmode_get(0)); 726 727 return 0; 728 } 729 #endif 730 731 static int setup_baud_rate(void) 732 { 733 /* Ick, can we get rid of this line? */ 734 gd->bd->bi_baudrate = gd->baudrate; 735 736 return 0; 737 } 738 739 static int setup_dram_config(void) 740 { 741 /* Ram is board specific, so move it to board code ... */ 742 dram_init_banksize(); 743 744 return 0; 745 } 746 747 static int reloc_fdt(void) 748 { 749 if (gd->new_fdt) { 750 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 751 gd->fdt_blob = gd->new_fdt; 752 } 753 754 return 0; 755 } 756 757 static int setup_reloc(void) 758 { 759 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 760 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 761 762 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 763 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 764 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 765 gd->start_addr_sp); 766 767 return 0; 768 } 769 770 /* ARM calls relocate_code from its crt0.S */ 771 #if !defined(CONFIG_ARM) 772 773 static int jump_to_copy(void) 774 { 775 /* 776 * x86 is special, but in a nice way. It uses a trampoline which 777 * enables the dcache if possible. 778 * 779 * For now, other archs use relocate_code(), which is implemented 780 * similarly for all archs. When we do generic relocation, hopefully 781 * we can make all archs enable the dcache prior to relocation. 782 */ 783 #ifdef CONFIG_X86 784 /* 785 * SDRAM and console are now initialised. The final stack can now 786 * be setup in SDRAM. Code execution will continue in Flash, but 787 * with the stack in SDRAM and Global Data in temporary memory 788 * (CPU cache) 789 */ 790 board_init_f_r_trampoline(gd->start_addr_sp); 791 #elif defined(CONFIG_SANDBOX) 792 board_init_r(gd->new_gd, 0); 793 #else 794 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 795 #endif 796 797 return 0; 798 } 799 #endif 800 801 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 802 static int mark_bootstage(void) 803 { 804 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 805 806 return 0; 807 } 808 809 static init_fnc_t init_sequence_f[] = { 810 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ 811 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ 812 !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86) 813 zero_global_data, 814 #endif 815 #ifdef CONFIG_SANDBOX 816 setup_ram_buf, 817 #endif 818 setup_mon_len, 819 setup_fdt, 820 trace_early_init, 821 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 822 /* TODO: can this go into arch_cpu_init()? */ 823 probecpu, 824 #endif 825 arch_cpu_init, /* basic arch cpu dependent setup */ 826 #ifdef CONFIG_X86 827 cpu_init_f, /* TODO(sjg@chromium.org): remove */ 828 # ifdef CONFIG_OF_CONTROL 829 find_fdt, /* TODO(sjg@chromium.org): remove */ 830 # endif 831 #endif 832 mark_bootstage, 833 #ifdef CONFIG_OF_CONTROL 834 fdtdec_check_fdt, 835 #endif 836 #if defined(CONFIG_BOARD_EARLY_INIT_F) 837 board_early_init_f, 838 #endif 839 /* TODO: can any of this go into arch_cpu_init()? */ 840 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 841 get_clocks, /* get CPU and bus clocks (etc.) */ 842 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 843 && !defined(CONFIG_TQM885D) 844 adjust_sdram_tbs_8xx, 845 #endif 846 /* TODO: can we rename this to timer_init()? */ 847 init_timebase, 848 #endif 849 #ifdef CONFIG_ARM 850 timer_init, /* initialize timer */ 851 #endif 852 #ifdef CONFIG_SYS_ALLOC_DPRAM 853 #if !defined(CONFIG_CPM2) 854 dpram_init, 855 #endif 856 #endif 857 #if defined(CONFIG_BOARD_POSTCLK_INIT) 858 board_postclk_init, 859 #endif 860 #ifdef CONFIG_FSL_ESDHC 861 get_clocks, 862 #endif 863 env_init, /* initialize environment */ 864 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 865 /* get CPU and bus clocks according to the environment variable */ 866 get_clocks_866, 867 /* adjust sdram refresh rate according to the new clock */ 868 sdram_adjust_866, 869 init_timebase, 870 #endif 871 init_baud_rate, /* initialze baudrate settings */ 872 serial_init, /* serial communications setup */ 873 console_init_f, /* stage 1 init of console */ 874 #ifdef CONFIG_SANDBOX 875 sandbox_early_getopt_check, 876 #endif 877 #ifdef CONFIG_OF_CONTROL 878 fdtdec_prepare_fdt, 879 #endif 880 display_options, /* say that we are here */ 881 display_text_info, /* show debugging info if required */ 882 #if defined(CONFIG_8260) 883 prt_8260_rsr, 884 prt_8260_clks, 885 #endif /* CONFIG_8260 */ 886 #if defined(CONFIG_MPC83xx) 887 prt_83xx_rsr, 888 #endif 889 #ifdef CONFIG_PPC 890 checkcpu, 891 #endif 892 #if defined(CONFIG_DISPLAY_CPUINFO) 893 print_cpuinfo, /* display cpu info (and speed) */ 894 #endif 895 #if defined(CONFIG_MPC5xxx) 896 prt_mpc5xxx_clks, 897 #endif /* CONFIG_MPC5xxx */ 898 #if defined(CONFIG_DISPLAY_BOARDINFO) 899 checkboard, /* display board info */ 900 #endif 901 INIT_FUNC_WATCHDOG_INIT 902 #if defined(CONFIG_MISC_INIT_F) 903 misc_init_f, 904 #endif 905 INIT_FUNC_WATCHDOG_RESET 906 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 907 init_func_i2c, 908 #endif 909 #if defined(CONFIG_HARD_SPI) 910 init_func_spi, 911 #endif 912 #ifdef CONFIG_X86 913 dram_init_f, /* configure available RAM banks */ 914 calculate_relocation_address, 915 #endif 916 announce_dram_init, 917 /* TODO: unify all these dram functions? */ 918 #ifdef CONFIG_ARM 919 dram_init, /* configure available RAM banks */ 920 #endif 921 #ifdef CONFIG_PPC 922 init_func_ram, 923 #endif 924 #ifdef CONFIG_POST 925 post_init_f, 926 #endif 927 INIT_FUNC_WATCHDOG_RESET 928 #if defined(CONFIG_SYS_DRAM_TEST) 929 testdram, 930 #endif /* CONFIG_SYS_DRAM_TEST */ 931 INIT_FUNC_WATCHDOG_RESET 932 933 #ifdef CONFIG_POST 934 init_post, 935 #endif 936 INIT_FUNC_WATCHDOG_RESET 937 /* 938 * Now that we have DRAM mapped and working, we can 939 * relocate the code and continue running from DRAM. 940 * 941 * Reserve memory at end of RAM for (top down in that order): 942 * - area that won't get touched by U-Boot and Linux (optional) 943 * - kernel log buffer 944 * - protected RAM 945 * - LCD framebuffer 946 * - monitor code 947 * - board info struct 948 */ 949 setup_dest_addr, 950 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 951 reserve_logbuffer, 952 #endif 953 #ifdef CONFIG_PRAM 954 reserve_pram, 955 #endif 956 reserve_round_4k, 957 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 958 defined(CONFIG_ARM) 959 reserve_mmu, 960 #endif 961 #ifdef CONFIG_LCD 962 reserve_lcd, 963 #endif 964 reserve_trace, 965 /* TODO: Why the dependency on CONFIG_8xx? */ 966 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ 967 && !defined(CONFIG_ARM) && !defined(CONFIG_X86) 968 reserve_video, 969 #endif 970 reserve_uboot, 971 #ifndef CONFIG_SPL_BUILD 972 reserve_malloc, 973 reserve_board, 974 #endif 975 setup_machine, 976 reserve_global_data, 977 reserve_fdt, 978 reserve_stacks, 979 setup_dram_config, 980 show_dram_config, 981 #ifdef CONFIG_PPC 982 setup_board_part1, 983 INIT_FUNC_WATCHDOG_RESET 984 setup_board_part2, 985 #endif 986 setup_baud_rate, 987 display_new_sp, 988 #ifdef CONFIG_SYS_EXTBDINFO 989 setup_board_extra, 990 #endif 991 INIT_FUNC_WATCHDOG_RESET 992 reloc_fdt, 993 setup_reloc, 994 #ifndef CONFIG_ARM 995 jump_to_copy, 996 #endif 997 NULL, 998 }; 999 1000 void board_init_f(ulong boot_flags) 1001 { 1002 #ifndef CONFIG_X86 1003 gd_t data; 1004 1005 gd = &data; 1006 #endif 1007 1008 gd->flags = boot_flags; 1009 1010 if (initcall_run_list(init_sequence_f)) 1011 hang(); 1012 1013 #ifndef CONFIG_ARM 1014 /* NOTREACHED - jump_to_copy() does not return */ 1015 hang(); 1016 #endif 1017 } 1018 1019 #ifdef CONFIG_X86 1020 /* 1021 * For now this code is only used on x86. 1022 * 1023 * init_sequence_f_r is the list of init functions which are run when 1024 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1025 * The following limitations must be considered when implementing an 1026 * '_f_r' function: 1027 * - 'static' variables are read-only 1028 * - Global Data (gd->xxx) is read/write 1029 * 1030 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1031 * supported). It _should_, if possible, copy global data to RAM and 1032 * initialise the CPU caches (to speed up the relocation process) 1033 * 1034 * NOTE: At present only x86 uses this route, but it is intended that 1035 * all archs will move to this when generic relocation is implemented. 1036 */ 1037 static init_fnc_t init_sequence_f_r[] = { 1038 init_cache_f_r, 1039 copy_uboot_to_ram, 1040 clear_bss, 1041 do_elf_reloc_fixups, 1042 1043 NULL, 1044 }; 1045 1046 void board_init_f_r(void) 1047 { 1048 if (initcall_run_list(init_sequence_f_r)) 1049 hang(); 1050 1051 /* 1052 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1053 * Transfer execution from Flash to RAM by calculating the address 1054 * of the in-RAM copy of board_init_r() and calling it 1055 */ 1056 (board_init_r + gd->reloc_off)(gd, gd->relocaddr); 1057 1058 /* NOTREACHED - board_init_r() does not return */ 1059 hang(); 1060 } 1061 #endif /* CONFIG_X86 */ 1062