1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <console.h> 17 #include <environment.h> 18 #include <dm.h> 19 #include <fdtdec.h> 20 #include <fs.h> 21 #if defined(CONFIG_CMD_IDE) 22 #include <ide.h> 23 #endif 24 #include <i2c.h> 25 #include <initcall.h> 26 #include <logbuff.h> 27 #include <malloc.h> 28 #include <mapmem.h> 29 30 /* TODO: Can we move these into arch/ headers? */ 31 #ifdef CONFIG_8xx 32 #include <mpc8xx.h> 33 #endif 34 #ifdef CONFIG_5xx 35 #include <mpc5xx.h> 36 #endif 37 #ifdef CONFIG_MPC5xxx 38 #include <mpc5xxx.h> 39 #endif 40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 41 #include <asm/mp.h> 42 #endif 43 44 #include <os.h> 45 #include <post.h> 46 #include <spi.h> 47 #include <status_led.h> 48 #include <timer.h> 49 #include <trace.h> 50 #include <video.h> 51 #include <watchdog.h> 52 #include <linux/errno.h> 53 #include <asm/io.h> 54 #include <asm/sections.h> 55 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 56 #include <asm/init_helpers.h> 57 #endif 58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 59 #include <asm/relocate.h> 60 #endif 61 #include <dm/root.h> 62 #include <linux/compiler.h> 63 64 /* 65 * Pointer to initial global data area 66 * 67 * Here we initialize it if needed. 68 */ 69 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 70 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 71 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 72 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 73 #else 74 DECLARE_GLOBAL_DATA_PTR; 75 #endif 76 77 /* 78 * TODO(sjg@chromium.org): IMO this code should be 79 * refactored to a single function, something like: 80 * 81 * void led_set_state(enum led_colour_t colour, int on); 82 */ 83 /************************************************************************ 84 * Coloured LED functionality 85 ************************************************************************ 86 * May be supplied by boards if desired 87 */ 88 __weak void coloured_LED_init(void) {} 89 __weak void red_led_on(void) {} 90 __weak void red_led_off(void) {} 91 __weak void green_led_on(void) {} 92 __weak void green_led_off(void) {} 93 __weak void yellow_led_on(void) {} 94 __weak void yellow_led_off(void) {} 95 __weak void blue_led_on(void) {} 96 __weak void blue_led_off(void) {} 97 98 /* 99 * Why is gd allocated a register? Prior to reloc it might be better to 100 * just pass it around to each function in this file? 101 * 102 * After reloc one could argue that it is hardly used and doesn't need 103 * to be in a register. Or if it is it should perhaps hold pointers to all 104 * global data for all modules, so that post-reloc we can avoid the massive 105 * literal pool we get on ARM. Or perhaps just encourage each module to use 106 * a structure... 107 */ 108 109 /* 110 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 111 */ 112 113 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 114 static int init_func_watchdog_init(void) 115 { 116 # if defined(CONFIG_HW_WATCHDOG) && \ 117 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 118 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 119 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 120 defined(CONFIG_IMX_WATCHDOG)) 121 hw_watchdog_init(); 122 puts(" Watchdog enabled\n"); 123 # endif 124 WATCHDOG_RESET(); 125 126 return 0; 127 } 128 129 int init_func_watchdog_reset(void) 130 { 131 WATCHDOG_RESET(); 132 133 return 0; 134 } 135 #endif /* CONFIG_WATCHDOG */ 136 137 __weak void board_add_ram_info(int use_default) 138 { 139 /* please define platform specific board_add_ram_info() */ 140 } 141 142 static int init_baud_rate(void) 143 { 144 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 145 return 0; 146 } 147 148 static int display_text_info(void) 149 { 150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 151 ulong bss_start, bss_end, text_base; 152 153 bss_start = (ulong)&__bss_start; 154 bss_end = (ulong)&__bss_end; 155 156 #ifdef CONFIG_SYS_TEXT_BASE 157 text_base = CONFIG_SYS_TEXT_BASE; 158 #else 159 text_base = CONFIG_SYS_MONITOR_BASE; 160 #endif 161 162 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 163 text_base, bss_start, bss_end); 164 #endif 165 166 #ifdef CONFIG_USE_IRQ 167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 169 #endif 170 171 return 0; 172 } 173 174 static int announce_dram_init(void) 175 { 176 puts("DRAM: "); 177 return 0; 178 } 179 180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 181 static int init_func_ram(void) 182 { 183 #ifdef CONFIG_BOARD_TYPES 184 int board_type = gd->board_type; 185 #else 186 int board_type = 0; /* use dummy arg */ 187 #endif 188 189 gd->ram_size = initdram(board_type); 190 191 if (gd->ram_size > 0) 192 return 0; 193 194 puts("*** failed ***\n"); 195 return 1; 196 } 197 #endif 198 199 static int show_dram_config(void) 200 { 201 unsigned long long size; 202 203 #ifdef CONFIG_NR_DRAM_BANKS 204 int i; 205 206 debug("\nRAM Configuration:\n"); 207 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 208 size += gd->bd->bi_dram[i].size; 209 debug("Bank #%d: %llx ", i, 210 (unsigned long long)(gd->bd->bi_dram[i].start)); 211 #ifdef DEBUG 212 print_size(gd->bd->bi_dram[i].size, "\n"); 213 #endif 214 } 215 debug("\nDRAM: "); 216 #else 217 size = gd->ram_size; 218 #endif 219 220 print_size(size, ""); 221 board_add_ram_info(0); 222 putc('\n'); 223 224 return 0; 225 } 226 227 __weak void dram_init_banksize(void) 228 { 229 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 230 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 231 gd->bd->bi_dram[0].size = get_effective_memsize(); 232 #endif 233 } 234 235 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 236 static int init_func_i2c(void) 237 { 238 puts("I2C: "); 239 #ifdef CONFIG_SYS_I2C 240 i2c_init_all(); 241 #else 242 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 243 #endif 244 puts("ready\n"); 245 return 0; 246 } 247 #endif 248 249 #if defined(CONFIG_HARD_SPI) 250 static int init_func_spi(void) 251 { 252 puts("SPI: "); 253 spi_init(); 254 puts("ready\n"); 255 return 0; 256 } 257 #endif 258 259 __maybe_unused 260 static int zero_global_data(void) 261 { 262 memset((void *)gd, '\0', sizeof(gd_t)); 263 264 return 0; 265 } 266 267 static int setup_mon_len(void) 268 { 269 #if defined(__ARM__) || defined(__MICROBLAZE__) 270 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 271 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 272 gd->mon_len = (ulong)&_end - (ulong)_init; 273 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 274 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 275 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 276 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 277 #elif defined(CONFIG_SYS_MONITOR_BASE) 278 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 279 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 280 #endif 281 return 0; 282 } 283 284 __weak int arch_cpu_init(void) 285 { 286 return 0; 287 } 288 289 __weak int mach_cpu_init(void) 290 { 291 return 0; 292 } 293 294 /* Get the top of usable RAM */ 295 __weak ulong board_get_usable_ram_top(ulong total_size) 296 { 297 #ifdef CONFIG_SYS_SDRAM_BASE 298 /* 299 * Detect whether we have so much RAM that it goes past the end of our 300 * 32-bit address space. If so, clip the usable RAM so it doesn't. 301 */ 302 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 303 /* 304 * Will wrap back to top of 32-bit space when reservations 305 * are made. 306 */ 307 return 0; 308 #endif 309 return gd->ram_top; 310 } 311 312 static int setup_dest_addr(void) 313 { 314 debug("Monitor len: %08lX\n", gd->mon_len); 315 /* 316 * Ram is setup, size stored in gd !! 317 */ 318 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 319 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 320 /* 321 * Subtract specified amount of memory to hide so that it won't 322 * get "touched" at all by U-Boot. By fixing up gd->ram_size 323 * the Linux kernel should now get passed the now "corrected" 324 * memory size and won't touch it either. This should work 325 * for arch/ppc and arch/powerpc. Only Linux board ports in 326 * arch/powerpc with bootwrapper support, that recalculate the 327 * memory size from the SDRAM controller setup will have to 328 * get fixed. 329 */ 330 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 331 #endif 332 #ifdef CONFIG_SYS_SDRAM_BASE 333 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 334 #endif 335 gd->ram_top += get_effective_memsize(); 336 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 337 gd->relocaddr = gd->ram_top; 338 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 339 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 340 /* 341 * We need to make sure the location we intend to put secondary core 342 * boot code is reserved and not used by any part of u-boot 343 */ 344 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 345 gd->relocaddr = determine_mp_bootpg(NULL); 346 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 347 } 348 #endif 349 return 0; 350 } 351 352 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 353 static int reserve_logbuffer(void) 354 { 355 /* reserve kernel log buffer */ 356 gd->relocaddr -= LOGBUFF_RESERVE; 357 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 358 gd->relocaddr); 359 return 0; 360 } 361 #endif 362 363 #ifdef CONFIG_PRAM 364 /* reserve protected RAM */ 365 static int reserve_pram(void) 366 { 367 ulong reg; 368 369 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 370 gd->relocaddr -= (reg << 10); /* size is in kB */ 371 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 372 gd->relocaddr); 373 return 0; 374 } 375 #endif /* CONFIG_PRAM */ 376 377 /* Round memory pointer down to next 4 kB limit */ 378 static int reserve_round_4k(void) 379 { 380 gd->relocaddr &= ~(4096 - 1); 381 return 0; 382 } 383 384 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 385 defined(CONFIG_ARM) 386 static int reserve_mmu(void) 387 { 388 /* reserve TLB table */ 389 gd->arch.tlb_size = PGTABLE_SIZE; 390 gd->relocaddr -= gd->arch.tlb_size; 391 392 /* round down to next 64 kB limit */ 393 gd->relocaddr &= ~(0x10000 - 1); 394 395 gd->arch.tlb_addr = gd->relocaddr; 396 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 397 gd->arch.tlb_addr + gd->arch.tlb_size); 398 399 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 400 /* 401 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 402 * with location within secure ram. 403 */ 404 gd->arch.tlb_allocated = gd->arch.tlb_addr; 405 #endif 406 407 return 0; 408 } 409 #endif 410 411 #ifdef CONFIG_DM_VIDEO 412 static int reserve_video(void) 413 { 414 ulong addr; 415 int ret; 416 417 addr = gd->relocaddr; 418 ret = video_reserve(&addr); 419 if (ret) 420 return ret; 421 gd->relocaddr = addr; 422 423 return 0; 424 } 425 #else 426 427 # ifdef CONFIG_LCD 428 static int reserve_lcd(void) 429 { 430 # ifdef CONFIG_FB_ADDR 431 gd->fb_base = CONFIG_FB_ADDR; 432 # else 433 /* reserve memory for LCD display (always full pages) */ 434 gd->relocaddr = lcd_setmem(gd->relocaddr); 435 gd->fb_base = gd->relocaddr; 436 # endif /* CONFIG_FB_ADDR */ 437 438 return 0; 439 } 440 # endif /* CONFIG_LCD */ 441 442 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 443 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 444 !defined(CONFIG_M68K) 445 static int reserve_legacy_video(void) 446 { 447 /* reserve memory for video display (always full pages) */ 448 gd->relocaddr = video_setmem(gd->relocaddr); 449 gd->fb_base = gd->relocaddr; 450 451 return 0; 452 } 453 # endif 454 #endif /* !CONFIG_DM_VIDEO */ 455 456 static int reserve_trace(void) 457 { 458 #ifdef CONFIG_TRACE 459 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 460 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 461 debug("Reserving %dk for trace data at: %08lx\n", 462 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 463 #endif 464 465 return 0; 466 } 467 468 static int reserve_uboot(void) 469 { 470 /* 471 * reserve memory for U-Boot code, data & bss 472 * round down to next 4 kB limit 473 */ 474 gd->relocaddr -= gd->mon_len; 475 gd->relocaddr &= ~(4096 - 1); 476 #ifdef CONFIG_E500 477 /* round down to next 64 kB limit so that IVPR stays aligned */ 478 gd->relocaddr &= ~(65536 - 1); 479 #endif 480 481 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 482 gd->relocaddr); 483 484 gd->start_addr_sp = gd->relocaddr; 485 486 return 0; 487 } 488 489 #ifndef CONFIG_SPL_BUILD 490 /* reserve memory for malloc() area */ 491 static int reserve_malloc(void) 492 { 493 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 494 debug("Reserving %dk for malloc() at: %08lx\n", 495 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 496 return 0; 497 } 498 499 /* (permanently) allocate a Board Info struct */ 500 static int reserve_board(void) 501 { 502 if (!gd->bd) { 503 gd->start_addr_sp -= sizeof(bd_t); 504 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 505 memset(gd->bd, '\0', sizeof(bd_t)); 506 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 507 sizeof(bd_t), gd->start_addr_sp); 508 } 509 return 0; 510 } 511 #endif 512 513 static int setup_machine(void) 514 { 515 #ifdef CONFIG_MACH_TYPE 516 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 517 #endif 518 return 0; 519 } 520 521 static int reserve_global_data(void) 522 { 523 gd->start_addr_sp -= sizeof(gd_t); 524 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 525 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 526 sizeof(gd_t), gd->start_addr_sp); 527 return 0; 528 } 529 530 static int reserve_fdt(void) 531 { 532 #ifndef CONFIG_OF_EMBED 533 /* 534 * If the device tree is sitting immediately above our image then we 535 * must relocate it. If it is embedded in the data section, then it 536 * will be relocated with other data. 537 */ 538 if (gd->fdt_blob) { 539 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 540 541 gd->start_addr_sp -= gd->fdt_size; 542 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 543 debug("Reserving %lu Bytes for FDT at: %08lx\n", 544 gd->fdt_size, gd->start_addr_sp); 545 } 546 #endif 547 548 return 0; 549 } 550 551 int arch_reserve_stacks(void) 552 { 553 return 0; 554 } 555 556 static int reserve_stacks(void) 557 { 558 /* make stack pointer 16-byte aligned */ 559 gd->start_addr_sp -= 16; 560 gd->start_addr_sp &= ~0xf; 561 562 /* 563 * let the architecture-specific code tailor gd->start_addr_sp and 564 * gd->irq_sp 565 */ 566 return arch_reserve_stacks(); 567 } 568 569 static int display_new_sp(void) 570 { 571 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 572 573 return 0; 574 } 575 576 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 577 defined(CONFIG_SH) 578 static int setup_board_part1(void) 579 { 580 bd_t *bd = gd->bd; 581 582 /* 583 * Save local variables to board info struct 584 */ 585 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 586 bd->bi_memsize = gd->ram_size; /* size in bytes */ 587 588 #ifdef CONFIG_SYS_SRAM_BASE 589 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 590 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 591 #endif 592 593 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 594 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 595 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 596 #endif 597 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 598 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 599 #endif 600 #if defined(CONFIG_MPC83xx) 601 bd->bi_immrbar = CONFIG_SYS_IMMR; 602 #endif 603 604 return 0; 605 } 606 #endif 607 608 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 609 static int setup_board_part2(void) 610 { 611 bd_t *bd = gd->bd; 612 613 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 614 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 615 #if defined(CONFIG_CPM2) 616 bd->bi_cpmfreq = gd->arch.cpm_clk; 617 bd->bi_brgfreq = gd->arch.brg_clk; 618 bd->bi_sccfreq = gd->arch.scc_clk; 619 bd->bi_vco = gd->arch.vco_out; 620 #endif /* CONFIG_CPM2 */ 621 #if defined(CONFIG_MPC512X) 622 bd->bi_ipsfreq = gd->arch.ips_clk; 623 #endif /* CONFIG_MPC512X */ 624 #if defined(CONFIG_MPC5xxx) 625 bd->bi_ipbfreq = gd->arch.ipb_clk; 626 bd->bi_pcifreq = gd->pci_clk; 627 #endif /* CONFIG_MPC5xxx */ 628 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 629 bd->bi_pcifreq = gd->pci_clk; 630 #endif 631 #if defined(CONFIG_EXTRA_CLOCK) 632 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 633 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 634 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 635 #endif 636 637 return 0; 638 } 639 #endif 640 641 #ifdef CONFIG_SYS_EXTBDINFO 642 static int setup_board_extra(void) 643 { 644 bd_t *bd = gd->bd; 645 646 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 647 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 648 sizeof(bd->bi_r_version)); 649 650 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 651 bd->bi_plb_busfreq = gd->bus_clk; 652 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 653 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 654 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 655 bd->bi_pci_busfreq = get_PCI_freq(); 656 bd->bi_opbfreq = get_OPB_freq(); 657 #elif defined(CONFIG_XILINX_405) 658 bd->bi_pci_busfreq = get_PCI_freq(); 659 #endif 660 661 return 0; 662 } 663 #endif 664 665 #ifdef CONFIG_POST 666 static int init_post(void) 667 { 668 post_bootmode_init(); 669 post_run(NULL, POST_ROM | post_bootmode_get(0)); 670 671 return 0; 672 } 673 #endif 674 675 static int setup_dram_config(void) 676 { 677 /* Ram is board specific, so move it to board code ... */ 678 dram_init_banksize(); 679 680 return 0; 681 } 682 683 static int reloc_fdt(void) 684 { 685 #ifndef CONFIG_OF_EMBED 686 if (gd->flags & GD_FLG_SKIP_RELOC) 687 return 0; 688 if (gd->new_fdt) { 689 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 690 gd->fdt_blob = gd->new_fdt; 691 } 692 #endif 693 694 return 0; 695 } 696 697 static int setup_reloc(void) 698 { 699 if (gd->flags & GD_FLG_SKIP_RELOC) { 700 debug("Skipping relocation due to flag\n"); 701 return 0; 702 } 703 704 #ifdef CONFIG_SYS_TEXT_BASE 705 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 706 #ifdef CONFIG_M68K 707 /* 708 * On all ColdFire arch cpu, monitor code starts always 709 * just after the default vector table location, so at 0x400 710 */ 711 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 712 #endif 713 #endif 714 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 715 716 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 717 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 718 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 719 gd->start_addr_sp); 720 721 return 0; 722 } 723 724 #ifdef CONFIG_OF_BOARD_FIXUP 725 static int fix_fdt(void) 726 { 727 return board_fix_fdt((void *)gd->fdt_blob); 728 } 729 #endif 730 731 /* ARM calls relocate_code from its crt0.S */ 732 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 733 !CONFIG_IS_ENABLED(X86_64) 734 735 static int jump_to_copy(void) 736 { 737 if (gd->flags & GD_FLG_SKIP_RELOC) 738 return 0; 739 /* 740 * x86 is special, but in a nice way. It uses a trampoline which 741 * enables the dcache if possible. 742 * 743 * For now, other archs use relocate_code(), which is implemented 744 * similarly for all archs. When we do generic relocation, hopefully 745 * we can make all archs enable the dcache prior to relocation. 746 */ 747 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 748 /* 749 * SDRAM and console are now initialised. The final stack can now 750 * be setup in SDRAM. Code execution will continue in Flash, but 751 * with the stack in SDRAM and Global Data in temporary memory 752 * (CPU cache) 753 */ 754 arch_setup_gd(gd->new_gd); 755 board_init_f_r_trampoline(gd->start_addr_sp); 756 #else 757 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 758 #endif 759 760 return 0; 761 } 762 #endif 763 764 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 765 static int mark_bootstage(void) 766 { 767 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 768 769 return 0; 770 } 771 772 static int initf_console_record(void) 773 { 774 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 775 return console_record_init(); 776 #else 777 return 0; 778 #endif 779 } 780 781 static int initf_dm(void) 782 { 783 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 784 int ret; 785 786 ret = dm_init_and_scan(true); 787 if (ret) 788 return ret; 789 #endif 790 #ifdef CONFIG_TIMER_EARLY 791 ret = dm_timer_init(); 792 if (ret) 793 return ret; 794 #endif 795 796 return 0; 797 } 798 799 /* Architecture-specific memory reservation */ 800 __weak int reserve_arch(void) 801 { 802 return 0; 803 } 804 805 __weak int arch_cpu_init_dm(void) 806 { 807 return 0; 808 } 809 810 static const init_fnc_t init_sequence_f[] = { 811 setup_mon_len, 812 #ifdef CONFIG_OF_CONTROL 813 fdtdec_setup, 814 #endif 815 #ifdef CONFIG_TRACE 816 trace_early_init, 817 #endif 818 initf_malloc, 819 initf_console_record, 820 #if defined(CONFIG_HAVE_FSP) 821 arch_fsp_init, 822 #endif 823 arch_cpu_init, /* basic arch cpu dependent setup */ 824 mach_cpu_init, /* SoC/machine dependent CPU setup */ 825 initf_dm, 826 arch_cpu_init_dm, 827 mark_bootstage, /* need timer, go after init dm */ 828 #if defined(CONFIG_BOARD_EARLY_INIT_F) 829 board_early_init_f, 830 #endif 831 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 832 /* get CPU and bus clocks according to the environment variable */ 833 get_clocks, /* get CPU and bus clocks (etc.) */ 834 #endif 835 timer_init, /* initialize timer */ 836 #if defined(CONFIG_BOARD_POSTCLK_INIT) 837 board_postclk_init, 838 #endif 839 env_init, /* initialize environment */ 840 init_baud_rate, /* initialze baudrate settings */ 841 serial_init, /* serial communications setup */ 842 console_init_f, /* stage 1 init of console */ 843 #ifdef CONFIG_SANDBOX 844 sandbox_early_getopt_check, 845 #endif 846 display_options, /* say that we are here */ 847 display_text_info, /* show debugging info if required */ 848 #if defined(CONFIG_MPC8260) 849 prt_8260_rsr, 850 prt_8260_clks, 851 #endif /* CONFIG_MPC8260 */ 852 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) 853 checkcpu, 854 #endif 855 #if defined(CONFIG_DISPLAY_CPUINFO) 856 print_cpuinfo, /* display cpu info (and speed) */ 857 #endif 858 #if defined(CONFIG_DISPLAY_BOARDINFO) 859 show_board_info, 860 #endif 861 INIT_FUNC_WATCHDOG_INIT 862 #if defined(CONFIG_MISC_INIT_F) 863 misc_init_f, 864 #endif 865 INIT_FUNC_WATCHDOG_RESET 866 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 867 init_func_i2c, 868 #endif 869 #if defined(CONFIG_HARD_SPI) 870 init_func_spi, 871 #endif 872 announce_dram_init, 873 /* TODO: unify all these dram functions? */ 874 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 875 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 876 defined(CONFIG_SH) 877 dram_init, /* configure available RAM banks */ 878 #endif 879 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 880 init_func_ram, 881 #endif 882 #ifdef CONFIG_POST 883 post_init_f, 884 #endif 885 INIT_FUNC_WATCHDOG_RESET 886 #if defined(CONFIG_SYS_DRAM_TEST) 887 testdram, 888 #endif /* CONFIG_SYS_DRAM_TEST */ 889 INIT_FUNC_WATCHDOG_RESET 890 891 #ifdef CONFIG_POST 892 init_post, 893 #endif 894 INIT_FUNC_WATCHDOG_RESET 895 /* 896 * Now that we have DRAM mapped and working, we can 897 * relocate the code and continue running from DRAM. 898 * 899 * Reserve memory at end of RAM for (top down in that order): 900 * - area that won't get touched by U-Boot and Linux (optional) 901 * - kernel log buffer 902 * - protected RAM 903 * - LCD framebuffer 904 * - monitor code 905 * - board info struct 906 */ 907 setup_dest_addr, 908 #if defined(CONFIG_XTENSA) 909 /* Blackfin u-boot monitor should be on top of the ram */ 910 reserve_uboot, 911 #endif 912 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 913 reserve_logbuffer, 914 #endif 915 #ifdef CONFIG_PRAM 916 reserve_pram, 917 #endif 918 reserve_round_4k, 919 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 920 defined(CONFIG_ARM) 921 reserve_mmu, 922 #endif 923 #ifdef CONFIG_DM_VIDEO 924 reserve_video, 925 #else 926 # ifdef CONFIG_LCD 927 reserve_lcd, 928 # endif 929 /* TODO: Why the dependency on CONFIG_8xx? */ 930 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 931 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 932 !defined(CONFIG_M68K) 933 reserve_legacy_video, 934 # endif 935 #endif /* CONFIG_DM_VIDEO */ 936 reserve_trace, 937 #if !defined(CONFIG_XTENSA) 938 reserve_uboot, 939 #endif 940 #ifndef CONFIG_SPL_BUILD 941 reserve_malloc, 942 reserve_board, 943 #endif 944 setup_machine, 945 reserve_global_data, 946 reserve_fdt, 947 reserve_arch, 948 reserve_stacks, 949 setup_dram_config, 950 show_dram_config, 951 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 952 defined(CONFIG_SH) 953 setup_board_part1, 954 #endif 955 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 956 INIT_FUNC_WATCHDOG_RESET 957 setup_board_part2, 958 #endif 959 display_new_sp, 960 #ifdef CONFIG_SYS_EXTBDINFO 961 setup_board_extra, 962 #endif 963 #ifdef CONFIG_OF_BOARD_FIXUP 964 fix_fdt, 965 #endif 966 INIT_FUNC_WATCHDOG_RESET 967 reloc_fdt, 968 setup_reloc, 969 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 970 copy_uboot_to_ram, 971 do_elf_reloc_fixups, 972 clear_bss, 973 #endif 974 #if defined(CONFIG_XTENSA) 975 clear_bss, 976 #endif 977 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 978 !CONFIG_IS_ENABLED(X86_64) 979 jump_to_copy, 980 #endif 981 NULL, 982 }; 983 984 void board_init_f(ulong boot_flags) 985 { 986 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 987 /* 988 * For some architectures, global data is initialized and used before 989 * calling this function. The data should be preserved. For others, 990 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 991 * here to host global data until relocation. 992 */ 993 gd_t data; 994 995 gd = &data; 996 997 /* 998 * Clear global data before it is accessed at debug print 999 * in initcall_run_list. Otherwise the debug print probably 1000 * get the wrong value of gd->have_console. 1001 */ 1002 zero_global_data(); 1003 #endif 1004 1005 gd->flags = boot_flags; 1006 gd->have_console = 0; 1007 1008 if (initcall_run_list(init_sequence_f)) 1009 hang(); 1010 1011 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 1012 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 1013 /* NOTREACHED - jump_to_copy() does not return */ 1014 hang(); 1015 #endif 1016 } 1017 1018 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1019 /* 1020 * For now this code is only used on x86. 1021 * 1022 * init_sequence_f_r is the list of init functions which are run when 1023 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1024 * The following limitations must be considered when implementing an 1025 * '_f_r' function: 1026 * - 'static' variables are read-only 1027 * - Global Data (gd->xxx) is read/write 1028 * 1029 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1030 * supported). It _should_, if possible, copy global data to RAM and 1031 * initialise the CPU caches (to speed up the relocation process) 1032 * 1033 * NOTE: At present only x86 uses this route, but it is intended that 1034 * all archs will move to this when generic relocation is implemented. 1035 */ 1036 static const init_fnc_t init_sequence_f_r[] = { 1037 #if !CONFIG_IS_ENABLED(X86_64) 1038 init_cache_f_r, 1039 #endif 1040 1041 NULL, 1042 }; 1043 1044 void board_init_f_r(void) 1045 { 1046 if (initcall_run_list(init_sequence_f_r)) 1047 hang(); 1048 1049 /* 1050 * The pre-relocation drivers may be using memory that has now gone 1051 * away. Mark serial as unavailable - this will fall back to the debug 1052 * UART if available. 1053 */ 1054 gd->flags &= ~GD_FLG_SERIAL_READY; 1055 1056 /* 1057 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1058 * Transfer execution from Flash to RAM by calculating the address 1059 * of the in-RAM copy of board_init_r() and calling it 1060 */ 1061 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1062 1063 /* NOTREACHED - board_init_r() does not return */ 1064 hang(); 1065 } 1066 #endif /* CONFIG_X86 */ 1067