1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <environment.h> 17 #include <dm.h> 18 #include <fdtdec.h> 19 #include <fs.h> 20 #if defined(CONFIG_CMD_IDE) 21 #include <ide.h> 22 #endif 23 #include <i2c.h> 24 #include <initcall.h> 25 #include <logbuff.h> 26 27 /* TODO: Can we move these into arch/ headers? */ 28 #ifdef CONFIG_8xx 29 #include <mpc8xx.h> 30 #endif 31 #ifdef CONFIG_5xx 32 #include <mpc5xx.h> 33 #endif 34 #ifdef CONFIG_MPC5xxx 35 #include <mpc5xxx.h> 36 #endif 37 38 #include <os.h> 39 #include <post.h> 40 #include <spi.h> 41 #include <status_led.h> 42 #include <trace.h> 43 #include <watchdog.h> 44 #include <asm/errno.h> 45 #include <asm/io.h> 46 #ifdef CONFIG_MP 47 #include <asm/mp.h> 48 #endif 49 #include <asm/sections.h> 50 #ifdef CONFIG_X86 51 #include <asm/init_helpers.h> 52 #include <asm/relocate.h> 53 #endif 54 #ifdef CONFIG_SANDBOX 55 #include <asm/state.h> 56 #endif 57 #include <dm/root.h> 58 #include <linux/compiler.h> 59 60 /* 61 * Pointer to initial global data area 62 * 63 * Here we initialize it if needed. 64 */ 65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 66 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 67 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 68 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 69 #else 70 DECLARE_GLOBAL_DATA_PTR; 71 #endif 72 73 /* 74 * sjg: IMO this code should be 75 * refactored to a single function, something like: 76 * 77 * void led_set_state(enum led_colour_t colour, int on); 78 */ 79 /************************************************************************ 80 * Coloured LED functionality 81 ************************************************************************ 82 * May be supplied by boards if desired 83 */ 84 __weak void coloured_LED_init(void) {} 85 __weak void red_led_on(void) {} 86 __weak void red_led_off(void) {} 87 __weak void green_led_on(void) {} 88 __weak void green_led_off(void) {} 89 __weak void yellow_led_on(void) {} 90 __weak void yellow_led_off(void) {} 91 __weak void blue_led_on(void) {} 92 __weak void blue_led_off(void) {} 93 94 /* 95 * Why is gd allocated a register? Prior to reloc it might be better to 96 * just pass it around to each function in this file? 97 * 98 * After reloc one could argue that it is hardly used and doesn't need 99 * to be in a register. Or if it is it should perhaps hold pointers to all 100 * global data for all modules, so that post-reloc we can avoid the massive 101 * literal pool we get on ARM. Or perhaps just encourage each module to use 102 * a structure... 103 */ 104 105 /* 106 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 107 */ 108 109 #if defined(CONFIG_WATCHDOG) 110 static int init_func_watchdog_init(void) 111 { 112 puts(" Watchdog enabled\n"); 113 WATCHDOG_RESET(); 114 115 return 0; 116 } 117 118 int init_func_watchdog_reset(void) 119 { 120 WATCHDOG_RESET(); 121 122 return 0; 123 } 124 #endif /* CONFIG_WATCHDOG */ 125 126 void __board_add_ram_info(int use_default) 127 { 128 /* please define platform specific board_add_ram_info() */ 129 } 130 131 void board_add_ram_info(int) 132 __attribute__ ((weak, alias("__board_add_ram_info"))); 133 134 static int init_baud_rate(void) 135 { 136 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 137 return 0; 138 } 139 140 static int display_text_info(void) 141 { 142 #ifndef CONFIG_SANDBOX 143 ulong bss_start, bss_end; 144 145 bss_start = (ulong)&__bss_start; 146 bss_end = (ulong)&__bss_end; 147 148 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n", 149 CONFIG_SYS_TEXT_BASE, bss_start, bss_end); 150 #endif 151 152 #ifdef CONFIG_MODEM_SUPPORT 153 debug("Modem Support enabled\n"); 154 #endif 155 #ifdef CONFIG_USE_IRQ 156 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 157 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 158 #endif 159 160 return 0; 161 } 162 163 static int announce_dram_init(void) 164 { 165 puts("DRAM: "); 166 return 0; 167 } 168 169 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) 170 static int init_func_ram(void) 171 { 172 #ifdef CONFIG_BOARD_TYPES 173 int board_type = gd->board_type; 174 #else 175 int board_type = 0; /* use dummy arg */ 176 #endif 177 178 gd->ram_size = initdram(board_type); 179 180 if (gd->ram_size > 0) 181 return 0; 182 183 puts("*** failed ***\n"); 184 return 1; 185 } 186 #endif 187 188 static int show_dram_config(void) 189 { 190 unsigned long long size; 191 192 #ifdef CONFIG_NR_DRAM_BANKS 193 int i; 194 195 debug("\nRAM Configuration:\n"); 196 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 197 size += gd->bd->bi_dram[i].size; 198 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); 199 #ifdef DEBUG 200 print_size(gd->bd->bi_dram[i].size, "\n"); 201 #endif 202 } 203 debug("\nDRAM: "); 204 #else 205 size = gd->ram_size; 206 #endif 207 208 print_size(size, ""); 209 board_add_ram_info(0); 210 putc('\n'); 211 212 return 0; 213 } 214 215 void __dram_init_banksize(void) 216 { 217 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 218 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 219 gd->bd->bi_dram[0].size = get_effective_memsize(); 220 #endif 221 } 222 223 void dram_init_banksize(void) 224 __attribute__((weak, alias("__dram_init_banksize"))); 225 226 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 227 static int init_func_i2c(void) 228 { 229 puts("I2C: "); 230 #ifdef CONFIG_SYS_I2C 231 i2c_init_all(); 232 #else 233 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 234 #endif 235 puts("ready\n"); 236 return 0; 237 } 238 #endif 239 240 #if defined(CONFIG_HARD_SPI) 241 static int init_func_spi(void) 242 { 243 puts("SPI: "); 244 spi_init(); 245 puts("ready\n"); 246 return 0; 247 } 248 #endif 249 250 __maybe_unused 251 static int zero_global_data(void) 252 { 253 memset((void *)gd, '\0', sizeof(gd_t)); 254 255 return 0; 256 } 257 258 static int setup_mon_len(void) 259 { 260 #ifdef __ARM__ 261 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 262 #elif defined(CONFIG_SANDBOX) 263 gd->mon_len = (ulong)&_end - (ulong)_init; 264 #else 265 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 266 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 267 #endif 268 return 0; 269 } 270 271 __weak int arch_cpu_init(void) 272 { 273 return 0; 274 } 275 276 #ifdef CONFIG_OF_HOSTFILE 277 278 static int read_fdt_from_file(void) 279 { 280 struct sandbox_state *state = state_get_current(); 281 const char *fname = state->fdt_fname; 282 void *blob; 283 ssize_t size; 284 int err; 285 int fd; 286 287 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); 288 if (!state->fdt_fname) { 289 err = fdt_create_empty_tree(blob, 256); 290 if (!err) 291 goto done; 292 printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); 293 return -EINVAL; 294 } 295 296 size = os_get_filesize(fname); 297 if (size < 0) { 298 printf("Failed to file FDT file '%s'\n", fname); 299 return -ENOENT; 300 } 301 fd = os_open(fname, OS_O_RDONLY); 302 if (fd < 0) { 303 printf("Failed to open FDT file '%s'\n", fname); 304 return -EACCES; 305 } 306 if (os_read(fd, blob, size) != size) { 307 os_close(fd); 308 return -EIO; 309 } 310 os_close(fd); 311 312 done: 313 gd->fdt_blob = blob; 314 315 return 0; 316 } 317 #endif 318 319 #ifdef CONFIG_SANDBOX 320 static int setup_ram_buf(void) 321 { 322 struct sandbox_state *state = state_get_current(); 323 324 gd->arch.ram_buf = state->ram_buf; 325 gd->ram_size = state->ram_size; 326 327 return 0; 328 } 329 #endif 330 331 static int setup_fdt(void) 332 { 333 #ifdef CONFIG_OF_EMBED 334 /* Get a pointer to the FDT */ 335 gd->fdt_blob = __dtb_dt_begin; 336 #elif defined CONFIG_OF_SEPARATE 337 /* FDT is at end of image */ 338 gd->fdt_blob = (ulong *)&_end; 339 #elif defined(CONFIG_OF_HOSTFILE) 340 if (read_fdt_from_file()) { 341 puts("Failed to read control FDT\n"); 342 return -1; 343 } 344 #endif 345 /* Allow the early environment to override the fdt address */ 346 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, 347 (uintptr_t)gd->fdt_blob); 348 return 0; 349 } 350 351 /* Get the top of usable RAM */ 352 __weak ulong board_get_usable_ram_top(ulong total_size) 353 { 354 return gd->ram_top; 355 } 356 357 static int setup_dest_addr(void) 358 { 359 debug("Monitor len: %08lX\n", gd->mon_len); 360 /* 361 * Ram is setup, size stored in gd !! 362 */ 363 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 364 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 365 /* 366 * Subtract specified amount of memory to hide so that it won't 367 * get "touched" at all by U-Boot. By fixing up gd->ram_size 368 * the Linux kernel should now get passed the now "corrected" 369 * memory size and won't touch it either. This should work 370 * for arch/ppc and arch/powerpc. Only Linux board ports in 371 * arch/powerpc with bootwrapper support, that recalculate the 372 * memory size from the SDRAM controller setup will have to 373 * get fixed. 374 */ 375 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 376 #endif 377 #ifdef CONFIG_SYS_SDRAM_BASE 378 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 379 #endif 380 gd->ram_top += get_effective_memsize(); 381 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 382 gd->relocaddr = gd->ram_top; 383 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 384 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 385 /* 386 * We need to make sure the location we intend to put secondary core 387 * boot code is reserved and not used by any part of u-boot 388 */ 389 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 390 gd->relocaddr = determine_mp_bootpg(NULL); 391 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 392 } 393 #endif 394 return 0; 395 } 396 397 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 398 static int reserve_logbuffer(void) 399 { 400 /* reserve kernel log buffer */ 401 gd->relocaddr -= LOGBUFF_RESERVE; 402 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 403 gd->relocaddr); 404 return 0; 405 } 406 #endif 407 408 #ifdef CONFIG_PRAM 409 /* reserve protected RAM */ 410 static int reserve_pram(void) 411 { 412 ulong reg; 413 414 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 415 gd->relocaddr -= (reg << 10); /* size is in kB */ 416 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 417 gd->relocaddr); 418 return 0; 419 } 420 #endif /* CONFIG_PRAM */ 421 422 /* Round memory pointer down to next 4 kB limit */ 423 static int reserve_round_4k(void) 424 { 425 gd->relocaddr &= ~(4096 - 1); 426 return 0; 427 } 428 429 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 430 defined(CONFIG_ARM) 431 static int reserve_mmu(void) 432 { 433 /* reserve TLB table */ 434 gd->arch.tlb_size = PGTABLE_SIZE; 435 gd->relocaddr -= gd->arch.tlb_size; 436 437 /* round down to next 64 kB limit */ 438 gd->relocaddr &= ~(0x10000 - 1); 439 440 gd->arch.tlb_addr = gd->relocaddr; 441 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 442 gd->arch.tlb_addr + gd->arch.tlb_size); 443 return 0; 444 } 445 #endif 446 447 #ifdef CONFIG_LCD 448 static int reserve_lcd(void) 449 { 450 #ifdef CONFIG_FB_ADDR 451 gd->fb_base = CONFIG_FB_ADDR; 452 #else 453 /* reserve memory for LCD display (always full pages) */ 454 gd->relocaddr = lcd_setmem(gd->relocaddr); 455 gd->fb_base = gd->relocaddr; 456 #endif /* CONFIG_FB_ADDR */ 457 return 0; 458 } 459 #endif /* CONFIG_LCD */ 460 461 static int reserve_trace(void) 462 { 463 #ifdef CONFIG_TRACE 464 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 465 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 466 debug("Reserving %dk for trace data at: %08lx\n", 467 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 468 #endif 469 470 return 0; 471 } 472 473 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ 474 && !defined(CONFIG_ARM) && !defined(CONFIG_X86) 475 static int reserve_video(void) 476 { 477 /* reserve memory for video display (always full pages) */ 478 gd->relocaddr = video_setmem(gd->relocaddr); 479 gd->fb_base = gd->relocaddr; 480 481 return 0; 482 } 483 #endif 484 485 static int reserve_uboot(void) 486 { 487 /* 488 * reserve memory for U-Boot code, data & bss 489 * round down to next 4 kB limit 490 */ 491 gd->relocaddr -= gd->mon_len; 492 gd->relocaddr &= ~(4096 - 1); 493 #ifdef CONFIG_E500 494 /* round down to next 64 kB limit so that IVPR stays aligned */ 495 gd->relocaddr &= ~(65536 - 1); 496 #endif 497 498 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 499 gd->relocaddr); 500 501 gd->start_addr_sp = gd->relocaddr; 502 503 return 0; 504 } 505 506 #ifndef CONFIG_SPL_BUILD 507 /* reserve memory for malloc() area */ 508 static int reserve_malloc(void) 509 { 510 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 511 debug("Reserving %dk for malloc() at: %08lx\n", 512 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 513 return 0; 514 } 515 516 /* (permanently) allocate a Board Info struct */ 517 static int reserve_board(void) 518 { 519 gd->start_addr_sp -= sizeof(bd_t); 520 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 521 memset(gd->bd, '\0', sizeof(bd_t)); 522 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 523 sizeof(bd_t), gd->start_addr_sp); 524 return 0; 525 } 526 #endif 527 528 static int setup_machine(void) 529 { 530 #ifdef CONFIG_MACH_TYPE 531 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 532 #endif 533 return 0; 534 } 535 536 static int reserve_global_data(void) 537 { 538 gd->start_addr_sp -= sizeof(gd_t); 539 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 540 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 541 sizeof(gd_t), gd->start_addr_sp); 542 return 0; 543 } 544 545 static int reserve_fdt(void) 546 { 547 /* 548 * If the device tree is sitting immediate above our image then we 549 * must relocate it. If it is embedded in the data section, then it 550 * will be relocated with other data. 551 */ 552 if (gd->fdt_blob) { 553 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 554 555 gd->start_addr_sp -= gd->fdt_size; 556 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 557 debug("Reserving %lu Bytes for FDT at: %08lx\n", 558 gd->fdt_size, gd->start_addr_sp); 559 } 560 561 return 0; 562 } 563 564 static int reserve_stacks(void) 565 { 566 #ifdef CONFIG_SPL_BUILD 567 # ifdef CONFIG_ARM 568 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */ 569 gd->irq_sp = gd->start_addr_sp; 570 # endif 571 #else 572 # ifdef CONFIG_PPC 573 ulong *s; 574 # endif 575 576 /* setup stack pointer for exceptions */ 577 gd->start_addr_sp -= 16; 578 gd->start_addr_sp &= ~0xf; 579 gd->irq_sp = gd->start_addr_sp; 580 581 /* 582 * Handle architecture-specific things here 583 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() 584 * to handle this and put in arch/xxx/lib/stack.c 585 */ 586 # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) 587 # ifdef CONFIG_USE_IRQ 588 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); 589 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", 590 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp); 591 592 /* 8-byte alignment for ARM ABI compliance */ 593 gd->start_addr_sp &= ~0x07; 594 # endif 595 /* leave 3 words for abort-stack, plus 1 for alignment */ 596 gd->start_addr_sp -= 16; 597 # elif defined(CONFIG_PPC) 598 /* Clear initial stack frame */ 599 s = (ulong *) gd->start_addr_sp; 600 *s = 0; /* Terminate back chain */ 601 *++s = 0; /* NULL return address */ 602 # endif /* Architecture specific code */ 603 604 return 0; 605 #endif 606 } 607 608 static int display_new_sp(void) 609 { 610 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 611 612 return 0; 613 } 614 615 #ifdef CONFIG_PPC 616 static int setup_board_part1(void) 617 { 618 bd_t *bd = gd->bd; 619 620 /* 621 * Save local variables to board info struct 622 */ 623 624 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 625 bd->bi_memsize = gd->ram_size; /* size in bytes */ 626 627 #ifdef CONFIG_SYS_SRAM_BASE 628 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 629 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 630 #endif 631 632 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 633 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 634 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 635 #endif 636 #if defined(CONFIG_MPC5xxx) 637 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 638 #endif 639 #if defined(CONFIG_MPC83xx) 640 bd->bi_immrbar = CONFIG_SYS_IMMR; 641 #endif 642 643 return 0; 644 } 645 646 static int setup_board_part2(void) 647 { 648 bd_t *bd = gd->bd; 649 650 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 651 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 652 #if defined(CONFIG_CPM2) 653 bd->bi_cpmfreq = gd->arch.cpm_clk; 654 bd->bi_brgfreq = gd->arch.brg_clk; 655 bd->bi_sccfreq = gd->arch.scc_clk; 656 bd->bi_vco = gd->arch.vco_out; 657 #endif /* CONFIG_CPM2 */ 658 #if defined(CONFIG_MPC512X) 659 bd->bi_ipsfreq = gd->arch.ips_clk; 660 #endif /* CONFIG_MPC512X */ 661 #if defined(CONFIG_MPC5xxx) 662 bd->bi_ipbfreq = gd->arch.ipb_clk; 663 bd->bi_pcifreq = gd->pci_clk; 664 #endif /* CONFIG_MPC5xxx */ 665 666 return 0; 667 } 668 #endif 669 670 #ifdef CONFIG_SYS_EXTBDINFO 671 static int setup_board_extra(void) 672 { 673 bd_t *bd = gd->bd; 674 675 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 676 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 677 sizeof(bd->bi_r_version)); 678 679 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 680 bd->bi_plb_busfreq = gd->bus_clk; 681 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 682 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 683 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 684 bd->bi_pci_busfreq = get_PCI_freq(); 685 bd->bi_opbfreq = get_OPB_freq(); 686 #elif defined(CONFIG_XILINX_405) 687 bd->bi_pci_busfreq = get_PCI_freq(); 688 #endif 689 690 return 0; 691 } 692 #endif 693 694 #ifdef CONFIG_POST 695 static int init_post(void) 696 { 697 post_bootmode_init(); 698 post_run(NULL, POST_ROM | post_bootmode_get(0)); 699 700 return 0; 701 } 702 #endif 703 704 static int setup_dram_config(void) 705 { 706 /* Ram is board specific, so move it to board code ... */ 707 dram_init_banksize(); 708 709 return 0; 710 } 711 712 static int reloc_fdt(void) 713 { 714 if (gd->new_fdt) { 715 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 716 gd->fdt_blob = gd->new_fdt; 717 } 718 719 return 0; 720 } 721 722 static int setup_reloc(void) 723 { 724 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 725 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 726 727 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 728 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 729 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 730 gd->start_addr_sp); 731 732 return 0; 733 } 734 735 /* ARM calls relocate_code from its crt0.S */ 736 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 737 738 static int jump_to_copy(void) 739 { 740 /* 741 * x86 is special, but in a nice way. It uses a trampoline which 742 * enables the dcache if possible. 743 * 744 * For now, other archs use relocate_code(), which is implemented 745 * similarly for all archs. When we do generic relocation, hopefully 746 * we can make all archs enable the dcache prior to relocation. 747 */ 748 #ifdef CONFIG_X86 749 /* 750 * SDRAM and console are now initialised. The final stack can now 751 * be setup in SDRAM. Code execution will continue in Flash, but 752 * with the stack in SDRAM and Global Data in temporary memory 753 * (CPU cache) 754 */ 755 board_init_f_r_trampoline(gd->start_addr_sp); 756 #else 757 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 758 #endif 759 760 return 0; 761 } 762 #endif 763 764 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 765 static int mark_bootstage(void) 766 { 767 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 768 769 return 0; 770 } 771 772 static int initf_malloc(void) 773 { 774 #ifdef CONFIG_SYS_MALLOC_F_LEN 775 assert(gd->malloc_base); /* Set up by crt0.S */ 776 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN; 777 gd->malloc_ptr = 0; 778 #endif 779 780 return 0; 781 } 782 783 static int initf_dm(void) 784 { 785 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 786 int ret; 787 788 ret = dm_init_and_scan(true); 789 if (ret) 790 return ret; 791 #endif 792 793 return 0; 794 } 795 796 static init_fnc_t init_sequence_f[] = { 797 #ifdef CONFIG_SANDBOX 798 setup_ram_buf, 799 #endif 800 setup_mon_len, 801 setup_fdt, 802 trace_early_init, 803 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 804 /* TODO: can this go into arch_cpu_init()? */ 805 probecpu, 806 #endif 807 arch_cpu_init, /* basic arch cpu dependent setup */ 808 #ifdef CONFIG_X86 809 cpu_init_f, /* TODO(sjg@chromium.org): remove */ 810 # ifdef CONFIG_OF_CONTROL 811 find_fdt, /* TODO(sjg@chromium.org): remove */ 812 # endif 813 #endif 814 mark_bootstage, 815 #ifdef CONFIG_OF_CONTROL 816 fdtdec_check_fdt, 817 #endif 818 #if defined(CONFIG_BOARD_EARLY_INIT_F) 819 board_early_init_f, 820 #endif 821 /* TODO: can any of this go into arch_cpu_init()? */ 822 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 823 get_clocks, /* get CPU and bus clocks (etc.) */ 824 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 825 && !defined(CONFIG_TQM885D) 826 adjust_sdram_tbs_8xx, 827 #endif 828 /* TODO: can we rename this to timer_init()? */ 829 init_timebase, 830 #endif 831 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) 832 timer_init, /* initialize timer */ 833 #endif 834 #ifdef CONFIG_SYS_ALLOC_DPRAM 835 #if !defined(CONFIG_CPM2) 836 dpram_init, 837 #endif 838 #endif 839 #if defined(CONFIG_BOARD_POSTCLK_INIT) 840 board_postclk_init, 841 #endif 842 #ifdef CONFIG_FSL_ESDHC 843 get_clocks, 844 #endif 845 env_init, /* initialize environment */ 846 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 847 /* get CPU and bus clocks according to the environment variable */ 848 get_clocks_866, 849 /* adjust sdram refresh rate according to the new clock */ 850 sdram_adjust_866, 851 init_timebase, 852 #endif 853 initf_malloc, 854 initf_dm, 855 init_baud_rate, /* initialze baudrate settings */ 856 serial_init, /* serial communications setup */ 857 console_init_f, /* stage 1 init of console */ 858 #ifdef CONFIG_SANDBOX 859 sandbox_early_getopt_check, 860 #endif 861 #ifdef CONFIG_OF_CONTROL 862 fdtdec_prepare_fdt, 863 #endif 864 display_options, /* say that we are here */ 865 display_text_info, /* show debugging info if required */ 866 #if defined(CONFIG_MPC8260) 867 prt_8260_rsr, 868 prt_8260_clks, 869 #endif /* CONFIG_MPC8260 */ 870 #if defined(CONFIG_MPC83xx) 871 prt_83xx_rsr, 872 #endif 873 #ifdef CONFIG_PPC 874 checkcpu, 875 #endif 876 print_cpuinfo, /* display cpu info (and speed) */ 877 #if defined(CONFIG_MPC5xxx) 878 prt_mpc5xxx_clks, 879 #endif /* CONFIG_MPC5xxx */ 880 #if defined(CONFIG_DISPLAY_BOARDINFO) 881 checkboard, /* display board info */ 882 #endif 883 INIT_FUNC_WATCHDOG_INIT 884 #if defined(CONFIG_MISC_INIT_F) 885 misc_init_f, 886 #endif 887 INIT_FUNC_WATCHDOG_RESET 888 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 889 init_func_i2c, 890 #endif 891 #if defined(CONFIG_HARD_SPI) 892 init_func_spi, 893 #endif 894 #ifdef CONFIG_X86 895 dram_init_f, /* configure available RAM banks */ 896 calculate_relocation_address, 897 #endif 898 announce_dram_init, 899 /* TODO: unify all these dram functions? */ 900 #ifdef CONFIG_ARM 901 dram_init, /* configure available RAM banks */ 902 #endif 903 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) 904 init_func_ram, 905 #endif 906 #ifdef CONFIG_POST 907 post_init_f, 908 #endif 909 INIT_FUNC_WATCHDOG_RESET 910 #if defined(CONFIG_SYS_DRAM_TEST) 911 testdram, 912 #endif /* CONFIG_SYS_DRAM_TEST */ 913 INIT_FUNC_WATCHDOG_RESET 914 915 #ifdef CONFIG_POST 916 init_post, 917 #endif 918 INIT_FUNC_WATCHDOG_RESET 919 /* 920 * Now that we have DRAM mapped and working, we can 921 * relocate the code and continue running from DRAM. 922 * 923 * Reserve memory at end of RAM for (top down in that order): 924 * - area that won't get touched by U-Boot and Linux (optional) 925 * - kernel log buffer 926 * - protected RAM 927 * - LCD framebuffer 928 * - monitor code 929 * - board info struct 930 */ 931 setup_dest_addr, 932 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 933 reserve_logbuffer, 934 #endif 935 #ifdef CONFIG_PRAM 936 reserve_pram, 937 #endif 938 reserve_round_4k, 939 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 940 defined(CONFIG_ARM) 941 reserve_mmu, 942 #endif 943 #ifdef CONFIG_LCD 944 reserve_lcd, 945 #endif 946 reserve_trace, 947 /* TODO: Why the dependency on CONFIG_8xx? */ 948 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ 949 && !defined(CONFIG_ARM) && !defined(CONFIG_X86) 950 reserve_video, 951 #endif 952 reserve_uboot, 953 #ifndef CONFIG_SPL_BUILD 954 reserve_malloc, 955 reserve_board, 956 #endif 957 setup_machine, 958 reserve_global_data, 959 reserve_fdt, 960 reserve_stacks, 961 setup_dram_config, 962 show_dram_config, 963 #ifdef CONFIG_PPC 964 setup_board_part1, 965 INIT_FUNC_WATCHDOG_RESET 966 setup_board_part2, 967 #endif 968 display_new_sp, 969 #ifdef CONFIG_SYS_EXTBDINFO 970 setup_board_extra, 971 #endif 972 INIT_FUNC_WATCHDOG_RESET 973 reloc_fdt, 974 setup_reloc, 975 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 976 jump_to_copy, 977 #endif 978 NULL, 979 }; 980 981 void board_init_f(ulong boot_flags) 982 { 983 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 984 /* 985 * For some archtectures, global data is initialized and used before 986 * calling this function. The data should be preserved. For others, 987 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 988 * here to host global data until relocation. 989 */ 990 gd_t data; 991 992 gd = &data; 993 994 /* 995 * Clear global data before it is accessed at debug print 996 * in initcall_run_list. Otherwise the debug print probably 997 * get the wrong vaule of gd->have_console. 998 */ 999 zero_global_data(); 1000 #endif 1001 1002 gd->flags = boot_flags; 1003 gd->have_console = 0; 1004 1005 if (initcall_run_list(init_sequence_f)) 1006 hang(); 1007 1008 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 1009 /* NOTREACHED - jump_to_copy() does not return */ 1010 hang(); 1011 #endif 1012 } 1013 1014 #ifdef CONFIG_X86 1015 /* 1016 * For now this code is only used on x86. 1017 * 1018 * init_sequence_f_r is the list of init functions which are run when 1019 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1020 * The following limitations must be considered when implementing an 1021 * '_f_r' function: 1022 * - 'static' variables are read-only 1023 * - Global Data (gd->xxx) is read/write 1024 * 1025 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1026 * supported). It _should_, if possible, copy global data to RAM and 1027 * initialise the CPU caches (to speed up the relocation process) 1028 * 1029 * NOTE: At present only x86 uses this route, but it is intended that 1030 * all archs will move to this when generic relocation is implemented. 1031 */ 1032 static init_fnc_t init_sequence_f_r[] = { 1033 init_cache_f_r, 1034 copy_uboot_to_ram, 1035 clear_bss, 1036 do_elf_reloc_fixups, 1037 1038 NULL, 1039 }; 1040 1041 void board_init_f_r(void) 1042 { 1043 if (initcall_run_list(init_sequence_f_r)) 1044 hang(); 1045 1046 /* 1047 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1048 * Transfer execution from Flash to RAM by calculating the address 1049 * of the in-RAM copy of board_init_r() and calling it 1050 */ 1051 (board_init_r + gd->reloc_off)(gd, gd->relocaddr); 1052 1053 /* NOTREACHED - board_init_r() does not return */ 1054 hang(); 1055 } 1056 #endif /* CONFIG_X86 */ 1057