1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <console.h> 17 #include <environment.h> 18 #include <dm.h> 19 #include <fdtdec.h> 20 #include <fs.h> 21 #if defined(CONFIG_CMD_IDE) 22 #include <ide.h> 23 #endif 24 #include <i2c.h> 25 #include <initcall.h> 26 #include <logbuff.h> 27 #include <malloc.h> 28 #include <mapmem.h> 29 30 /* TODO: Can we move these into arch/ headers? */ 31 #ifdef CONFIG_8xx 32 #include <mpc8xx.h> 33 #endif 34 #ifdef CONFIG_5xx 35 #include <mpc5xx.h> 36 #endif 37 #ifdef CONFIG_MPC5xxx 38 #include <mpc5xxx.h> 39 #endif 40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 41 #include <asm/mp.h> 42 #endif 43 44 #include <os.h> 45 #include <post.h> 46 #include <spi.h> 47 #include <status_led.h> 48 #include <timer.h> 49 #include <trace.h> 50 #include <video.h> 51 #include <watchdog.h> 52 #include <linux/errno.h> 53 #include <asm/io.h> 54 #include <asm/sections.h> 55 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 56 #include <asm/init_helpers.h> 57 #endif 58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 59 #include <asm/relocate.h> 60 #endif 61 #ifdef CONFIG_SANDBOX 62 #include <asm/state.h> 63 #endif 64 #include <dm/root.h> 65 #include <linux/compiler.h> 66 67 /* 68 * Pointer to initial global data area 69 * 70 * Here we initialize it if needed. 71 */ 72 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 73 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 74 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 75 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 76 #else 77 DECLARE_GLOBAL_DATA_PTR; 78 #endif 79 80 /* 81 * TODO(sjg@chromium.org): IMO this code should be 82 * refactored to a single function, something like: 83 * 84 * void led_set_state(enum led_colour_t colour, int on); 85 */ 86 /************************************************************************ 87 * Coloured LED functionality 88 ************************************************************************ 89 * May be supplied by boards if desired 90 */ 91 __weak void coloured_LED_init(void) {} 92 __weak void red_led_on(void) {} 93 __weak void red_led_off(void) {} 94 __weak void green_led_on(void) {} 95 __weak void green_led_off(void) {} 96 __weak void yellow_led_on(void) {} 97 __weak void yellow_led_off(void) {} 98 __weak void blue_led_on(void) {} 99 __weak void blue_led_off(void) {} 100 101 /* 102 * Why is gd allocated a register? Prior to reloc it might be better to 103 * just pass it around to each function in this file? 104 * 105 * After reloc one could argue that it is hardly used and doesn't need 106 * to be in a register. Or if it is it should perhaps hold pointers to all 107 * global data for all modules, so that post-reloc we can avoid the massive 108 * literal pool we get on ARM. Or perhaps just encourage each module to use 109 * a structure... 110 */ 111 112 /* 113 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 114 */ 115 116 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 117 static int init_func_watchdog_init(void) 118 { 119 # if defined(CONFIG_HW_WATCHDOG) && \ 120 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 121 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 122 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 123 defined(CONFIG_IMX_WATCHDOG)) 124 hw_watchdog_init(); 125 puts(" Watchdog enabled\n"); 126 # endif 127 WATCHDOG_RESET(); 128 129 return 0; 130 } 131 132 int init_func_watchdog_reset(void) 133 { 134 WATCHDOG_RESET(); 135 136 return 0; 137 } 138 #endif /* CONFIG_WATCHDOG */ 139 140 __weak void board_add_ram_info(int use_default) 141 { 142 /* please define platform specific board_add_ram_info() */ 143 } 144 145 static int init_baud_rate(void) 146 { 147 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 148 return 0; 149 } 150 151 static int display_text_info(void) 152 { 153 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 154 ulong bss_start, bss_end, text_base; 155 156 bss_start = (ulong)&__bss_start; 157 bss_end = (ulong)&__bss_end; 158 159 #ifdef CONFIG_SYS_TEXT_BASE 160 text_base = CONFIG_SYS_TEXT_BASE; 161 #else 162 text_base = CONFIG_SYS_MONITOR_BASE; 163 #endif 164 165 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 166 text_base, bss_start, bss_end); 167 #endif 168 169 #ifdef CONFIG_USE_IRQ 170 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 171 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 172 #endif 173 174 return 0; 175 } 176 177 static int announce_dram_init(void) 178 { 179 puts("DRAM: "); 180 return 0; 181 } 182 183 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 184 static int init_func_ram(void) 185 { 186 #ifdef CONFIG_BOARD_TYPES 187 int board_type = gd->board_type; 188 #else 189 int board_type = 0; /* use dummy arg */ 190 #endif 191 192 gd->ram_size = initdram(board_type); 193 194 if (gd->ram_size > 0) 195 return 0; 196 197 puts("*** failed ***\n"); 198 return 1; 199 } 200 #endif 201 202 static int show_dram_config(void) 203 { 204 unsigned long long size; 205 206 #ifdef CONFIG_NR_DRAM_BANKS 207 int i; 208 209 debug("\nRAM Configuration:\n"); 210 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 211 size += gd->bd->bi_dram[i].size; 212 debug("Bank #%d: %llx ", i, 213 (unsigned long long)(gd->bd->bi_dram[i].start)); 214 #ifdef DEBUG 215 print_size(gd->bd->bi_dram[i].size, "\n"); 216 #endif 217 } 218 debug("\nDRAM: "); 219 #else 220 size = gd->ram_size; 221 #endif 222 223 print_size(size, ""); 224 board_add_ram_info(0); 225 putc('\n'); 226 227 return 0; 228 } 229 230 __weak void dram_init_banksize(void) 231 { 232 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 233 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 234 gd->bd->bi_dram[0].size = get_effective_memsize(); 235 #endif 236 } 237 238 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 239 static int init_func_i2c(void) 240 { 241 puts("I2C: "); 242 #ifdef CONFIG_SYS_I2C 243 i2c_init_all(); 244 #else 245 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 246 #endif 247 puts("ready\n"); 248 return 0; 249 } 250 #endif 251 252 #if defined(CONFIG_HARD_SPI) 253 static int init_func_spi(void) 254 { 255 puts("SPI: "); 256 spi_init(); 257 puts("ready\n"); 258 return 0; 259 } 260 #endif 261 262 __maybe_unused 263 static int zero_global_data(void) 264 { 265 memset((void *)gd, '\0', sizeof(gd_t)); 266 267 return 0; 268 } 269 270 static int setup_mon_len(void) 271 { 272 #if defined(__ARM__) || defined(__MICROBLAZE__) 273 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 274 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 275 gd->mon_len = (ulong)&_end - (ulong)_init; 276 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 277 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 278 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 279 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 280 #elif defined(CONFIG_SYS_MONITOR_BASE) 281 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 282 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 283 #endif 284 return 0; 285 } 286 287 __weak int arch_cpu_init(void) 288 { 289 return 0; 290 } 291 292 __weak int mach_cpu_init(void) 293 { 294 return 0; 295 } 296 297 #ifdef CONFIG_SANDBOX 298 static int setup_ram_buf(void) 299 { 300 struct sandbox_state *state = state_get_current(); 301 302 gd->arch.ram_buf = state->ram_buf; 303 gd->ram_size = state->ram_size; 304 305 return 0; 306 } 307 #endif 308 309 /* Get the top of usable RAM */ 310 __weak ulong board_get_usable_ram_top(ulong total_size) 311 { 312 #ifdef CONFIG_SYS_SDRAM_BASE 313 /* 314 * Detect whether we have so much RAM that it goes past the end of our 315 * 32-bit address space. If so, clip the usable RAM so it doesn't. 316 */ 317 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 318 /* 319 * Will wrap back to top of 32-bit space when reservations 320 * are made. 321 */ 322 return 0; 323 #endif 324 return gd->ram_top; 325 } 326 327 static int setup_dest_addr(void) 328 { 329 debug("Monitor len: %08lX\n", gd->mon_len); 330 /* 331 * Ram is setup, size stored in gd !! 332 */ 333 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 334 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 335 /* 336 * Subtract specified amount of memory to hide so that it won't 337 * get "touched" at all by U-Boot. By fixing up gd->ram_size 338 * the Linux kernel should now get passed the now "corrected" 339 * memory size and won't touch it either. This should work 340 * for arch/ppc and arch/powerpc. Only Linux board ports in 341 * arch/powerpc with bootwrapper support, that recalculate the 342 * memory size from the SDRAM controller setup will have to 343 * get fixed. 344 */ 345 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 346 #endif 347 #ifdef CONFIG_SYS_SDRAM_BASE 348 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 349 #endif 350 gd->ram_top += get_effective_memsize(); 351 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 352 gd->relocaddr = gd->ram_top; 353 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 354 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 355 /* 356 * We need to make sure the location we intend to put secondary core 357 * boot code is reserved and not used by any part of u-boot 358 */ 359 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 360 gd->relocaddr = determine_mp_bootpg(NULL); 361 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 362 } 363 #endif 364 return 0; 365 } 366 367 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 368 static int reserve_logbuffer(void) 369 { 370 /* reserve kernel log buffer */ 371 gd->relocaddr -= LOGBUFF_RESERVE; 372 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 373 gd->relocaddr); 374 return 0; 375 } 376 #endif 377 378 #ifdef CONFIG_PRAM 379 /* reserve protected RAM */ 380 static int reserve_pram(void) 381 { 382 ulong reg; 383 384 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 385 gd->relocaddr -= (reg << 10); /* size is in kB */ 386 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 387 gd->relocaddr); 388 return 0; 389 } 390 #endif /* CONFIG_PRAM */ 391 392 /* Round memory pointer down to next 4 kB limit */ 393 static int reserve_round_4k(void) 394 { 395 gd->relocaddr &= ~(4096 - 1); 396 return 0; 397 } 398 399 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 400 defined(CONFIG_ARM) 401 static int reserve_mmu(void) 402 { 403 /* reserve TLB table */ 404 gd->arch.tlb_size = PGTABLE_SIZE; 405 gd->relocaddr -= gd->arch.tlb_size; 406 407 /* round down to next 64 kB limit */ 408 gd->relocaddr &= ~(0x10000 - 1); 409 410 gd->arch.tlb_addr = gd->relocaddr; 411 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 412 gd->arch.tlb_addr + gd->arch.tlb_size); 413 414 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 415 /* 416 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 417 * with location within secure ram. 418 */ 419 gd->arch.tlb_allocated = gd->arch.tlb_addr; 420 #endif 421 422 return 0; 423 } 424 #endif 425 426 #ifdef CONFIG_DM_VIDEO 427 static int reserve_video(void) 428 { 429 ulong addr; 430 int ret; 431 432 addr = gd->relocaddr; 433 ret = video_reserve(&addr); 434 if (ret) 435 return ret; 436 gd->relocaddr = addr; 437 438 return 0; 439 } 440 #else 441 442 # ifdef CONFIG_LCD 443 static int reserve_lcd(void) 444 { 445 # ifdef CONFIG_FB_ADDR 446 gd->fb_base = CONFIG_FB_ADDR; 447 # else 448 /* reserve memory for LCD display (always full pages) */ 449 gd->relocaddr = lcd_setmem(gd->relocaddr); 450 gd->fb_base = gd->relocaddr; 451 # endif /* CONFIG_FB_ADDR */ 452 453 return 0; 454 } 455 # endif /* CONFIG_LCD */ 456 457 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 458 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 459 !defined(CONFIG_M68K) 460 static int reserve_legacy_video(void) 461 { 462 /* reserve memory for video display (always full pages) */ 463 gd->relocaddr = video_setmem(gd->relocaddr); 464 gd->fb_base = gd->relocaddr; 465 466 return 0; 467 } 468 # endif 469 #endif /* !CONFIG_DM_VIDEO */ 470 471 static int reserve_trace(void) 472 { 473 #ifdef CONFIG_TRACE 474 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 475 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 476 debug("Reserving %dk for trace data at: %08lx\n", 477 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 478 #endif 479 480 return 0; 481 } 482 483 static int reserve_uboot(void) 484 { 485 /* 486 * reserve memory for U-Boot code, data & bss 487 * round down to next 4 kB limit 488 */ 489 gd->relocaddr -= gd->mon_len; 490 gd->relocaddr &= ~(4096 - 1); 491 #ifdef CONFIG_E500 492 /* round down to next 64 kB limit so that IVPR stays aligned */ 493 gd->relocaddr &= ~(65536 - 1); 494 #endif 495 496 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 497 gd->relocaddr); 498 499 gd->start_addr_sp = gd->relocaddr; 500 501 return 0; 502 } 503 504 #ifndef CONFIG_SPL_BUILD 505 /* reserve memory for malloc() area */ 506 static int reserve_malloc(void) 507 { 508 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 509 debug("Reserving %dk for malloc() at: %08lx\n", 510 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 511 return 0; 512 } 513 514 /* (permanently) allocate a Board Info struct */ 515 static int reserve_board(void) 516 { 517 if (!gd->bd) { 518 gd->start_addr_sp -= sizeof(bd_t); 519 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 520 memset(gd->bd, '\0', sizeof(bd_t)); 521 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 522 sizeof(bd_t), gd->start_addr_sp); 523 } 524 return 0; 525 } 526 #endif 527 528 static int setup_machine(void) 529 { 530 #ifdef CONFIG_MACH_TYPE 531 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 532 #endif 533 return 0; 534 } 535 536 static int reserve_global_data(void) 537 { 538 gd->start_addr_sp -= sizeof(gd_t); 539 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 540 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 541 sizeof(gd_t), gd->start_addr_sp); 542 return 0; 543 } 544 545 static int reserve_fdt(void) 546 { 547 #ifndef CONFIG_OF_EMBED 548 /* 549 * If the device tree is sitting immediately above our image then we 550 * must relocate it. If it is embedded in the data section, then it 551 * will be relocated with other data. 552 */ 553 if (gd->fdt_blob) { 554 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 555 556 gd->start_addr_sp -= gd->fdt_size; 557 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 558 debug("Reserving %lu Bytes for FDT at: %08lx\n", 559 gd->fdt_size, gd->start_addr_sp); 560 } 561 #endif 562 563 return 0; 564 } 565 566 int arch_reserve_stacks(void) 567 { 568 return 0; 569 } 570 571 static int reserve_stacks(void) 572 { 573 /* make stack pointer 16-byte aligned */ 574 gd->start_addr_sp -= 16; 575 gd->start_addr_sp &= ~0xf; 576 577 /* 578 * let the architecture-specific code tailor gd->start_addr_sp and 579 * gd->irq_sp 580 */ 581 return arch_reserve_stacks(); 582 } 583 584 static int display_new_sp(void) 585 { 586 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 587 588 return 0; 589 } 590 591 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 592 defined(CONFIG_SH) 593 static int setup_board_part1(void) 594 { 595 bd_t *bd = gd->bd; 596 597 /* 598 * Save local variables to board info struct 599 */ 600 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 601 bd->bi_memsize = gd->ram_size; /* size in bytes */ 602 603 #ifdef CONFIG_SYS_SRAM_BASE 604 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 605 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 606 #endif 607 608 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 609 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 610 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 611 #endif 612 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 613 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 614 #endif 615 #if defined(CONFIG_MPC83xx) 616 bd->bi_immrbar = CONFIG_SYS_IMMR; 617 #endif 618 619 return 0; 620 } 621 #endif 622 623 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 624 static int setup_board_part2(void) 625 { 626 bd_t *bd = gd->bd; 627 628 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 629 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 630 #if defined(CONFIG_CPM2) 631 bd->bi_cpmfreq = gd->arch.cpm_clk; 632 bd->bi_brgfreq = gd->arch.brg_clk; 633 bd->bi_sccfreq = gd->arch.scc_clk; 634 bd->bi_vco = gd->arch.vco_out; 635 #endif /* CONFIG_CPM2 */ 636 #if defined(CONFIG_MPC512X) 637 bd->bi_ipsfreq = gd->arch.ips_clk; 638 #endif /* CONFIG_MPC512X */ 639 #if defined(CONFIG_MPC5xxx) 640 bd->bi_ipbfreq = gd->arch.ipb_clk; 641 bd->bi_pcifreq = gd->pci_clk; 642 #endif /* CONFIG_MPC5xxx */ 643 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 644 bd->bi_pcifreq = gd->pci_clk; 645 #endif 646 #if defined(CONFIG_EXTRA_CLOCK) 647 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 648 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 649 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 650 #endif 651 652 return 0; 653 } 654 #endif 655 656 #ifdef CONFIG_SYS_EXTBDINFO 657 static int setup_board_extra(void) 658 { 659 bd_t *bd = gd->bd; 660 661 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 662 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 663 sizeof(bd->bi_r_version)); 664 665 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 666 bd->bi_plb_busfreq = gd->bus_clk; 667 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 668 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 669 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 670 bd->bi_pci_busfreq = get_PCI_freq(); 671 bd->bi_opbfreq = get_OPB_freq(); 672 #elif defined(CONFIG_XILINX_405) 673 bd->bi_pci_busfreq = get_PCI_freq(); 674 #endif 675 676 return 0; 677 } 678 #endif 679 680 #ifdef CONFIG_POST 681 static int init_post(void) 682 { 683 post_bootmode_init(); 684 post_run(NULL, POST_ROM | post_bootmode_get(0)); 685 686 return 0; 687 } 688 #endif 689 690 static int setup_dram_config(void) 691 { 692 /* Ram is board specific, so move it to board code ... */ 693 dram_init_banksize(); 694 695 return 0; 696 } 697 698 static int reloc_fdt(void) 699 { 700 #ifndef CONFIG_OF_EMBED 701 if (gd->flags & GD_FLG_SKIP_RELOC) 702 return 0; 703 if (gd->new_fdt) { 704 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 705 gd->fdt_blob = gd->new_fdt; 706 } 707 #endif 708 709 return 0; 710 } 711 712 static int setup_reloc(void) 713 { 714 if (gd->flags & GD_FLG_SKIP_RELOC) { 715 debug("Skipping relocation due to flag\n"); 716 return 0; 717 } 718 719 #ifdef CONFIG_SYS_TEXT_BASE 720 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 721 #ifdef CONFIG_M68K 722 /* 723 * On all ColdFire arch cpu, monitor code starts always 724 * just after the default vector table location, so at 0x400 725 */ 726 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 727 #endif 728 #endif 729 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 730 731 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 732 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 733 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 734 gd->start_addr_sp); 735 736 return 0; 737 } 738 739 #ifdef CONFIG_OF_BOARD_FIXUP 740 static int fix_fdt(void) 741 { 742 return board_fix_fdt((void *)gd->fdt_blob); 743 } 744 #endif 745 746 /* ARM calls relocate_code from its crt0.S */ 747 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 748 !CONFIG_IS_ENABLED(X86_64) 749 750 static int jump_to_copy(void) 751 { 752 if (gd->flags & GD_FLG_SKIP_RELOC) 753 return 0; 754 /* 755 * x86 is special, but in a nice way. It uses a trampoline which 756 * enables the dcache if possible. 757 * 758 * For now, other archs use relocate_code(), which is implemented 759 * similarly for all archs. When we do generic relocation, hopefully 760 * we can make all archs enable the dcache prior to relocation. 761 */ 762 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 763 /* 764 * SDRAM and console are now initialised. The final stack can now 765 * be setup in SDRAM. Code execution will continue in Flash, but 766 * with the stack in SDRAM and Global Data in temporary memory 767 * (CPU cache) 768 */ 769 arch_setup_gd(gd->new_gd); 770 board_init_f_r_trampoline(gd->start_addr_sp); 771 #else 772 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 773 #endif 774 775 return 0; 776 } 777 #endif 778 779 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 780 static int mark_bootstage(void) 781 { 782 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 783 784 return 0; 785 } 786 787 static int initf_console_record(void) 788 { 789 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 790 return console_record_init(); 791 #else 792 return 0; 793 #endif 794 } 795 796 static int initf_dm(void) 797 { 798 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 799 int ret; 800 801 ret = dm_init_and_scan(true); 802 if (ret) 803 return ret; 804 #endif 805 #ifdef CONFIG_TIMER_EARLY 806 ret = dm_timer_init(); 807 if (ret) 808 return ret; 809 #endif 810 811 return 0; 812 } 813 814 /* Architecture-specific memory reservation */ 815 __weak int reserve_arch(void) 816 { 817 return 0; 818 } 819 820 __weak int arch_cpu_init_dm(void) 821 { 822 return 0; 823 } 824 825 static const init_fnc_t init_sequence_f[] = { 826 #ifdef CONFIG_SANDBOX 827 setup_ram_buf, 828 #endif 829 setup_mon_len, 830 #ifdef CONFIG_OF_CONTROL 831 fdtdec_setup, 832 #endif 833 #ifdef CONFIG_TRACE 834 trace_early_init, 835 #endif 836 initf_malloc, 837 initf_console_record, 838 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) 839 x86_fsp_init, 840 #endif 841 arch_cpu_init, /* basic arch cpu dependent setup */ 842 mach_cpu_init, /* SoC/machine dependent CPU setup */ 843 initf_dm, 844 arch_cpu_init_dm, 845 mark_bootstage, /* need timer, go after init dm */ 846 #if defined(CONFIG_BOARD_EARLY_INIT_F) 847 board_early_init_f, 848 #endif 849 /* TODO: can any of this go into arch_cpu_init()? */ 850 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 851 get_clocks, /* get CPU and bus clocks (etc.) */ 852 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 853 && !defined(CONFIG_TQM885D) 854 adjust_sdram_tbs_8xx, 855 #endif 856 /* TODO: can we rename this to timer_init()? */ 857 init_timebase, 858 #endif 859 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \ 860 defined(CONFIG_NDS32) || defined(CONFIG_SH) 861 timer_init, /* initialize timer */ 862 #endif 863 #if defined(CONFIG_BOARD_POSTCLK_INIT) 864 board_postclk_init, 865 #endif 866 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 867 get_clocks, 868 #endif 869 env_init, /* initialize environment */ 870 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 871 /* get CPU and bus clocks according to the environment variable */ 872 get_clocks_866, 873 /* adjust sdram refresh rate according to the new clock */ 874 sdram_adjust_866, 875 init_timebase, 876 #endif 877 init_baud_rate, /* initialze baudrate settings */ 878 serial_init, /* serial communications setup */ 879 console_init_f, /* stage 1 init of console */ 880 #ifdef CONFIG_SANDBOX 881 sandbox_early_getopt_check, 882 #endif 883 display_options, /* say that we are here */ 884 display_text_info, /* show debugging info if required */ 885 #if defined(CONFIG_MPC8260) 886 prt_8260_rsr, 887 prt_8260_clks, 888 #endif /* CONFIG_MPC8260 */ 889 #if defined(CONFIG_MPC83xx) 890 prt_83xx_rsr, 891 #endif 892 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) 893 checkcpu, 894 #endif 895 #if defined(CONFIG_DISPLAY_CPUINFO) 896 print_cpuinfo, /* display cpu info (and speed) */ 897 #endif 898 #if defined(CONFIG_DISPLAY_BOARDINFO) 899 show_board_info, 900 #endif 901 INIT_FUNC_WATCHDOG_INIT 902 #if defined(CONFIG_MISC_INIT_F) 903 misc_init_f, 904 #endif 905 INIT_FUNC_WATCHDOG_RESET 906 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 907 init_func_i2c, 908 #endif 909 #if defined(CONFIG_HARD_SPI) 910 init_func_spi, 911 #endif 912 announce_dram_init, 913 /* TODO: unify all these dram functions? */ 914 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 915 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 916 defined(CONFIG_SH) 917 dram_init, /* configure available RAM banks */ 918 #endif 919 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 920 init_func_ram, 921 #endif 922 #ifdef CONFIG_POST 923 post_init_f, 924 #endif 925 INIT_FUNC_WATCHDOG_RESET 926 #if defined(CONFIG_SYS_DRAM_TEST) 927 testdram, 928 #endif /* CONFIG_SYS_DRAM_TEST */ 929 INIT_FUNC_WATCHDOG_RESET 930 931 #ifdef CONFIG_POST 932 init_post, 933 #endif 934 INIT_FUNC_WATCHDOG_RESET 935 /* 936 * Now that we have DRAM mapped and working, we can 937 * relocate the code and continue running from DRAM. 938 * 939 * Reserve memory at end of RAM for (top down in that order): 940 * - area that won't get touched by U-Boot and Linux (optional) 941 * - kernel log buffer 942 * - protected RAM 943 * - LCD framebuffer 944 * - monitor code 945 * - board info struct 946 */ 947 setup_dest_addr, 948 #if defined(CONFIG_XTENSA) 949 /* Blackfin u-boot monitor should be on top of the ram */ 950 reserve_uboot, 951 #endif 952 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 953 reserve_logbuffer, 954 #endif 955 #ifdef CONFIG_PRAM 956 reserve_pram, 957 #endif 958 reserve_round_4k, 959 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 960 defined(CONFIG_ARM) 961 reserve_mmu, 962 #endif 963 #ifdef CONFIG_DM_VIDEO 964 reserve_video, 965 #else 966 # ifdef CONFIG_LCD 967 reserve_lcd, 968 # endif 969 /* TODO: Why the dependency on CONFIG_8xx? */ 970 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 971 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 972 !defined(CONFIG_M68K) 973 reserve_legacy_video, 974 # endif 975 #endif /* CONFIG_DM_VIDEO */ 976 reserve_trace, 977 #if !defined(CONFIG_XTENSA) 978 reserve_uboot, 979 #endif 980 #ifndef CONFIG_SPL_BUILD 981 reserve_malloc, 982 reserve_board, 983 #endif 984 setup_machine, 985 reserve_global_data, 986 reserve_fdt, 987 reserve_arch, 988 reserve_stacks, 989 setup_dram_config, 990 show_dram_config, 991 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 992 defined(CONFIG_SH) 993 setup_board_part1, 994 #endif 995 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 996 INIT_FUNC_WATCHDOG_RESET 997 setup_board_part2, 998 #endif 999 display_new_sp, 1000 #ifdef CONFIG_SYS_EXTBDINFO 1001 setup_board_extra, 1002 #endif 1003 #ifdef CONFIG_OF_BOARD_FIXUP 1004 fix_fdt, 1005 #endif 1006 INIT_FUNC_WATCHDOG_RESET 1007 reloc_fdt, 1008 setup_reloc, 1009 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1010 copy_uboot_to_ram, 1011 do_elf_reloc_fixups, 1012 clear_bss, 1013 #endif 1014 #if defined(CONFIG_XTENSA) 1015 clear_bss, 1016 #endif 1017 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 1018 !CONFIG_IS_ENABLED(X86_64) 1019 jump_to_copy, 1020 #endif 1021 NULL, 1022 }; 1023 1024 void board_init_f(ulong boot_flags) 1025 { 1026 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 1027 /* 1028 * For some architectures, global data is initialized and used before 1029 * calling this function. The data should be preserved. For others, 1030 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 1031 * here to host global data until relocation. 1032 */ 1033 gd_t data; 1034 1035 gd = &data; 1036 1037 /* 1038 * Clear global data before it is accessed at debug print 1039 * in initcall_run_list. Otherwise the debug print probably 1040 * get the wrong value of gd->have_console. 1041 */ 1042 zero_global_data(); 1043 #endif 1044 1045 gd->flags = boot_flags; 1046 gd->have_console = 0; 1047 1048 if (initcall_run_list(init_sequence_f)) 1049 hang(); 1050 1051 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 1052 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 1053 /* NOTREACHED - jump_to_copy() does not return */ 1054 hang(); 1055 #endif 1056 } 1057 1058 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1059 /* 1060 * For now this code is only used on x86. 1061 * 1062 * init_sequence_f_r is the list of init functions which are run when 1063 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1064 * The following limitations must be considered when implementing an 1065 * '_f_r' function: 1066 * - 'static' variables are read-only 1067 * - Global Data (gd->xxx) is read/write 1068 * 1069 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1070 * supported). It _should_, if possible, copy global data to RAM and 1071 * initialise the CPU caches (to speed up the relocation process) 1072 * 1073 * NOTE: At present only x86 uses this route, but it is intended that 1074 * all archs will move to this when generic relocation is implemented. 1075 */ 1076 static const init_fnc_t init_sequence_f_r[] = { 1077 #if !CONFIG_IS_ENABLED(X86_64) 1078 init_cache_f_r, 1079 #endif 1080 1081 NULL, 1082 }; 1083 1084 void board_init_f_r(void) 1085 { 1086 if (initcall_run_list(init_sequence_f_r)) 1087 hang(); 1088 1089 /* 1090 * The pre-relocation drivers may be using memory that has now gone 1091 * away. Mark serial as unavailable - this will fall back to the debug 1092 * UART if available. 1093 */ 1094 gd->flags &= ~GD_FLG_SERIAL_READY; 1095 1096 /* 1097 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1098 * Transfer execution from Flash to RAM by calculating the address 1099 * of the in-RAM copy of board_init_r() and calling it 1100 */ 1101 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1102 1103 /* NOTREACHED - board_init_r() does not return */ 1104 hang(); 1105 } 1106 #endif /* CONFIG_X86 */ 1107