1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * See file CREDITS for list of people who contributed to this 11 * project. 12 * 13 * This program is free software; you can redistribute it and/or 14 * modify it under the terms of the GNU General Public License as 15 * published by the Free Software Foundation; either version 2 of 16 * the License, or (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 26 * MA 02111-1307 USA 27 */ 28 29 #include <common.h> 30 #include <linux/compiler.h> 31 #include <version.h> 32 #include <environment.h> 33 #include <fdtdec.h> 34 #include <fs.h> 35 #if defined(CONFIG_CMD_IDE) 36 #include <ide.h> 37 #endif 38 #include <i2c.h> 39 #include <initcall.h> 40 #include <logbuff.h> 41 42 /* TODO: Can we move these into arch/ headers? */ 43 #ifdef CONFIG_8xx 44 #include <mpc8xx.h> 45 #endif 46 #ifdef CONFIG_5xx 47 #include <mpc5xx.h> 48 #endif 49 #ifdef CONFIG_MPC5xxx 50 #include <mpc5xxx.h> 51 #endif 52 53 #include <os.h> 54 #include <post.h> 55 #include <spi.h> 56 #include <watchdog.h> 57 #include <asm/errno.h> 58 #include <asm/io.h> 59 #ifdef CONFIG_MP 60 #include <asm/mp.h> 61 #endif 62 #include <asm/sections.h> 63 #ifdef CONFIG_X86 64 #include <asm/init_helpers.h> 65 #include <asm/relocate.h> 66 #endif 67 #ifdef CONFIG_SANDBOX 68 #include <asm/state.h> 69 #endif 70 #include <linux/compiler.h> 71 72 /* 73 * Pointer to initial global data area 74 * 75 * Here we initialize it if needed. 76 */ 77 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 78 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 79 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 80 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 81 #else 82 DECLARE_GLOBAL_DATA_PTR; 83 #endif 84 85 /* 86 * sjg: IMO this code should be 87 * refactored to a single function, something like: 88 * 89 * void led_set_state(enum led_colour_t colour, int on); 90 */ 91 /************************************************************************ 92 * Coloured LED functionality 93 ************************************************************************ 94 * May be supplied by boards if desired 95 */ 96 inline void __coloured_LED_init(void) {} 97 void coloured_LED_init(void) 98 __attribute__((weak, alias("__coloured_LED_init"))); 99 inline void __red_led_on(void) {} 100 void red_led_on(void) __attribute__((weak, alias("__red_led_on"))); 101 inline void __red_led_off(void) {} 102 void red_led_off(void) __attribute__((weak, alias("__red_led_off"))); 103 inline void __green_led_on(void) {} 104 void green_led_on(void) __attribute__((weak, alias("__green_led_on"))); 105 inline void __green_led_off(void) {} 106 void green_led_off(void) __attribute__((weak, alias("__green_led_off"))); 107 inline void __yellow_led_on(void) {} 108 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on"))); 109 inline void __yellow_led_off(void) {} 110 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off"))); 111 inline void __blue_led_on(void) {} 112 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on"))); 113 inline void __blue_led_off(void) {} 114 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off"))); 115 116 /* 117 * Why is gd allocated a register? Prior to reloc it might be better to 118 * just pass it around to each function in this file? 119 * 120 * After reloc one could argue that it is hardly used and doesn't need 121 * to be in a register. Or if it is it should perhaps hold pointers to all 122 * global data for all modules, so that post-reloc we can avoid the massive 123 * literal pool we get on ARM. Or perhaps just encourage each module to use 124 * a structure... 125 */ 126 127 /* 128 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 129 */ 130 131 #if defined(CONFIG_WATCHDOG) 132 static int init_func_watchdog_init(void) 133 { 134 puts(" Watchdog enabled\n"); 135 WATCHDOG_RESET(); 136 137 return 0; 138 } 139 140 int init_func_watchdog_reset(void) 141 { 142 WATCHDOG_RESET(); 143 144 return 0; 145 } 146 #endif /* CONFIG_WATCHDOG */ 147 148 void __board_add_ram_info(int use_default) 149 { 150 /* please define platform specific board_add_ram_info() */ 151 } 152 153 void board_add_ram_info(int) 154 __attribute__ ((weak, alias("__board_add_ram_info"))); 155 156 static int init_baud_rate(void) 157 { 158 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 159 return 0; 160 } 161 162 static int display_text_info(void) 163 { 164 #ifndef CONFIG_SANDBOX 165 ulong bss_start, bss_end; 166 167 #ifdef CONFIG_SYS_SYM_OFFSETS 168 bss_start = _bss_start_ofs + _TEXT_BASE; 169 bss_end = _bss_end_ofs + _TEXT_BASE; 170 #else 171 bss_start = (ulong)&__bss_start; 172 bss_end = (ulong)&__bss_end; 173 #endif 174 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n", 175 CONFIG_SYS_TEXT_BASE, bss_start, bss_end); 176 #endif 177 178 #ifdef CONFIG_MODEM_SUPPORT 179 debug("Modem Support enabled\n"); 180 #endif 181 #ifdef CONFIG_USE_IRQ 182 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 183 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 184 #endif 185 186 return 0; 187 } 188 189 static int announce_dram_init(void) 190 { 191 puts("DRAM: "); 192 return 0; 193 } 194 195 #ifdef CONFIG_PPC 196 static int init_func_ram(void) 197 { 198 #ifdef CONFIG_BOARD_TYPES 199 int board_type = gd->board_type; 200 #else 201 int board_type = 0; /* use dummy arg */ 202 #endif 203 204 gd->ram_size = initdram(board_type); 205 206 if (gd->ram_size > 0) 207 return 0; 208 209 puts("*** failed ***\n"); 210 return 1; 211 } 212 #endif 213 214 static int show_dram_config(void) 215 { 216 ulong size; 217 218 #ifdef CONFIG_NR_DRAM_BANKS 219 int i; 220 221 debug("\nRAM Configuration:\n"); 222 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 223 size += gd->bd->bi_dram[i].size; 224 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); 225 #ifdef DEBUG 226 print_size(gd->bd->bi_dram[i].size, "\n"); 227 #endif 228 } 229 debug("\nDRAM: "); 230 #else 231 size = gd->ram_size; 232 #endif 233 234 print_size(size, ""); 235 board_add_ram_info(0); 236 putc('\n'); 237 238 return 0; 239 } 240 241 ulong get_effective_memsize(void) 242 { 243 #ifndef CONFIG_VERY_BIG_RAM 244 return gd->ram_size; 245 #else 246 /* limit stack to what we can reasonable map */ 247 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ? 248 CONFIG_MAX_MEM_MAPPED : gd->ram_size); 249 #endif 250 } 251 252 void __dram_init_banksize(void) 253 { 254 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 255 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 256 gd->bd->bi_dram[0].size = get_effective_memsize(); 257 #endif 258 } 259 260 void dram_init_banksize(void) 261 __attribute__((weak, alias("__dram_init_banksize"))); 262 263 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) 264 static int init_func_i2c(void) 265 { 266 puts("I2C: "); 267 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 268 puts("ready\n"); 269 return 0; 270 } 271 #endif 272 273 #if defined(CONFIG_HARD_SPI) 274 static int init_func_spi(void) 275 { 276 puts("SPI: "); 277 spi_init(); 278 puts("ready\n"); 279 return 0; 280 } 281 #endif 282 283 __maybe_unused 284 static int zero_global_data(void) 285 { 286 memset((void *)gd, '\0', sizeof(gd_t)); 287 288 return 0; 289 } 290 291 static int setup_mon_len(void) 292 { 293 #ifdef CONFIG_SYS_SYM_OFFSETS 294 gd->mon_len = _bss_end_ofs; 295 #elif defined(CONFIG_SANDBOX) 296 gd->mon_len = (ulong)&_end - (ulong)_init; 297 #else 298 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 299 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 300 #endif 301 return 0; 302 } 303 304 __weak int arch_cpu_init(void) 305 { 306 return 0; 307 } 308 309 #ifdef CONFIG_OF_HOSTFILE 310 311 #define CHECK(x) err = (x); if (err) goto failed; 312 313 /* Create an empty device tree blob */ 314 static int make_empty_fdt(void *fdt) 315 { 316 int err; 317 318 CHECK(fdt_create(fdt, 256)); 319 CHECK(fdt_finish_reservemap(fdt)); 320 CHECK(fdt_begin_node(fdt, "")); 321 CHECK(fdt_end_node(fdt)); 322 CHECK(fdt_finish(fdt)); 323 324 return 0; 325 failed: 326 printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); 327 return -EACCES; 328 } 329 330 static int read_fdt_from_file(void) 331 { 332 struct sandbox_state *state = state_get_current(); 333 void *blob; 334 int size; 335 int err; 336 337 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); 338 if (!state->fdt_fname) { 339 err = make_empty_fdt(blob); 340 if (!err) 341 goto done; 342 return err; 343 } 344 err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX); 345 if (err) 346 return err; 347 size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0); 348 if (size < 0) 349 return -EIO; 350 351 done: 352 gd->fdt_blob = blob; 353 354 return 0; 355 } 356 #endif 357 358 #ifdef CONFIG_SANDBOX 359 static int setup_ram_buf(void) 360 { 361 gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE); 362 assert(gd->arch.ram_buf); 363 gd->ram_size = CONFIG_SYS_SDRAM_SIZE; 364 365 return 0; 366 } 367 #endif 368 369 static int setup_fdt(void) 370 { 371 #ifdef CONFIG_OF_EMBED 372 /* Get a pointer to the FDT */ 373 gd->fdt_blob = _binary_dt_dtb_start; 374 #elif defined CONFIG_OF_SEPARATE 375 /* FDT is at end of image */ 376 # ifdef CONFIG_SYS_SYM_OFFSETS 377 gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE); 378 # else 379 gd->fdt_blob = (ulong *)&_end; 380 # endif 381 #elif defined(CONFIG_OF_HOSTFILE) 382 if (read_fdt_from_file()) { 383 puts("Failed to read control FDT\n"); 384 return -1; 385 } 386 #endif 387 /* Allow the early environment to override the fdt address */ 388 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, 389 (uintptr_t)gd->fdt_blob); 390 return 0; 391 } 392 393 /* Get the top of usable RAM */ 394 __weak ulong board_get_usable_ram_top(ulong total_size) 395 { 396 return gd->ram_top; 397 } 398 399 static int setup_dest_addr(void) 400 { 401 debug("Monitor len: %08lX\n", gd->mon_len); 402 /* 403 * Ram is setup, size stored in gd !! 404 */ 405 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 406 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 407 /* 408 * Subtract specified amount of memory to hide so that it won't 409 * get "touched" at all by U-Boot. By fixing up gd->ram_size 410 * the Linux kernel should now get passed the now "corrected" 411 * memory size and won't touch it either. This should work 412 * for arch/ppc and arch/powerpc. Only Linux board ports in 413 * arch/powerpc with bootwrapper support, that recalculate the 414 * memory size from the SDRAM controller setup will have to 415 * get fixed. 416 */ 417 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 418 #endif 419 #ifdef CONFIG_SYS_SDRAM_BASE 420 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 421 #endif 422 gd->ram_top += get_effective_memsize(); 423 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 424 gd->dest_addr = gd->ram_top; 425 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 426 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 427 /* 428 * We need to make sure the location we intend to put secondary core 429 * boot code is reserved and not used by any part of u-boot 430 */ 431 if (gd->dest_addr > determine_mp_bootpg(NULL)) { 432 gd->dest_addr = determine_mp_bootpg(NULL); 433 debug("Reserving MP boot page to %08lx\n", gd->dest_addr); 434 } 435 #endif 436 gd->dest_addr_sp = gd->dest_addr; 437 return 0; 438 } 439 440 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 441 static int reserve_logbuffer(void) 442 { 443 /* reserve kernel log buffer */ 444 gd->dest_addr -= LOGBUFF_RESERVE; 445 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 446 gd->dest_addr); 447 return 0; 448 } 449 #endif 450 451 #ifdef CONFIG_PRAM 452 /* reserve protected RAM */ 453 static int reserve_pram(void) 454 { 455 ulong reg; 456 457 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 458 gd->dest_addr -= (reg << 10); /* size is in kB */ 459 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 460 gd->dest_addr); 461 return 0; 462 } 463 #endif /* CONFIG_PRAM */ 464 465 /* Round memory pointer down to next 4 kB limit */ 466 static int reserve_round_4k(void) 467 { 468 gd->dest_addr &= ~(4096 - 1); 469 return 0; 470 } 471 472 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 473 defined(CONFIG_ARM) 474 static int reserve_mmu(void) 475 { 476 /* reserve TLB table */ 477 gd->arch.tlb_size = 4096 * 4; 478 gd->dest_addr -= gd->arch.tlb_size; 479 480 /* round down to next 64 kB limit */ 481 gd->dest_addr &= ~(0x10000 - 1); 482 483 gd->arch.tlb_addr = gd->dest_addr; 484 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 485 gd->arch.tlb_addr + gd->arch.tlb_size); 486 return 0; 487 } 488 #endif 489 490 #ifdef CONFIG_LCD 491 static int reserve_lcd(void) 492 { 493 #ifdef CONFIG_FB_ADDR 494 gd->fb_base = CONFIG_FB_ADDR; 495 #else 496 /* reserve memory for LCD display (always full pages) */ 497 gd->dest_addr = lcd_setmem(gd->dest_addr); 498 gd->fb_base = gd->dest_addr; 499 #endif /* CONFIG_FB_ADDR */ 500 return 0; 501 } 502 #endif /* CONFIG_LCD */ 503 504 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ 505 && !defined(CONFIG_ARM) && !defined(CONFIG_X86) 506 static int reserve_video(void) 507 { 508 /* reserve memory for video display (always full pages) */ 509 gd->dest_addr = video_setmem(gd->dest_addr); 510 gd->fb_base = gd->dest_addr; 511 512 return 0; 513 } 514 #endif 515 516 static int reserve_uboot(void) 517 { 518 /* 519 * reserve memory for U-Boot code, data & bss 520 * round down to next 4 kB limit 521 */ 522 gd->dest_addr -= gd->mon_len; 523 gd->dest_addr &= ~(4096 - 1); 524 #ifdef CONFIG_E500 525 /* round down to next 64 kB limit so that IVPR stays aligned */ 526 gd->dest_addr &= ~(65536 - 1); 527 #endif 528 529 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 530 gd->dest_addr); 531 return 0; 532 } 533 534 #ifndef CONFIG_SPL_BUILD 535 /* reserve memory for malloc() area */ 536 static int reserve_malloc(void) 537 { 538 gd->dest_addr_sp = gd->dest_addr - TOTAL_MALLOC_LEN; 539 debug("Reserving %dk for malloc() at: %08lx\n", 540 TOTAL_MALLOC_LEN >> 10, gd->dest_addr_sp); 541 return 0; 542 } 543 544 /* (permanently) allocate a Board Info struct */ 545 static int reserve_board(void) 546 { 547 gd->dest_addr_sp -= sizeof(bd_t); 548 gd->bd = (bd_t *)map_sysmem(gd->dest_addr_sp, sizeof(bd_t)); 549 memset(gd->bd, '\0', sizeof(bd_t)); 550 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 551 sizeof(bd_t), gd->dest_addr_sp); 552 return 0; 553 } 554 #endif 555 556 static int setup_machine(void) 557 { 558 #ifdef CONFIG_MACH_TYPE 559 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 560 #endif 561 return 0; 562 } 563 564 static int reserve_global_data(void) 565 { 566 gd->dest_addr_sp -= sizeof(gd_t); 567 gd->new_gd = (gd_t *)map_sysmem(gd->dest_addr_sp, sizeof(gd_t)); 568 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 569 sizeof(gd_t), gd->dest_addr_sp); 570 return 0; 571 } 572 573 static int reserve_fdt(void) 574 { 575 /* 576 * If the device tree is sitting immediate above our image then we 577 * must relocate it. If it is embedded in the data section, then it 578 * will be relocated with other data. 579 */ 580 if (gd->fdt_blob) { 581 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 582 583 gd->dest_addr_sp -= gd->fdt_size; 584 gd->new_fdt = map_sysmem(gd->dest_addr_sp, gd->fdt_size); 585 debug("Reserving %lu Bytes for FDT at: %08lx\n", 586 gd->fdt_size, gd->dest_addr_sp); 587 } 588 589 return 0; 590 } 591 592 static int reserve_stacks(void) 593 { 594 #ifdef CONFIG_SPL_BUILD 595 # ifdef CONFIG_ARM 596 gd->dest_addr_sp -= 128; /* leave 32 words for abort-stack */ 597 gd->irq_sp = gd->dest_addr_sp; 598 # endif 599 #else 600 # ifdef CONFIG_PPC 601 ulong *s; 602 # endif 603 604 /* setup stack pointer for exceptions */ 605 gd->dest_addr_sp -= 16; 606 gd->dest_addr_sp &= ~0xf; 607 gd->irq_sp = gd->dest_addr_sp; 608 609 /* 610 * Handle architecture-specific things here 611 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() 612 * to handle this and put in arch/xxx/lib/stack.c 613 */ 614 # ifdef CONFIG_ARM 615 # ifdef CONFIG_USE_IRQ 616 gd->dest_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); 617 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", 618 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->dest_addr_sp); 619 620 /* 8-byte alignment for ARM ABI compliance */ 621 gd->dest_addr_sp &= ~0x07; 622 # endif 623 /* leave 3 words for abort-stack, plus 1 for alignment */ 624 gd->dest_addr_sp -= 16; 625 # elif defined(CONFIG_PPC) 626 /* Clear initial stack frame */ 627 s = (ulong *) gd->dest_addr_sp; 628 *s = 0; /* Terminate back chain */ 629 *++s = 0; /* NULL return address */ 630 # endif /* Architecture specific code */ 631 632 return 0; 633 #endif 634 } 635 636 static int display_new_sp(void) 637 { 638 debug("New Stack Pointer is: %08lx\n", gd->dest_addr_sp); 639 640 return 0; 641 } 642 643 #ifdef CONFIG_PPC 644 static int setup_board_part1(void) 645 { 646 bd_t *bd = gd->bd; 647 648 /* 649 * Save local variables to board info struct 650 */ 651 652 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 653 bd->bi_memsize = gd->ram_size; /* size in bytes */ 654 655 #ifdef CONFIG_SYS_SRAM_BASE 656 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 657 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 658 #endif 659 660 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ 661 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 662 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 663 #endif 664 #if defined(CONFIG_MPC5xxx) 665 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 666 #endif 667 #if defined(CONFIG_MPC83xx) 668 bd->bi_immrbar = CONFIG_SYS_IMMR; 669 #endif 670 #if defined(CONFIG_MPC8220) 671 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 672 bd->bi_inpfreq = gd->arch.inp_clk; 673 bd->bi_pcifreq = gd->pci_clk; 674 bd->bi_vcofreq = gd->arch.vco_clk; 675 bd->bi_pevfreq = gd->arch.pev_clk; 676 bd->bi_flbfreq = gd->arch.flb_clk; 677 678 /* store bootparam to sram (backward compatible), here? */ 679 { 680 u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE; 681 682 *sram++ = gd->ram_size; 683 *sram++ = gd->bus_clk; 684 *sram++ = gd->arch.inp_clk; 685 *sram++ = gd->cpu_clk; 686 *sram++ = gd->arch.vco_clk; 687 *sram++ = gd->arch.flb_clk; 688 *sram++ = 0xb8c3ba11; /* boot signature */ 689 } 690 #endif 691 692 return 0; 693 } 694 695 static int setup_board_part2(void) 696 { 697 bd_t *bd = gd->bd; 698 699 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 700 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 701 #if defined(CONFIG_CPM2) 702 bd->bi_cpmfreq = gd->arch.cpm_clk; 703 bd->bi_brgfreq = gd->arch.brg_clk; 704 bd->bi_sccfreq = gd->arch.scc_clk; 705 bd->bi_vco = gd->arch.vco_out; 706 #endif /* CONFIG_CPM2 */ 707 #if defined(CONFIG_MPC512X) 708 bd->bi_ipsfreq = gd->arch.ips_clk; 709 #endif /* CONFIG_MPC512X */ 710 #if defined(CONFIG_MPC5xxx) 711 bd->bi_ipbfreq = gd->arch.ipb_clk; 712 bd->bi_pcifreq = gd->pci_clk; 713 #endif /* CONFIG_MPC5xxx */ 714 715 return 0; 716 } 717 #endif 718 719 #ifdef CONFIG_SYS_EXTBDINFO 720 static int setup_board_extra(void) 721 { 722 bd_t *bd = gd->bd; 723 724 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 725 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 726 sizeof(bd->bi_r_version)); 727 728 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 729 bd->bi_plb_busfreq = gd->bus_clk; 730 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 731 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 732 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 733 bd->bi_pci_busfreq = get_PCI_freq(); 734 bd->bi_opbfreq = get_OPB_freq(); 735 #elif defined(CONFIG_XILINX_405) 736 bd->bi_pci_busfreq = get_PCI_freq(); 737 #endif 738 739 return 0; 740 } 741 #endif 742 743 #ifdef CONFIG_POST 744 static int init_post(void) 745 { 746 post_bootmode_init(); 747 post_run(NULL, POST_ROM | post_bootmode_get(0)); 748 749 return 0; 750 } 751 #endif 752 753 static int setup_baud_rate(void) 754 { 755 /* Ick, can we get rid of this line? */ 756 gd->bd->bi_baudrate = gd->baudrate; 757 758 return 0; 759 } 760 761 static int setup_dram_config(void) 762 { 763 /* Ram is board specific, so move it to board code ... */ 764 dram_init_banksize(); 765 766 return 0; 767 } 768 769 static int reloc_fdt(void) 770 { 771 if (gd->new_fdt) { 772 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 773 gd->fdt_blob = gd->new_fdt; 774 } 775 776 return 0; 777 } 778 779 static int setup_reloc(void) 780 { 781 gd->relocaddr = gd->dest_addr; 782 gd->start_addr_sp = gd->dest_addr_sp; 783 gd->reloc_off = gd->dest_addr - CONFIG_SYS_TEXT_BASE; 784 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 785 786 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 787 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 788 gd->dest_addr, (ulong)map_to_sysmem(gd->new_gd), 789 gd->dest_addr_sp); 790 791 return 0; 792 } 793 794 /* ARM calls relocate_code from its crt0.S */ 795 #if !defined(CONFIG_ARM) 796 797 static int jump_to_copy(void) 798 { 799 /* 800 * x86 is special, but in a nice way. It uses a trampoline which 801 * enables the dcache if possible. 802 * 803 * For now, other archs use relocate_code(), which is implemented 804 * similarly for all archs. When we do generic relocation, hopefully 805 * we can make all archs enable the dcache prior to relocation. 806 */ 807 #ifdef CONFIG_X86 808 /* 809 * SDRAM and console are now initialised. The final stack can now 810 * be setup in SDRAM. Code execution will continue in Flash, but 811 * with the stack in SDRAM and Global Data in temporary memory 812 * (CPU cache) 813 */ 814 board_init_f_r_trampoline(gd->start_addr_sp); 815 #elif defined(CONFIG_SANDBOX) 816 board_init_r(gd->new_gd, 0); 817 #else 818 relocate_code(gd->dest_addr_sp, gd->new_gd, gd->dest_addr); 819 #endif 820 821 return 0; 822 } 823 #endif 824 825 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 826 static int mark_bootstage(void) 827 { 828 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 829 830 return 0; 831 } 832 833 static init_fnc_t init_sequence_f[] = { 834 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ 835 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ 836 !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86) 837 zero_global_data, 838 #endif 839 #ifdef CONFIG_SANDBOX 840 setup_ram_buf, 841 #endif 842 setup_fdt, 843 setup_mon_len, 844 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 845 /* TODO: can this go into arch_cpu_init()? */ 846 probecpu, 847 #endif 848 arch_cpu_init, /* basic arch cpu dependent setup */ 849 #ifdef CONFIG_X86 850 cpu_init_f, /* TODO(sjg@chromium.org): remove */ 851 # ifdef CONFIG_OF_CONTROL 852 find_fdt, /* TODO(sjg@chromium.org): remove */ 853 # endif 854 #endif 855 mark_bootstage, 856 #ifdef CONFIG_OF_CONTROL 857 fdtdec_check_fdt, 858 #endif 859 #if defined(CONFIG_BOARD_EARLY_INIT_F) 860 board_early_init_f, 861 #endif 862 /* TODO: can any of this go into arch_cpu_init()? */ 863 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 864 get_clocks, /* get CPU and bus clocks (etc.) */ 865 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 866 && !defined(CONFIG_TQM885D) 867 adjust_sdram_tbs_8xx, 868 #endif 869 /* TODO: can we rename this to timer_init()? */ 870 init_timebase, 871 #endif 872 #ifdef CONFIG_ARM 873 timer_init, /* initialize timer */ 874 #endif 875 #ifdef CONFIG_BOARD_POSTCLK_INIT 876 board_postclk_init, 877 #endif 878 #ifdef CONFIG_FSL_ESDHC 879 get_clocks, 880 #endif 881 #ifdef CONFIG_SYS_ALLOC_DPRAM 882 #if !defined(CONFIG_CPM2) 883 dpram_init, 884 #endif 885 #endif 886 #if defined(CONFIG_BOARD_POSTCLK_INIT) 887 board_postclk_init, 888 #endif 889 env_init, /* initialize environment */ 890 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 891 /* get CPU and bus clocks according to the environment variable */ 892 get_clocks_866, 893 /* adjust sdram refresh rate according to the new clock */ 894 sdram_adjust_866, 895 init_timebase, 896 #endif 897 init_baud_rate, /* initialze baudrate settings */ 898 serial_init, /* serial communications setup */ 899 console_init_f, /* stage 1 init of console */ 900 #ifdef CONFIG_SANDBOX 901 sandbox_early_getopt_check, 902 #endif 903 #ifdef CONFIG_OF_CONTROL 904 fdtdec_prepare_fdt, 905 #endif 906 display_options, /* say that we are here */ 907 display_text_info, /* show debugging info if required */ 908 #if defined(CONFIG_8260) 909 prt_8260_rsr, 910 prt_8260_clks, 911 #endif /* CONFIG_8260 */ 912 #if defined(CONFIG_MPC83xx) 913 prt_83xx_rsr, 914 #endif 915 #ifdef CONFIG_PPC 916 checkcpu, 917 #endif 918 #if defined(CONFIG_DISPLAY_CPUINFO) 919 print_cpuinfo, /* display cpu info (and speed) */ 920 #endif 921 #if defined(CONFIG_MPC5xxx) 922 prt_mpc5xxx_clks, 923 #endif /* CONFIG_MPC5xxx */ 924 #if defined(CONFIG_MPC8220) 925 prt_mpc8220_clks, 926 #endif 927 #if defined(CONFIG_DISPLAY_BOARDINFO) 928 checkboard, /* display board info */ 929 #endif 930 INIT_FUNC_WATCHDOG_INIT 931 #if defined(CONFIG_MISC_INIT_F) 932 misc_init_f, 933 #endif 934 INIT_FUNC_WATCHDOG_RESET 935 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) 936 init_func_i2c, 937 #endif 938 #if defined(CONFIG_HARD_SPI) 939 init_func_spi, 940 #endif 941 #ifdef CONFIG_X86 942 dram_init_f, /* configure available RAM banks */ 943 calculate_relocation_address, 944 #endif 945 announce_dram_init, 946 /* TODO: unify all these dram functions? */ 947 #ifdef CONFIG_ARM 948 dram_init, /* configure available RAM banks */ 949 #endif 950 #ifdef CONFIG_PPC 951 init_func_ram, 952 #endif 953 #ifdef CONFIG_POST 954 post_init_f, 955 #endif 956 INIT_FUNC_WATCHDOG_RESET 957 #if defined(CONFIG_SYS_DRAM_TEST) 958 testdram, 959 #endif /* CONFIG_SYS_DRAM_TEST */ 960 INIT_FUNC_WATCHDOG_RESET 961 962 #ifdef CONFIG_POST 963 init_post, 964 #endif 965 INIT_FUNC_WATCHDOG_RESET 966 /* 967 * Now that we have DRAM mapped and working, we can 968 * relocate the code and continue running from DRAM. 969 * 970 * Reserve memory at end of RAM for (top down in that order): 971 * - area that won't get touched by U-Boot and Linux (optional) 972 * - kernel log buffer 973 * - protected RAM 974 * - LCD framebuffer 975 * - monitor code 976 * - board info struct 977 */ 978 setup_dest_addr, 979 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 980 reserve_logbuffer, 981 #endif 982 #ifdef CONFIG_PRAM 983 reserve_pram, 984 #endif 985 reserve_round_4k, 986 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 987 defined(CONFIG_ARM) 988 reserve_mmu, 989 #endif 990 #ifdef CONFIG_LCD 991 reserve_lcd, 992 #endif 993 /* TODO: Why the dependency on CONFIG_8xx? */ 994 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ 995 && !defined(CONFIG_ARM) && !defined(CONFIG_X86) 996 reserve_video, 997 #endif 998 reserve_uboot, 999 #ifndef CONFIG_SPL_BUILD 1000 reserve_malloc, 1001 reserve_board, 1002 #endif 1003 setup_machine, 1004 reserve_global_data, 1005 reserve_fdt, 1006 reserve_stacks, 1007 setup_dram_config, 1008 show_dram_config, 1009 #ifdef CONFIG_PPC 1010 setup_board_part1, 1011 INIT_FUNC_WATCHDOG_RESET 1012 setup_board_part2, 1013 #endif 1014 setup_baud_rate, 1015 display_new_sp, 1016 #ifdef CONFIG_SYS_EXTBDINFO 1017 setup_board_extra, 1018 #endif 1019 INIT_FUNC_WATCHDOG_RESET 1020 reloc_fdt, 1021 setup_reloc, 1022 #ifndef CONFIG_ARM 1023 jump_to_copy, 1024 #endif 1025 NULL, 1026 }; 1027 1028 void board_init_f(ulong boot_flags) 1029 { 1030 #ifndef CONFIG_X86 1031 gd_t data; 1032 1033 gd = &data; 1034 #endif 1035 1036 gd->flags = boot_flags; 1037 1038 if (initcall_run_list(init_sequence_f)) 1039 hang(); 1040 1041 #ifndef CONFIG_ARM 1042 /* NOTREACHED - jump_to_copy() does not return */ 1043 hang(); 1044 #endif 1045 } 1046 1047 #ifdef CONFIG_X86 1048 /* 1049 * For now this code is only used on x86. 1050 * 1051 * init_sequence_f_r is the list of init functions which are run when 1052 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1053 * The following limitations must be considered when implementing an 1054 * '_f_r' function: 1055 * - 'static' variables are read-only 1056 * - Global Data (gd->xxx) is read/write 1057 * 1058 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1059 * supported). It _should_, if possible, copy global data to RAM and 1060 * initialise the CPU caches (to speed up the relocation process) 1061 * 1062 * NOTE: At present only x86 uses this route, but it is intended that 1063 * all archs will move to this when generic relocation is implemented. 1064 */ 1065 static init_fnc_t init_sequence_f_r[] = { 1066 init_cache_f_r, 1067 copy_uboot_to_ram, 1068 clear_bss, 1069 do_elf_reloc_fixups, 1070 1071 NULL, 1072 }; 1073 1074 void board_init_f_r(void) 1075 { 1076 if (initcall_run_list(init_sequence_f_r)) 1077 hang(); 1078 1079 /* 1080 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1081 * Transfer execution from Flash to RAM by calculating the address 1082 * of the in-RAM copy of board_init_r() and calling it 1083 */ 1084 (board_init_r + gd->reloc_off)(gd, gd->relocaddr); 1085 1086 /* NOTREACHED - board_init_r() does not return */ 1087 hang(); 1088 } 1089 #endif /* CONFIG_X86 */ 1090