xref: /openbmc/u-boot/common/board_f.c (revision 856b30da)
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * (C) Copyright 2002-2006
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  *
6  * (C) Copyright 2002
7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8  * Marius Groeger <mgroeger@sysgo.de>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #include <common.h>
14 #include <linux/compiler.h>
15 #include <version.h>
16 #include <console.h>
17 #include <environment.h>
18 #include <dm.h>
19 #include <fdtdec.h>
20 #include <fs.h>
21 #if defined(CONFIG_CMD_IDE)
22 #include <ide.h>
23 #endif
24 #include <i2c.h>
25 #include <initcall.h>
26 #include <logbuff.h>
27 #include <malloc.h>
28 #include <mapmem.h>
29 
30 /* TODO: Can we move these into arch/ headers? */
31 #ifdef CONFIG_8xx
32 #include <mpc8xx.h>
33 #endif
34 #ifdef CONFIG_5xx
35 #include <mpc5xx.h>
36 #endif
37 #ifdef CONFIG_MPC5xxx
38 #include <mpc5xxx.h>
39 #endif
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
41 #include <asm/mp.h>
42 #endif
43 
44 #include <os.h>
45 #include <post.h>
46 #include <spi.h>
47 #include <status_led.h>
48 #include <trace.h>
49 #include <watchdog.h>
50 #include <asm/errno.h>
51 #include <asm/io.h>
52 #include <asm/sections.h>
53 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
54 #include <asm/init_helpers.h>
55 #include <asm/relocate.h>
56 #endif
57 #ifdef CONFIG_SANDBOX
58 #include <asm/state.h>
59 #endif
60 #include <dm/root.h>
61 #include <linux/compiler.h>
62 
63 /*
64  * Pointer to initial global data area
65  *
66  * Here we initialize it if needed.
67  */
68 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
69 #undef	XTRN_DECLARE_GLOBAL_DATA_PTR
70 #define XTRN_DECLARE_GLOBAL_DATA_PTR	/* empty = allocate here */
71 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
72 #else
73 DECLARE_GLOBAL_DATA_PTR;
74 #endif
75 
76 /*
77  * TODO(sjg@chromium.org): IMO this code should be
78  * refactored to a single function, something like:
79  *
80  * void led_set_state(enum led_colour_t colour, int on);
81  */
82 /************************************************************************
83  * Coloured LED functionality
84  ************************************************************************
85  * May be supplied by boards if desired
86  */
87 __weak void coloured_LED_init(void) {}
88 __weak void red_led_on(void) {}
89 __weak void red_led_off(void) {}
90 __weak void green_led_on(void) {}
91 __weak void green_led_off(void) {}
92 __weak void yellow_led_on(void) {}
93 __weak void yellow_led_off(void) {}
94 __weak void blue_led_on(void) {}
95 __weak void blue_led_off(void) {}
96 
97 /*
98  * Why is gd allocated a register? Prior to reloc it might be better to
99  * just pass it around to each function in this file?
100  *
101  * After reloc one could argue that it is hardly used and doesn't need
102  * to be in a register. Or if it is it should perhaps hold pointers to all
103  * global data for all modules, so that post-reloc we can avoid the massive
104  * literal pool we get on ARM. Or perhaps just encourage each module to use
105  * a structure...
106  */
107 
108 /*
109  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
110  */
111 
112 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
113 static int init_func_watchdog_init(void)
114 {
115 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
116 	defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
117 	defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
118 	defined(CONFIG_IMX_WATCHDOG))
119 	hw_watchdog_init();
120 # endif
121 	puts("       Watchdog enabled\n");
122 	WATCHDOG_RESET();
123 
124 	return 0;
125 }
126 
127 int init_func_watchdog_reset(void)
128 {
129 	WATCHDOG_RESET();
130 
131 	return 0;
132 }
133 #endif /* CONFIG_WATCHDOG */
134 
135 __weak void board_add_ram_info(int use_default)
136 {
137 	/* please define platform specific board_add_ram_info() */
138 }
139 
140 static int init_baud_rate(void)
141 {
142 	gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
143 	return 0;
144 }
145 
146 static int display_text_info(void)
147 {
148 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
149 	ulong bss_start, bss_end, text_base;
150 
151 	bss_start = (ulong)&__bss_start;
152 	bss_end = (ulong)&__bss_end;
153 
154 #ifdef CONFIG_SYS_TEXT_BASE
155 	text_base = CONFIG_SYS_TEXT_BASE;
156 #else
157 	text_base = CONFIG_SYS_MONITOR_BASE;
158 #endif
159 
160 	debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
161 		text_base, bss_start, bss_end);
162 #endif
163 
164 #ifdef CONFIG_MODEM_SUPPORT
165 	debug("Modem Support enabled\n");
166 #endif
167 #ifdef CONFIG_USE_IRQ
168 	debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
169 	debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
170 #endif
171 
172 	return 0;
173 }
174 
175 static int announce_dram_init(void)
176 {
177 	puts("DRAM:  ");
178 	return 0;
179 }
180 
181 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
182 static int init_func_ram(void)
183 {
184 #ifdef	CONFIG_BOARD_TYPES
185 	int board_type = gd->board_type;
186 #else
187 	int board_type = 0;	/* use dummy arg */
188 #endif
189 
190 	gd->ram_size = initdram(board_type);
191 
192 	if (gd->ram_size > 0)
193 		return 0;
194 
195 	puts("*** failed ***\n");
196 	return 1;
197 }
198 #endif
199 
200 static int show_dram_config(void)
201 {
202 	unsigned long long size;
203 
204 #ifdef CONFIG_NR_DRAM_BANKS
205 	int i;
206 
207 	debug("\nRAM Configuration:\n");
208 	for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
209 		size += gd->bd->bi_dram[i].size;
210 		debug("Bank #%d: %llx ", i,
211 		      (unsigned long long)(gd->bd->bi_dram[i].start));
212 #ifdef DEBUG
213 		print_size(gd->bd->bi_dram[i].size, "\n");
214 #endif
215 	}
216 	debug("\nDRAM:  ");
217 #else
218 	size = gd->ram_size;
219 #endif
220 
221 	print_size(size, "");
222 	board_add_ram_info(0);
223 	putc('\n');
224 
225 	return 0;
226 }
227 
228 __weak void dram_init_banksize(void)
229 {
230 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
231 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
232 	gd->bd->bi_dram[0].size = get_effective_memsize();
233 #endif
234 }
235 
236 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
237 static int init_func_i2c(void)
238 {
239 	puts("I2C:   ");
240 #ifdef CONFIG_SYS_I2C
241 	i2c_init_all();
242 #else
243 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
244 #endif
245 	puts("ready\n");
246 	return 0;
247 }
248 #endif
249 
250 #if defined(CONFIG_HARD_SPI)
251 static int init_func_spi(void)
252 {
253 	puts("SPI:   ");
254 	spi_init();
255 	puts("ready\n");
256 	return 0;
257 }
258 #endif
259 
260 __maybe_unused
261 static int zero_global_data(void)
262 {
263 	memset((void *)gd, '\0', sizeof(gd_t));
264 
265 	return 0;
266 }
267 
268 static int setup_mon_len(void)
269 {
270 #if defined(__ARM__) || defined(__MICROBLAZE__)
271 	gd->mon_len = (ulong)&__bss_end - (ulong)_start;
272 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
273 	gd->mon_len = (ulong)&_end - (ulong)_init;
274 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
275 	gd->mon_len = CONFIG_SYS_MONITOR_LEN;
276 #elif defined(CONFIG_NDS32)
277 	gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
278 #else
279 	/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
280 	gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
281 #endif
282 	return 0;
283 }
284 
285 __weak int arch_cpu_init(void)
286 {
287 	return 0;
288 }
289 
290 #ifdef CONFIG_SANDBOX
291 static int setup_ram_buf(void)
292 {
293 	struct sandbox_state *state = state_get_current();
294 
295 	gd->arch.ram_buf = state->ram_buf;
296 	gd->ram_size = state->ram_size;
297 
298 	return 0;
299 }
300 #endif
301 
302 /* Get the top of usable RAM */
303 __weak ulong board_get_usable_ram_top(ulong total_size)
304 {
305 #ifdef CONFIG_SYS_SDRAM_BASE
306 	/*
307 	 * Detect whether we have so much RAM that it goes past the end of our
308 	 * 32-bit address space. If so, clip the usable RAM so it doesn't.
309 	 */
310 	if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
311 		/*
312 		 * Will wrap back to top of 32-bit space when reservations
313 		 * are made.
314 		 */
315 		return 0;
316 #endif
317 	return gd->ram_top;
318 }
319 
320 static int setup_dest_addr(void)
321 {
322 	debug("Monitor len: %08lX\n", gd->mon_len);
323 	/*
324 	 * Ram is setup, size stored in gd !!
325 	 */
326 	debug("Ram size: %08lX\n", (ulong)gd->ram_size);
327 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
328 	/*
329 	 * Subtract specified amount of memory to hide so that it won't
330 	 * get "touched" at all by U-Boot. By fixing up gd->ram_size
331 	 * the Linux kernel should now get passed the now "corrected"
332 	 * memory size and won't touch it either. This should work
333 	 * for arch/ppc and arch/powerpc. Only Linux board ports in
334 	 * arch/powerpc with bootwrapper support, that recalculate the
335 	 * memory size from the SDRAM controller setup will have to
336 	 * get fixed.
337 	 */
338 	gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
339 #endif
340 #ifdef CONFIG_SYS_SDRAM_BASE
341 	gd->ram_top = CONFIG_SYS_SDRAM_BASE;
342 #endif
343 	gd->ram_top += get_effective_memsize();
344 	gd->ram_top = board_get_usable_ram_top(gd->mon_len);
345 	gd->relocaddr = gd->ram_top;
346 	debug("Ram top: %08lX\n", (ulong)gd->ram_top);
347 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
348 	/*
349 	 * We need to make sure the location we intend to put secondary core
350 	 * boot code is reserved and not used by any part of u-boot
351 	 */
352 	if (gd->relocaddr > determine_mp_bootpg(NULL)) {
353 		gd->relocaddr = determine_mp_bootpg(NULL);
354 		debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
355 	}
356 #endif
357 	return 0;
358 }
359 
360 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
361 static int reserve_logbuffer(void)
362 {
363 	/* reserve kernel log buffer */
364 	gd->relocaddr -= LOGBUFF_RESERVE;
365 	debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
366 		gd->relocaddr);
367 	return 0;
368 }
369 #endif
370 
371 #ifdef CONFIG_PRAM
372 /* reserve protected RAM */
373 static int reserve_pram(void)
374 {
375 	ulong reg;
376 
377 	reg = getenv_ulong("pram", 10, CONFIG_PRAM);
378 	gd->relocaddr -= (reg << 10);		/* size is in kB */
379 	debug("Reserving %ldk for protected RAM at %08lx\n", reg,
380 	      gd->relocaddr);
381 	return 0;
382 }
383 #endif /* CONFIG_PRAM */
384 
385 /* Round memory pointer down to next 4 kB limit */
386 static int reserve_round_4k(void)
387 {
388 	gd->relocaddr &= ~(4096 - 1);
389 	return 0;
390 }
391 
392 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
393 		defined(CONFIG_ARM)
394 static int reserve_mmu(void)
395 {
396 	/* reserve TLB table */
397 	gd->arch.tlb_size = PGTABLE_SIZE;
398 	gd->relocaddr -= gd->arch.tlb_size;
399 
400 	/* round down to next 64 kB limit */
401 	gd->relocaddr &= ~(0x10000 - 1);
402 
403 	gd->arch.tlb_addr = gd->relocaddr;
404 	debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
405 	      gd->arch.tlb_addr + gd->arch.tlb_size);
406 	return 0;
407 }
408 #endif
409 
410 #ifdef CONFIG_LCD
411 static int reserve_lcd(void)
412 {
413 #ifdef CONFIG_FB_ADDR
414 	gd->fb_base = CONFIG_FB_ADDR;
415 #else
416 	/* reserve memory for LCD display (always full pages) */
417 	gd->relocaddr = lcd_setmem(gd->relocaddr);
418 	gd->fb_base = gd->relocaddr;
419 #endif /* CONFIG_FB_ADDR */
420 	return 0;
421 }
422 #endif /* CONFIG_LCD */
423 
424 static int reserve_trace(void)
425 {
426 #ifdef CONFIG_TRACE
427 	gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
428 	gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
429 	debug("Reserving %dk for trace data at: %08lx\n",
430 	      CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
431 #endif
432 
433 	return 0;
434 }
435 
436 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
437 		!defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
438 		!defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
439 static int reserve_video(void)
440 {
441 	/* reserve memory for video display (always full pages) */
442 	gd->relocaddr = video_setmem(gd->relocaddr);
443 	gd->fb_base = gd->relocaddr;
444 
445 	return 0;
446 }
447 #endif
448 
449 static int reserve_uboot(void)
450 {
451 	/*
452 	 * reserve memory for U-Boot code, data & bss
453 	 * round down to next 4 kB limit
454 	 */
455 	gd->relocaddr -= gd->mon_len;
456 	gd->relocaddr &= ~(4096 - 1);
457 #ifdef CONFIG_E500
458 	/* round down to next 64 kB limit so that IVPR stays aligned */
459 	gd->relocaddr &= ~(65536 - 1);
460 #endif
461 
462 	debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
463 	      gd->relocaddr);
464 
465 	gd->start_addr_sp = gd->relocaddr;
466 
467 	return 0;
468 }
469 
470 #ifndef CONFIG_SPL_BUILD
471 /* reserve memory for malloc() area */
472 static int reserve_malloc(void)
473 {
474 	gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
475 	debug("Reserving %dk for malloc() at: %08lx\n",
476 			TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
477 	return 0;
478 }
479 
480 /* (permanently) allocate a Board Info struct */
481 static int reserve_board(void)
482 {
483 	if (!gd->bd) {
484 		gd->start_addr_sp -= sizeof(bd_t);
485 		gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
486 		memset(gd->bd, '\0', sizeof(bd_t));
487 		debug("Reserving %zu Bytes for Board Info at: %08lx\n",
488 		      sizeof(bd_t), gd->start_addr_sp);
489 	}
490 	return 0;
491 }
492 #endif
493 
494 static int setup_machine(void)
495 {
496 #ifdef CONFIG_MACH_TYPE
497 	gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
498 #endif
499 	return 0;
500 }
501 
502 static int reserve_global_data(void)
503 {
504 	gd->start_addr_sp -= sizeof(gd_t);
505 	gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
506 	debug("Reserving %zu Bytes for Global Data at: %08lx\n",
507 			sizeof(gd_t), gd->start_addr_sp);
508 	return 0;
509 }
510 
511 static int reserve_fdt(void)
512 {
513 	/*
514 	 * If the device tree is sitting immediately above our image then we
515 	 * must relocate it. If it is embedded in the data section, then it
516 	 * will be relocated with other data.
517 	 */
518 	if (gd->fdt_blob) {
519 		gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
520 
521 		gd->start_addr_sp -= gd->fdt_size;
522 		gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
523 		debug("Reserving %lu Bytes for FDT at: %08lx\n",
524 		      gd->fdt_size, gd->start_addr_sp);
525 	}
526 
527 	return 0;
528 }
529 
530 int arch_reserve_stacks(void)
531 {
532 	return 0;
533 }
534 
535 static int reserve_stacks(void)
536 {
537 	/* make stack pointer 16-byte aligned */
538 	gd->start_addr_sp -= 16;
539 	gd->start_addr_sp &= ~0xf;
540 
541 	/*
542 	 * let the architecture-specific code tailor gd->start_addr_sp and
543 	 * gd->irq_sp
544 	 */
545 	return arch_reserve_stacks();
546 }
547 
548 static int display_new_sp(void)
549 {
550 	debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
551 
552 	return 0;
553 }
554 
555 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
556 static int setup_board_part1(void)
557 {
558 	bd_t *bd = gd->bd;
559 
560 	/*
561 	 * Save local variables to board info struct
562 	 */
563 	bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;	/* start of memory */
564 	bd->bi_memsize = gd->ram_size;			/* size in bytes */
565 
566 #ifdef CONFIG_SYS_SRAM_BASE
567 	bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;	/* start of SRAM */
568 	bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;		/* size  of SRAM */
569 #endif
570 
571 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
572 		defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
573 	bd->bi_immr_base = CONFIG_SYS_IMMR;	/* base  of IMMR register     */
574 #endif
575 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
576 	bd->bi_mbar_base = CONFIG_SYS_MBAR;	/* base of internal registers */
577 #endif
578 #if defined(CONFIG_MPC83xx)
579 	bd->bi_immrbar = CONFIG_SYS_IMMR;
580 #endif
581 
582 	return 0;
583 }
584 #endif
585 
586 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
587 static int setup_board_part2(void)
588 {
589 	bd_t *bd = gd->bd;
590 
591 	bd->bi_intfreq = gd->cpu_clk;	/* Internal Freq, in Hz */
592 	bd->bi_busfreq = gd->bus_clk;	/* Bus Freq,      in Hz */
593 #if defined(CONFIG_CPM2)
594 	bd->bi_cpmfreq = gd->arch.cpm_clk;
595 	bd->bi_brgfreq = gd->arch.brg_clk;
596 	bd->bi_sccfreq = gd->arch.scc_clk;
597 	bd->bi_vco = gd->arch.vco_out;
598 #endif /* CONFIG_CPM2 */
599 #if defined(CONFIG_MPC512X)
600 	bd->bi_ipsfreq = gd->arch.ips_clk;
601 #endif /* CONFIG_MPC512X */
602 #if defined(CONFIG_MPC5xxx)
603 	bd->bi_ipbfreq = gd->arch.ipb_clk;
604 	bd->bi_pcifreq = gd->pci_clk;
605 #endif /* CONFIG_MPC5xxx */
606 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
607 	bd->bi_pcifreq = gd->pci_clk;
608 #endif
609 #if defined(CONFIG_EXTRA_CLOCK)
610 	bd->bi_inpfreq = gd->arch.inp_clk;	/* input Freq in Hz */
611 	bd->bi_vcofreq = gd->arch.vco_clk;	/* vco Freq in Hz */
612 	bd->bi_flbfreq = gd->arch.flb_clk;	/* flexbus Freq in Hz */
613 #endif
614 
615 	return 0;
616 }
617 #endif
618 
619 #ifdef CONFIG_SYS_EXTBDINFO
620 static int setup_board_extra(void)
621 {
622 	bd_t *bd = gd->bd;
623 
624 	strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
625 	strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
626 		sizeof(bd->bi_r_version));
627 
628 	bd->bi_procfreq = gd->cpu_clk;	/* Processor Speed, In Hz */
629 	bd->bi_plb_busfreq = gd->bus_clk;
630 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
631 		defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
632 		defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
633 	bd->bi_pci_busfreq = get_PCI_freq();
634 	bd->bi_opbfreq = get_OPB_freq();
635 #elif defined(CONFIG_XILINX_405)
636 	bd->bi_pci_busfreq = get_PCI_freq();
637 #endif
638 
639 	return 0;
640 }
641 #endif
642 
643 #ifdef CONFIG_POST
644 static int init_post(void)
645 {
646 	post_bootmode_init();
647 	post_run(NULL, POST_ROM | post_bootmode_get(0));
648 
649 	return 0;
650 }
651 #endif
652 
653 static int setup_dram_config(void)
654 {
655 	/* Ram is board specific, so move it to board code ... */
656 	dram_init_banksize();
657 
658 	return 0;
659 }
660 
661 static int reloc_fdt(void)
662 {
663 	if (gd->flags & GD_FLG_SKIP_RELOC)
664 		return 0;
665 	if (gd->new_fdt) {
666 		memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
667 		gd->fdt_blob = gd->new_fdt;
668 	}
669 
670 	return 0;
671 }
672 
673 static int setup_reloc(void)
674 {
675 	if (gd->flags & GD_FLG_SKIP_RELOC) {
676 		debug("Skipping relocation due to flag\n");
677 		return 0;
678 	}
679 
680 #ifdef CONFIG_SYS_TEXT_BASE
681 	gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
682 #ifdef CONFIG_M68K
683 	/*
684 	 * On all ColdFire arch cpu, monitor code starts always
685 	 * just after the default vector table location, so at 0x400
686 	 */
687 	gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
688 #endif
689 #endif
690 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
691 
692 	debug("Relocation Offset is: %08lx\n", gd->reloc_off);
693 	debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
694 	      gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
695 	      gd->start_addr_sp);
696 
697 	return 0;
698 }
699 
700 /* ARM calls relocate_code from its crt0.S */
701 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
702 
703 static int jump_to_copy(void)
704 {
705 	if (gd->flags & GD_FLG_SKIP_RELOC)
706 		return 0;
707 	/*
708 	 * x86 is special, but in a nice way. It uses a trampoline which
709 	 * enables the dcache if possible.
710 	 *
711 	 * For now, other archs use relocate_code(), which is implemented
712 	 * similarly for all archs. When we do generic relocation, hopefully
713 	 * we can make all archs enable the dcache prior to relocation.
714 	 */
715 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
716 	/*
717 	 * SDRAM and console are now initialised. The final stack can now
718 	 * be setup in SDRAM. Code execution will continue in Flash, but
719 	 * with the stack in SDRAM and Global Data in temporary memory
720 	 * (CPU cache)
721 	 */
722 	arch_setup_gd(gd->new_gd);
723 	board_init_f_r_trampoline(gd->start_addr_sp);
724 #else
725 	relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
726 #endif
727 
728 	return 0;
729 }
730 #endif
731 
732 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
733 static int mark_bootstage(void)
734 {
735 	bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
736 
737 	return 0;
738 }
739 
740 static int initf_console_record(void)
741 {
742 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
743 	return console_record_init();
744 #else
745 	return 0;
746 #endif
747 }
748 
749 static int initf_dm(void)
750 {
751 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
752 	int ret;
753 
754 	ret = dm_init_and_scan(true);
755 	if (ret)
756 		return ret;
757 #endif
758 
759 	return 0;
760 }
761 
762 /* Architecture-specific memory reservation */
763 __weak int reserve_arch(void)
764 {
765 	return 0;
766 }
767 
768 __weak int arch_cpu_init_dm(void)
769 {
770 	return 0;
771 }
772 
773 static init_fnc_t init_sequence_f[] = {
774 #ifdef CONFIG_SANDBOX
775 	setup_ram_buf,
776 #endif
777 	setup_mon_len,
778 #ifdef CONFIG_OF_CONTROL
779 	fdtdec_setup,
780 #endif
781 #ifdef CONFIG_TRACE
782 	trace_early_init,
783 #endif
784 	initf_malloc,
785 	initf_console_record,
786 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
787 	/* TODO: can this go into arch_cpu_init()? */
788 	probecpu,
789 #endif
790 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
791 	x86_fsp_init,
792 #endif
793 	arch_cpu_init,		/* basic arch cpu dependent setup */
794 	initf_dm,
795 	arch_cpu_init_dm,
796 	mark_bootstage,		/* need timer, go after init dm */
797 #if defined(CONFIG_BOARD_EARLY_INIT_F)
798 	board_early_init_f,
799 #endif
800 	/* TODO: can any of this go into arch_cpu_init()? */
801 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
802 	get_clocks,		/* get CPU and bus clocks (etc.) */
803 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
804 		&& !defined(CONFIG_TQM885D)
805 	adjust_sdram_tbs_8xx,
806 #endif
807 	/* TODO: can we rename this to timer_init()? */
808 	init_timebase,
809 #endif
810 #if defined(CONFIG_X86) || defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
811 		defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32)
812 	timer_init,		/* initialize timer */
813 #endif
814 #ifdef CONFIG_SYS_ALLOC_DPRAM
815 #if !defined(CONFIG_CPM2)
816 	dpram_init,
817 #endif
818 #endif
819 #if defined(CONFIG_BOARD_POSTCLK_INIT)
820 	board_postclk_init,
821 #endif
822 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
823 	get_clocks,
824 #endif
825 	env_init,		/* initialize environment */
826 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
827 	/* get CPU and bus clocks according to the environment variable */
828 	get_clocks_866,
829 	/* adjust sdram refresh rate according to the new clock */
830 	sdram_adjust_866,
831 	init_timebase,
832 #endif
833 	init_baud_rate,		/* initialze baudrate settings */
834 	serial_init,		/* serial communications setup */
835 	console_init_f,		/* stage 1 init of console */
836 #ifdef CONFIG_SANDBOX
837 	sandbox_early_getopt_check,
838 #endif
839 #ifdef CONFIG_OF_CONTROL
840 	fdtdec_prepare_fdt,
841 #endif
842 	display_options,	/* say that we are here */
843 	display_text_info,	/* show debugging info if required */
844 #if defined(CONFIG_MPC8260)
845 	prt_8260_rsr,
846 	prt_8260_clks,
847 #endif /* CONFIG_MPC8260 */
848 #if defined(CONFIG_MPC83xx)
849 	prt_83xx_rsr,
850 #endif
851 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
852 	checkcpu,
853 #endif
854 	print_cpuinfo,		/* display cpu info (and speed) */
855 #if defined(CONFIG_MPC5xxx)
856 	prt_mpc5xxx_clks,
857 #endif /* CONFIG_MPC5xxx */
858 #if defined(CONFIG_DISPLAY_BOARDINFO)
859 	show_board_info,
860 #endif
861 	INIT_FUNC_WATCHDOG_INIT
862 #if defined(CONFIG_MISC_INIT_F)
863 	misc_init_f,
864 #endif
865 	INIT_FUNC_WATCHDOG_RESET
866 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
867 	init_func_i2c,
868 #endif
869 #if defined(CONFIG_HARD_SPI)
870 	init_func_spi,
871 #endif
872 	announce_dram_init,
873 	/* TODO: unify all these dram functions? */
874 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
875 		defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
876 	dram_init,		/* configure available RAM banks */
877 #endif
878 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
879 	init_func_ram,
880 #endif
881 #ifdef CONFIG_POST
882 	post_init_f,
883 #endif
884 	INIT_FUNC_WATCHDOG_RESET
885 #if defined(CONFIG_SYS_DRAM_TEST)
886 	testdram,
887 #endif /* CONFIG_SYS_DRAM_TEST */
888 	INIT_FUNC_WATCHDOG_RESET
889 
890 #ifdef CONFIG_POST
891 	init_post,
892 #endif
893 	INIT_FUNC_WATCHDOG_RESET
894 	/*
895 	 * Now that we have DRAM mapped and working, we can
896 	 * relocate the code and continue running from DRAM.
897 	 *
898 	 * Reserve memory at end of RAM for (top down in that order):
899 	 *  - area that won't get touched by U-Boot and Linux (optional)
900 	 *  - kernel log buffer
901 	 *  - protected RAM
902 	 *  - LCD framebuffer
903 	 *  - monitor code
904 	 *  - board info struct
905 	 */
906 	setup_dest_addr,
907 #if defined(CONFIG_BLACKFIN)
908 	/* Blackfin u-boot monitor should be on top of the ram */
909 	reserve_uboot,
910 #endif
911 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
912 	reserve_logbuffer,
913 #endif
914 #ifdef CONFIG_PRAM
915 	reserve_pram,
916 #endif
917 	reserve_round_4k,
918 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
919 		defined(CONFIG_ARM)
920 	reserve_mmu,
921 #endif
922 #ifdef CONFIG_LCD
923 	reserve_lcd,
924 #endif
925 	reserve_trace,
926 	/* TODO: Why the dependency on CONFIG_8xx? */
927 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
928 		!defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
929 		!defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
930 	reserve_video,
931 #endif
932 #if !defined(CONFIG_BLACKFIN)
933 	reserve_uboot,
934 #endif
935 #ifndef CONFIG_SPL_BUILD
936 	reserve_malloc,
937 	reserve_board,
938 #endif
939 	setup_machine,
940 	reserve_global_data,
941 	reserve_fdt,
942 	reserve_arch,
943 	reserve_stacks,
944 	setup_dram_config,
945 	show_dram_config,
946 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
947 	setup_board_part1,
948 #endif
949 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
950 	INIT_FUNC_WATCHDOG_RESET
951 	setup_board_part2,
952 #endif
953 	display_new_sp,
954 #ifdef CONFIG_SYS_EXTBDINFO
955 	setup_board_extra,
956 #endif
957 	INIT_FUNC_WATCHDOG_RESET
958 	reloc_fdt,
959 	setup_reloc,
960 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
961 	copy_uboot_to_ram,
962 	clear_bss,
963 	do_elf_reloc_fixups,
964 #endif
965 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
966 	jump_to_copy,
967 #endif
968 	NULL,
969 };
970 
971 void board_init_f(ulong boot_flags)
972 {
973 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
974 	/*
975 	 * For some archtectures, global data is initialized and used before
976 	 * calling this function. The data should be preserved. For others,
977 	 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
978 	 * here to host global data until relocation.
979 	 */
980 	gd_t data;
981 
982 	gd = &data;
983 
984 	/*
985 	 * Clear global data before it is accessed at debug print
986 	 * in initcall_run_list. Otherwise the debug print probably
987 	 * get the wrong vaule of gd->have_console.
988 	 */
989 	zero_global_data();
990 #endif
991 
992 	gd->flags = boot_flags;
993 	gd->have_console = 0;
994 
995 	if (initcall_run_list(init_sequence_f))
996 		hang();
997 
998 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
999 		!defined(CONFIG_EFI_APP)
1000 	/* NOTREACHED - jump_to_copy() does not return */
1001 	hang();
1002 #endif
1003 }
1004 
1005 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1006 /*
1007  * For now this code is only used on x86.
1008  *
1009  * init_sequence_f_r is the list of init functions which are run when
1010  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1011  * The following limitations must be considered when implementing an
1012  * '_f_r' function:
1013  *  - 'static' variables are read-only
1014  *  - Global Data (gd->xxx) is read/write
1015  *
1016  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1017  * supported).  It _should_, if possible, copy global data to RAM and
1018  * initialise the CPU caches (to speed up the relocation process)
1019  *
1020  * NOTE: At present only x86 uses this route, but it is intended that
1021  * all archs will move to this when generic relocation is implemented.
1022  */
1023 static init_fnc_t init_sequence_f_r[] = {
1024 	init_cache_f_r,
1025 
1026 	NULL,
1027 };
1028 
1029 void board_init_f_r(void)
1030 {
1031 	if (initcall_run_list(init_sequence_f_r))
1032 		hang();
1033 
1034 	/*
1035 	 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1036 	 * Transfer execution from Flash to RAM by calculating the address
1037 	 * of the in-RAM copy of board_init_r() and calling it
1038 	 */
1039 	(board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1040 
1041 	/* NOTREACHED - board_init_r() does not return */
1042 	hang();
1043 }
1044 #endif /* CONFIG_X86 */
1045