1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * See file CREDITS for list of people who contributed to this 11 * project. 12 * 13 * This program is free software; you can redistribute it and/or 14 * modify it under the terms of the GNU General Public License as 15 * published by the Free Software Foundation; either version 2 of 16 * the License, or (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 26 * MA 02111-1307 USA 27 */ 28 29 #include <common.h> 30 #include <linux/compiler.h> 31 #include <version.h> 32 #include <environment.h> 33 #include <fdtdec.h> 34 #if defined(CONFIG_CMD_IDE) 35 #include <ide.h> 36 #endif 37 #include <i2c.h> 38 #include <initcall.h> 39 #include <logbuff.h> 40 41 /* TODO: Can we move these into arch/ headers? */ 42 #ifdef CONFIG_8xx 43 #include <mpc8xx.h> 44 #endif 45 #ifdef CONFIG_5xx 46 #include <mpc5xx.h> 47 #endif 48 #ifdef CONFIG_MPC5xxx 49 #include <mpc5xxx.h> 50 #endif 51 52 #include <post.h> 53 #include <spi.h> 54 #include <watchdog.h> 55 #include <asm/io.h> 56 #ifdef CONFIG_MP 57 #include <asm/mp.h> 58 #endif 59 #include <asm/sections.h> 60 #ifdef CONFIG_X86 61 #include <asm/init_helpers.h> 62 #include <asm/relocate.h> 63 #endif 64 #include <linux/compiler.h> 65 66 /* 67 * Pointer to initial global data area 68 * 69 * Here we initialize it if needed. 70 */ 71 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 72 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 73 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 74 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 75 #else 76 DECLARE_GLOBAL_DATA_PTR; 77 #endif 78 79 /* 80 * sjg: IMO this code should be 81 * refactored to a single function, something like: 82 * 83 * void led_set_state(enum led_colour_t colour, int on); 84 */ 85 /************************************************************************ 86 * Coloured LED functionality 87 ************************************************************************ 88 * May be supplied by boards if desired 89 */ 90 inline void __coloured_LED_init(void) {} 91 void coloured_LED_init(void) 92 __attribute__((weak, alias("__coloured_LED_init"))); 93 inline void __red_led_on(void) {} 94 void red_led_on(void) __attribute__((weak, alias("__red_led_on"))); 95 inline void __red_led_off(void) {} 96 void red_led_off(void) __attribute__((weak, alias("__red_led_off"))); 97 inline void __green_led_on(void) {} 98 void green_led_on(void) __attribute__((weak, alias("__green_led_on"))); 99 inline void __green_led_off(void) {} 100 void green_led_off(void) __attribute__((weak, alias("__green_led_off"))); 101 inline void __yellow_led_on(void) {} 102 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on"))); 103 inline void __yellow_led_off(void) {} 104 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off"))); 105 inline void __blue_led_on(void) {} 106 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on"))); 107 inline void __blue_led_off(void) {} 108 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off"))); 109 110 /* 111 * Why is gd allocated a register? Prior to reloc it might be better to 112 * just pass it around to each function in this file? 113 * 114 * After reloc one could argue that it is hardly used and doesn't need 115 * to be in a register. Or if it is it should perhaps hold pointers to all 116 * global data for all modules, so that post-reloc we can avoid the massive 117 * literal pool we get on ARM. Or perhaps just encourage each module to use 118 * a structure... 119 */ 120 121 /* 122 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 123 */ 124 125 #if defined(CONFIG_WATCHDOG) 126 static int init_func_watchdog_init(void) 127 { 128 puts(" Watchdog enabled\n"); 129 WATCHDOG_RESET(); 130 131 return 0; 132 } 133 134 int init_func_watchdog_reset(void) 135 { 136 WATCHDOG_RESET(); 137 138 return 0; 139 } 140 #endif /* CONFIG_WATCHDOG */ 141 142 void __board_add_ram_info(int use_default) 143 { 144 /* please define platform specific board_add_ram_info() */ 145 } 146 147 void board_add_ram_info(int) 148 __attribute__ ((weak, alias("__board_add_ram_info"))); 149 150 static int init_baud_rate(void) 151 { 152 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 153 return 0; 154 } 155 156 static int display_text_info(void) 157 { 158 ulong bss_start, bss_end; 159 160 #ifdef CONFIG_SYS_SYM_OFFSETS 161 bss_start = _bss_start_ofs + _TEXT_BASE; 162 bss_end = _bss_end_ofs + _TEXT_BASE; 163 #else 164 bss_start = (ulong)&__bss_start; 165 bss_end = (ulong)&__bss_end; 166 #endif 167 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n", 168 CONFIG_SYS_TEXT_BASE, bss_start, bss_end); 169 170 #ifdef CONFIG_MODEM_SUPPORT 171 debug("Modem Support enabled\n"); 172 #endif 173 #ifdef CONFIG_USE_IRQ 174 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 175 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 176 #endif 177 178 return 0; 179 } 180 181 static int announce_dram_init(void) 182 { 183 puts("DRAM: "); 184 return 0; 185 } 186 187 #ifdef CONFIG_PPC 188 static int init_func_ram(void) 189 { 190 #ifdef CONFIG_BOARD_TYPES 191 int board_type = gd->board_type; 192 #else 193 int board_type = 0; /* use dummy arg */ 194 #endif 195 196 gd->ram_size = initdram(board_type); 197 198 if (gd->ram_size > 0) 199 return 0; 200 201 puts("*** failed ***\n"); 202 return 1; 203 } 204 #endif 205 206 static int show_dram_config(void) 207 { 208 ulong size; 209 210 #ifdef CONFIG_NR_DRAM_BANKS 211 int i; 212 213 debug("\nRAM Configuration:\n"); 214 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 215 size += gd->bd->bi_dram[i].size; 216 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); 217 #ifdef DEBUG 218 print_size(gd->bd->bi_dram[i].size, "\n"); 219 #endif 220 } 221 debug("\nDRAM: "); 222 #else 223 size = gd->ram_size; 224 #endif 225 226 print_size(size, ""); 227 board_add_ram_info(0); 228 putc('\n'); 229 230 return 0; 231 } 232 233 ulong get_effective_memsize(void) 234 { 235 #ifndef CONFIG_VERY_BIG_RAM 236 return gd->ram_size; 237 #else 238 /* limit stack to what we can reasonable map */ 239 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ? 240 CONFIG_MAX_MEM_MAPPED : gd->ram_size); 241 #endif 242 } 243 244 void __dram_init_banksize(void) 245 { 246 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 247 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 248 gd->bd->bi_dram[0].size = get_effective_memsize(); 249 #endif 250 } 251 252 void dram_init_banksize(void) 253 __attribute__((weak, alias("__dram_init_banksize"))); 254 255 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) 256 static int init_func_i2c(void) 257 { 258 puts("I2C: "); 259 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 260 puts("ready\n"); 261 return 0; 262 } 263 #endif 264 265 #if defined(CONFIG_HARD_SPI) 266 static int init_func_spi(void) 267 { 268 puts("SPI: "); 269 spi_init(); 270 puts("ready\n"); 271 return 0; 272 } 273 #endif 274 275 __maybe_unused 276 static int zero_global_data(void) 277 { 278 memset((void *)gd, '\0', sizeof(gd_t)); 279 280 return 0; 281 } 282 283 static int setup_mon_len(void) 284 { 285 #ifdef CONFIG_SYS_SYM_OFFSETS 286 gd->mon_len = _bss_end_ofs; 287 #else 288 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 289 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 290 #endif 291 return 0; 292 } 293 294 __weak int arch_cpu_init(void) 295 { 296 return 0; 297 } 298 299 static int setup_fdt(void) 300 { 301 #ifdef CONFIG_OF_EMBED 302 /* Get a pointer to the FDT */ 303 gd->fdt_blob = _binary_dt_dtb_start; 304 #elif defined CONFIG_OF_SEPARATE 305 /* FDT is at end of image */ 306 # ifdef CONFIG_SYS_SYM_OFFSETS 307 gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE); 308 # else 309 gd->fdt_blob = (ulong *)&_end; 310 # endif 311 #endif 312 /* Allow the early environment to override the fdt address */ 313 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, 314 (uintptr_t)gd->fdt_blob); 315 return 0; 316 } 317 318 /* Get the top of usable RAM */ 319 __weak ulong board_get_usable_ram_top(ulong total_size) 320 { 321 return gd->ram_top; 322 } 323 324 static int setup_dest_addr(void) 325 { 326 debug("Monitor len: %08lX\n", gd->mon_len); 327 /* 328 * Ram is setup, size stored in gd !! 329 */ 330 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 331 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 332 /* 333 * Subtract specified amount of memory to hide so that it won't 334 * get "touched" at all by U-Boot. By fixing up gd->ram_size 335 * the Linux kernel should now get passed the now "corrected" 336 * memory size and won't touch it either. This should work 337 * for arch/ppc and arch/powerpc. Only Linux board ports in 338 * arch/powerpc with bootwrapper support, that recalculate the 339 * memory size from the SDRAM controller setup will have to 340 * get fixed. 341 */ 342 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 343 #endif 344 #ifdef CONFIG_SYS_SDRAM_BASE 345 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 346 #endif 347 gd->ram_top += get_effective_memsize(); 348 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 349 gd->dest_addr = gd->ram_top; 350 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 351 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 352 /* 353 * We need to make sure the location we intend to put secondary core 354 * boot code is reserved and not used by any part of u-boot 355 */ 356 if (gd->dest_addr > determine_mp_bootpg(NULL)) { 357 gd->dest_addr = determine_mp_bootpg(NULL); 358 debug("Reserving MP boot page to %08lx\n", gd->dest_addr); 359 } 360 #endif 361 gd->dest_addr_sp = gd->dest_addr; 362 return 0; 363 } 364 365 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 366 static int reserve_logbuffer(void) 367 { 368 /* reserve kernel log buffer */ 369 gd->dest_addr -= LOGBUFF_RESERVE; 370 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 371 gd->dest_addr); 372 return 0; 373 } 374 #endif 375 376 #ifdef CONFIG_PRAM 377 /* reserve protected RAM */ 378 static int reserve_pram(void) 379 { 380 ulong reg; 381 382 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 383 gd->dest_addr -= (reg << 10); /* size is in kB */ 384 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 385 gd->dest_addr); 386 return 0; 387 } 388 #endif /* CONFIG_PRAM */ 389 390 /* Round memory pointer down to next 4 kB limit */ 391 static int reserve_round_4k(void) 392 { 393 gd->dest_addr &= ~(4096 - 1); 394 return 0; 395 } 396 397 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 398 defined(CONFIG_ARM) 399 static int reserve_mmu(void) 400 { 401 /* reserve TLB table */ 402 gd->arch.tlb_size = 4096 * 4; 403 gd->dest_addr -= gd->arch.tlb_size; 404 405 /* round down to next 64 kB limit */ 406 gd->dest_addr &= ~(0x10000 - 1); 407 408 gd->arch.tlb_addr = gd->dest_addr; 409 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 410 gd->arch.tlb_addr + gd->arch.tlb_size); 411 return 0; 412 } 413 #endif 414 415 #ifdef CONFIG_LCD 416 static int reserve_lcd(void) 417 { 418 #ifdef CONFIG_FB_ADDR 419 gd->fb_base = CONFIG_FB_ADDR; 420 #else 421 /* reserve memory for LCD display (always full pages) */ 422 gd->dest_addr = lcd_setmem(gd->dest_addr); 423 gd->fb_base = gd->dest_addr; 424 #endif /* CONFIG_FB_ADDR */ 425 return 0; 426 } 427 #endif /* CONFIG_LCD */ 428 429 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ 430 && !defined(CONFIG_ARM) && !defined(CONFIG_X86) 431 static int reserve_video(void) 432 { 433 /* reserve memory for video display (always full pages) */ 434 gd->dest_addr = video_setmem(gd->dest_addr); 435 gd->fb_base = gd->dest_addr; 436 437 return 0; 438 } 439 #endif 440 441 static int reserve_uboot(void) 442 { 443 /* 444 * reserve memory for U-Boot code, data & bss 445 * round down to next 4 kB limit 446 */ 447 gd->dest_addr -= gd->mon_len; 448 gd->dest_addr &= ~(4096 - 1); 449 #ifdef CONFIG_E500 450 /* round down to next 64 kB limit so that IVPR stays aligned */ 451 gd->dest_addr &= ~(65536 - 1); 452 #endif 453 454 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 455 gd->dest_addr); 456 return 0; 457 } 458 459 #ifndef CONFIG_SPL_BUILD 460 /* reserve memory for malloc() area */ 461 static int reserve_malloc(void) 462 { 463 gd->dest_addr_sp = gd->dest_addr - TOTAL_MALLOC_LEN; 464 debug("Reserving %dk for malloc() at: %08lx\n", 465 TOTAL_MALLOC_LEN >> 10, gd->dest_addr_sp); 466 return 0; 467 } 468 469 /* (permanently) allocate a Board Info struct */ 470 static int reserve_board(void) 471 { 472 gd->dest_addr_sp -= sizeof(bd_t); 473 gd->bd = (bd_t *)gd->dest_addr_sp; 474 memset(gd->bd, '\0', sizeof(bd_t)); 475 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 476 sizeof(bd_t), gd->dest_addr_sp); 477 return 0; 478 } 479 #endif 480 481 static int setup_machine(void) 482 { 483 #ifdef CONFIG_MACH_TYPE 484 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 485 #endif 486 return 0; 487 } 488 489 static int reserve_global_data(void) 490 { 491 gd->dest_addr_sp -= sizeof(gd_t); 492 gd->new_gd = (gd_t *)gd->dest_addr_sp; 493 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 494 sizeof(gd_t), gd->dest_addr_sp); 495 return 0; 496 } 497 498 static int reserve_fdt(void) 499 { 500 /* 501 * If the device tree is sitting immediate above our image then we 502 * must relocate it. If it is embedded in the data section, then it 503 * will be relocated with other data. 504 */ 505 if (gd->fdt_blob) { 506 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 507 508 gd->dest_addr_sp -= gd->fdt_size; 509 gd->new_fdt = (void *)gd->dest_addr_sp; 510 debug("Reserving %lu Bytes for FDT at: %p\n", 511 gd->fdt_size, gd->new_fdt); 512 } 513 514 return 0; 515 } 516 517 static int reserve_stacks(void) 518 { 519 #ifdef CONFIG_SPL_BUILD 520 # ifdef CONFIG_ARM 521 gd->dest_addr_sp -= 128; /* leave 32 words for abort-stack */ 522 gd->irq_sp = gd->dest_addr_sp; 523 # endif 524 #else 525 # ifdef CONFIG_PPC 526 ulong *s; 527 # endif 528 529 /* setup stack pointer for exceptions */ 530 gd->dest_addr_sp -= 16; 531 gd->dest_addr_sp &= ~0xf; 532 gd->irq_sp = gd->dest_addr_sp; 533 534 /* 535 * Handle architecture-specific things here 536 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() 537 * to handle this and put in arch/xxx/lib/stack.c 538 */ 539 # ifdef CONFIG_ARM 540 # ifdef CONFIG_USE_IRQ 541 gd->dest_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); 542 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", 543 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->dest_addr_sp); 544 545 /* 8-byte alignment for ARM ABI compliance */ 546 gd->dest_addr_sp &= ~0x07; 547 # endif 548 /* leave 3 words for abort-stack, plus 1 for alignment */ 549 gd->dest_addr_sp -= 16; 550 # elif defined(CONFIG_PPC) 551 /* Clear initial stack frame */ 552 s = (ulong *) gd->dest_addr_sp; 553 *s = 0; /* Terminate back chain */ 554 *++s = 0; /* NULL return address */ 555 # endif /* Architecture specific code */ 556 557 return 0; 558 #endif 559 } 560 561 static int display_new_sp(void) 562 { 563 debug("New Stack Pointer is: %08lx\n", gd->dest_addr_sp); 564 565 return 0; 566 } 567 568 #ifdef CONFIG_PPC 569 static int setup_board_part1(void) 570 { 571 bd_t *bd = gd->bd; 572 573 /* 574 * Save local variables to board info struct 575 */ 576 577 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 578 bd->bi_memsize = gd->ram_size; /* size in bytes */ 579 580 #ifdef CONFIG_SYS_SRAM_BASE 581 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 582 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 583 #endif 584 585 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ 586 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 587 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 588 #endif 589 #if defined(CONFIG_MPC5xxx) 590 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 591 #endif 592 #if defined(CONFIG_MPC83xx) 593 bd->bi_immrbar = CONFIG_SYS_IMMR; 594 #endif 595 #if defined(CONFIG_MPC8220) 596 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 597 bd->bi_inpfreq = gd->arch.inp_clk; 598 bd->bi_pcifreq = gd->pci_clk; 599 bd->bi_vcofreq = gd->arch.vco_clk; 600 bd->bi_pevfreq = gd->arch.pev_clk; 601 bd->bi_flbfreq = gd->arch.flb_clk; 602 603 /* store bootparam to sram (backward compatible), here? */ 604 { 605 u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE; 606 607 *sram++ = gd->ram_size; 608 *sram++ = gd->bus_clk; 609 *sram++ = gd->arch.inp_clk; 610 *sram++ = gd->cpu_clk; 611 *sram++ = gd->arch.vco_clk; 612 *sram++ = gd->arch.flb_clk; 613 *sram++ = 0xb8c3ba11; /* boot signature */ 614 } 615 #endif 616 617 return 0; 618 } 619 620 static int setup_board_part2(void) 621 { 622 bd_t *bd = gd->bd; 623 624 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 625 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 626 #if defined(CONFIG_CPM2) 627 bd->bi_cpmfreq = gd->arch.cpm_clk; 628 bd->bi_brgfreq = gd->arch.brg_clk; 629 bd->bi_sccfreq = gd->arch.scc_clk; 630 bd->bi_vco = gd->arch.vco_out; 631 #endif /* CONFIG_CPM2 */ 632 #if defined(CONFIG_MPC512X) 633 bd->bi_ipsfreq = gd->arch.ips_clk; 634 #endif /* CONFIG_MPC512X */ 635 #if defined(CONFIG_MPC5xxx) 636 bd->bi_ipbfreq = gd->arch.ipb_clk; 637 bd->bi_pcifreq = gd->pci_clk; 638 #endif /* CONFIG_MPC5xxx */ 639 640 return 0; 641 } 642 #endif 643 644 #ifdef CONFIG_SYS_EXTBDINFO 645 static int setup_board_extra(void) 646 { 647 bd_t *bd = gd->bd; 648 649 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 650 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 651 sizeof(bd->bi_r_version)); 652 653 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 654 bd->bi_plb_busfreq = gd->bus_clk; 655 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 656 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 657 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 658 bd->bi_pci_busfreq = get_PCI_freq(); 659 bd->bi_opbfreq = get_OPB_freq(); 660 #elif defined(CONFIG_XILINX_405) 661 bd->bi_pci_busfreq = get_PCI_freq(); 662 #endif 663 664 return 0; 665 } 666 #endif 667 668 #ifdef CONFIG_POST 669 static int init_post(void) 670 { 671 post_bootmode_init(); 672 post_run(NULL, POST_ROM | post_bootmode_get(0)); 673 674 return 0; 675 } 676 #endif 677 678 static int setup_baud_rate(void) 679 { 680 /* Ick, can we get rid of this line? */ 681 gd->bd->bi_baudrate = gd->baudrate; 682 683 return 0; 684 } 685 686 static int setup_dram_config(void) 687 { 688 /* Ram is board specific, so move it to board code ... */ 689 dram_init_banksize(); 690 691 return 0; 692 } 693 694 static int reloc_fdt(void) 695 { 696 if (gd->new_fdt) { 697 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 698 gd->fdt_blob = gd->new_fdt; 699 } 700 701 return 0; 702 } 703 704 static int setup_reloc(void) 705 { 706 gd->relocaddr = gd->dest_addr; 707 gd->start_addr_sp = gd->dest_addr_sp; 708 gd->reloc_off = gd->dest_addr - CONFIG_SYS_TEXT_BASE; 709 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 710 711 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 712 debug("Relocating to %08lx, new gd at %p, sp at %08lx\n", 713 gd->dest_addr, gd->new_gd, gd->dest_addr_sp); 714 715 return 0; 716 } 717 718 /* ARM calls relocate_code from its crt0.S */ 719 #if !defined(CONFIG_ARM) 720 721 static int jump_to_copy(void) 722 { 723 /* 724 * x86 is special, but in a nice way. It uses a trampoline which 725 * enables the dcache if possible. 726 * 727 * For now, other archs use relocate_code(), which is implemented 728 * similarly for all archs. When we do generic relocation, hopefully 729 * we can make all archs enable the dcache prior to relocation. 730 */ 731 #ifdef CONFIG_X86 732 /* 733 * SDRAM and console are now initialised. The final stack can now 734 * be setup in SDRAM. Code execution will continue in Flash, but 735 * with the stack in SDRAM and Global Data in temporary memory 736 * (CPU cache) 737 */ 738 board_init_f_r_trampoline(gd->start_addr_sp); 739 #else 740 relocate_code(gd->dest_addr_sp, gd->new_gd, gd->dest_addr); 741 #endif 742 743 return 0; 744 } 745 #endif 746 747 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 748 static int mark_bootstage(void) 749 { 750 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 751 752 return 0; 753 } 754 755 static init_fnc_t init_sequence_f[] = { 756 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ 757 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ 758 !defined(CONFIG_MPC86xx) 759 zero_global_data, 760 #endif 761 setup_fdt, 762 setup_mon_len, 763 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 764 /* TODO: can this go into arch_cpu_init()? */ 765 probecpu, 766 #endif 767 arch_cpu_init, /* basic arch cpu dependent setup */ 768 #ifdef CONFIG_X86 769 cpu_init_f, /* TODO(sjg@chromium.org): remove */ 770 # ifdef CONFIG_OF_CONTROL 771 find_fdt, /* TODO(sjg@chromium.org): remove */ 772 # endif 773 #endif 774 mark_bootstage, 775 #ifdef CONFIG_OF_CONTROL 776 fdtdec_check_fdt, 777 #endif 778 #if defined(CONFIG_BOARD_EARLY_INIT_F) 779 board_early_init_f, 780 #endif 781 /* TODO: can any of this go into arch_cpu_init()? */ 782 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 783 get_clocks, /* get CPU and bus clocks (etc.) */ 784 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 785 && !defined(CONFIG_TQM885D) 786 adjust_sdram_tbs_8xx, 787 #endif 788 /* TODO: can we rename this to timer_init()? */ 789 init_timebase, 790 #endif 791 #ifdef CONFIG_ARM 792 timer_init, /* initialize timer */ 793 #endif 794 #ifdef CONFIG_BOARD_POSTCLK_INIT 795 board_postclk_init, 796 #endif 797 #ifdef CONFIG_FSL_ESDHC 798 get_clocks, 799 #endif 800 #ifdef CONFIG_SYS_ALLOC_DPRAM 801 #if !defined(CONFIG_CPM2) 802 dpram_init, 803 #endif 804 #endif 805 #if defined(CONFIG_BOARD_POSTCLK_INIT) 806 board_postclk_init, 807 #endif 808 env_init, /* initialize environment */ 809 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 810 /* get CPU and bus clocks according to the environment variable */ 811 get_clocks_866, 812 /* adjust sdram refresh rate according to the new clock */ 813 sdram_adjust_866, 814 init_timebase, 815 #endif 816 init_baud_rate, /* initialze baudrate settings */ 817 serial_init, /* serial communications setup */ 818 console_init_f, /* stage 1 init of console */ 819 #if defined(CONFIG_X86) && defined(CONFIG_OF_CONTROL) 820 prepare_fdt, /* TODO(sjg@chromium.org): remove */ 821 #endif 822 display_options, /* say that we are here */ 823 display_text_info, /* show debugging info if required */ 824 #if defined(CONFIG_8260) 825 prt_8260_rsr, 826 prt_8260_clks, 827 #endif /* CONFIG_8260 */ 828 #if defined(CONFIG_MPC83xx) 829 prt_83xx_rsr, 830 #endif 831 #ifdef CONFIG_PPC 832 checkcpu, 833 #endif 834 #if defined(CONFIG_DISPLAY_CPUINFO) 835 print_cpuinfo, /* display cpu info (and speed) */ 836 #endif 837 #if defined(CONFIG_MPC5xxx) 838 prt_mpc5xxx_clks, 839 #endif /* CONFIG_MPC5xxx */ 840 #if defined(CONFIG_MPC8220) 841 prt_mpc8220_clks, 842 #endif 843 #if defined(CONFIG_DISPLAY_BOARDINFO) 844 checkboard, /* display board info */ 845 #endif 846 INIT_FUNC_WATCHDOG_INIT 847 #if defined(CONFIG_MISC_INIT_F) 848 misc_init_f, 849 #endif 850 INIT_FUNC_WATCHDOG_RESET 851 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) 852 init_func_i2c, 853 #endif 854 #if defined(CONFIG_HARD_SPI) 855 init_func_spi, 856 #endif 857 #ifdef CONFIG_X86 858 dram_init_f, /* configure available RAM banks */ 859 /* x86 would prefer that this happens after relocation */ 860 dram_init, 861 #endif 862 announce_dram_init, 863 /* TODO: unify all these dram functions? */ 864 #ifdef CONFIG_ARM 865 dram_init, /* configure available RAM banks */ 866 #endif 867 #ifdef CONFIG_PPC 868 init_func_ram, 869 #endif 870 #ifdef CONFIG_POST 871 post_init_f, 872 #endif 873 INIT_FUNC_WATCHDOG_RESET 874 #if defined(CONFIG_SYS_DRAM_TEST) 875 testdram, 876 #endif /* CONFIG_SYS_DRAM_TEST */ 877 INIT_FUNC_WATCHDOG_RESET 878 879 #ifdef CONFIG_POST 880 init_post, 881 #endif 882 INIT_FUNC_WATCHDOG_RESET 883 /* 884 * Now that we have DRAM mapped and working, we can 885 * relocate the code and continue running from DRAM. 886 * 887 * Reserve memory at end of RAM for (top down in that order): 888 * - area that won't get touched by U-Boot and Linux (optional) 889 * - kernel log buffer 890 * - protected RAM 891 * - LCD framebuffer 892 * - monitor code 893 * - board info struct 894 */ 895 setup_dest_addr, 896 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 897 reserve_logbuffer, 898 #endif 899 #ifdef CONFIG_PRAM 900 reserve_pram, 901 #endif 902 reserve_round_4k, 903 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 904 defined(CONFIG_ARM) 905 reserve_mmu, 906 #endif 907 #ifdef CONFIG_LCD 908 reserve_lcd, 909 #endif 910 /* TODO: Why the dependency on CONFIG_8xx? */ 911 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ 912 && !defined(CONFIG_ARM) && !defined(CONFIG_X86) 913 reserve_video, 914 #endif 915 reserve_uboot, 916 #ifndef CONFIG_SPL_BUILD 917 reserve_malloc, 918 reserve_board, 919 #endif 920 setup_machine, 921 reserve_global_data, 922 reserve_fdt, 923 reserve_stacks, 924 setup_dram_config, 925 show_dram_config, 926 #ifdef CONFIG_PPC 927 setup_board_part1, 928 INIT_FUNC_WATCHDOG_RESET 929 setup_board_part2, 930 #endif 931 setup_baud_rate, 932 display_new_sp, 933 #ifdef CONFIG_SYS_EXTBDINFO 934 setup_board_extra, 935 #endif 936 INIT_FUNC_WATCHDOG_RESET 937 reloc_fdt, 938 setup_reloc, 939 #ifndef CONFIG_ARM 940 jump_to_copy, 941 #endif 942 NULL, 943 }; 944 945 void board_init_f(ulong boot_flags) 946 { 947 #ifndef CONFIG_X86 948 gd_t data; 949 950 gd = &data; 951 #endif 952 953 gd->flags = boot_flags; 954 955 if (initcall_run_list(init_sequence_f)) 956 hang(); 957 958 #ifndef CONFIG_ARM 959 /* NOTREACHED - jump_to_copy() does not return */ 960 hang(); 961 #endif 962 } 963 964 #ifdef CONFIG_X86 965 /* 966 * For now this code is only used on x86. 967 * 968 * init_sequence_f_r is the list of init functions which are run when 969 * U-Boot is executing from Flash with a semi-limited 'C' environment. 970 * The following limitations must be considered when implementing an 971 * '_f_r' function: 972 * - 'static' variables are read-only 973 * - Global Data (gd->xxx) is read/write 974 * 975 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 976 * supported). It _should_, if possible, copy global data to RAM and 977 * initialise the CPU caches (to speed up the relocation process) 978 * 979 * NOTE: At present only x86 uses this route, but it is intended that 980 * all archs will move to this when generic relocation is implemented. 981 */ 982 static init_fnc_t init_sequence_f_r[] = { 983 init_cache_f_r, 984 copy_uboot_to_ram, 985 clear_bss, 986 do_elf_reloc_fixups, 987 988 NULL, 989 }; 990 991 void board_init_f_r(void) 992 { 993 if (initcall_run_list(init_sequence_f_r)) 994 hang(); 995 996 /* 997 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 998 * Transfer execution from Flash to RAM by calculating the address 999 * of the in-RAM copy of board_init_r() and calling it 1000 */ 1001 (board_init_r + gd->reloc_off)(gd, gd->relocaddr); 1002 1003 /* NOTREACHED - board_init_r() does not return */ 1004 hang(); 1005 } 1006 #endif /* CONFIG_X86 */ 1007 1008 void hang(void) 1009 { 1010 puts("### ERROR ### Please RESET the board ###\n"); 1011 for (;;); 1012 } 1013