xref: /openbmc/u-boot/common/board_f.c (revision 61fcc7d2757bc5d6bf52739e4fc7132b5fa84efe)
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * (C) Copyright 2002-2006
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  *
6  * (C) Copyright 2002
7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8  * Marius Groeger <mgroeger@sysgo.de>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #include <common.h>
14 #include <linux/compiler.h>
15 #include <version.h>
16 #include <environment.h>
17 #include <fdtdec.h>
18 #include <fs.h>
19 #if defined(CONFIG_CMD_IDE)
20 #include <ide.h>
21 #endif
22 #include <i2c.h>
23 #include <initcall.h>
24 #include <logbuff.h>
25 
26 /* TODO: Can we move these into arch/ headers? */
27 #ifdef CONFIG_8xx
28 #include <mpc8xx.h>
29 #endif
30 #ifdef CONFIG_5xx
31 #include <mpc5xx.h>
32 #endif
33 #ifdef CONFIG_MPC5xxx
34 #include <mpc5xxx.h>
35 #endif
36 
37 #include <os.h>
38 #include <post.h>
39 #include <spi.h>
40 #include <trace.h>
41 #include <watchdog.h>
42 #include <asm/errno.h>
43 #include <asm/io.h>
44 #ifdef CONFIG_MP
45 #include <asm/mp.h>
46 #endif
47 #include <asm/sections.h>
48 #ifdef CONFIG_X86
49 #include <asm/init_helpers.h>
50 #include <asm/relocate.h>
51 #endif
52 #ifdef CONFIG_SANDBOX
53 #include <asm/state.h>
54 #endif
55 #include <linux/compiler.h>
56 
57 /*
58  * Pointer to initial global data area
59  *
60  * Here we initialize it if needed.
61  */
62 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
63 #undef	XTRN_DECLARE_GLOBAL_DATA_PTR
64 #define XTRN_DECLARE_GLOBAL_DATA_PTR	/* empty = allocate here */
65 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
66 #else
67 DECLARE_GLOBAL_DATA_PTR;
68 #endif
69 
70 /*
71  * sjg: IMO this code should be
72  * refactored to a single function, something like:
73  *
74  * void led_set_state(enum led_colour_t colour, int on);
75  */
76 /************************************************************************
77  * Coloured LED functionality
78  ************************************************************************
79  * May be supplied by boards if desired
80  */
81 inline void __coloured_LED_init(void) {}
82 void coloured_LED_init(void)
83 	__attribute__((weak, alias("__coloured_LED_init")));
84 inline void __red_led_on(void) {}
85 void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
86 inline void __red_led_off(void) {}
87 void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
88 inline void __green_led_on(void) {}
89 void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
90 inline void __green_led_off(void) {}
91 void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
92 inline void __yellow_led_on(void) {}
93 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
94 inline void __yellow_led_off(void) {}
95 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
96 inline void __blue_led_on(void) {}
97 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
98 inline void __blue_led_off(void) {}
99 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
100 
101 /*
102  * Why is gd allocated a register? Prior to reloc it might be better to
103  * just pass it around to each function in this file?
104  *
105  * After reloc one could argue that it is hardly used and doesn't need
106  * to be in a register. Or if it is it should perhaps hold pointers to all
107  * global data for all modules, so that post-reloc we can avoid the massive
108  * literal pool we get on ARM. Or perhaps just encourage each module to use
109  * a structure...
110  */
111 
112 /*
113  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
114  */
115 
116 #if defined(CONFIG_WATCHDOG)
117 static int init_func_watchdog_init(void)
118 {
119 	puts("       Watchdog enabled\n");
120 	WATCHDOG_RESET();
121 
122 	return 0;
123 }
124 
125 int init_func_watchdog_reset(void)
126 {
127 	WATCHDOG_RESET();
128 
129 	return 0;
130 }
131 #endif /* CONFIG_WATCHDOG */
132 
133 void __board_add_ram_info(int use_default)
134 {
135 	/* please define platform specific board_add_ram_info() */
136 }
137 
138 void board_add_ram_info(int)
139 	__attribute__ ((weak, alias("__board_add_ram_info")));
140 
141 static int init_baud_rate(void)
142 {
143 	gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
144 	return 0;
145 }
146 
147 static int display_text_info(void)
148 {
149 #ifndef CONFIG_SANDBOX
150 	ulong bss_start, bss_end;
151 
152 #ifdef CONFIG_SYS_SYM_OFFSETS
153 	bss_start = _bss_start_ofs + _TEXT_BASE;
154 	bss_end = _bss_end_ofs + _TEXT_BASE;
155 #else
156 	bss_start = (ulong)&__bss_start;
157 	bss_end = (ulong)&__bss_end;
158 #endif
159 	debug("U-Boot code: %08X -> %08lX  BSS: -> %08lX\n",
160 	      CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
161 #endif
162 
163 #ifdef CONFIG_MODEM_SUPPORT
164 	debug("Modem Support enabled\n");
165 #endif
166 #ifdef CONFIG_USE_IRQ
167 	debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
168 	debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
169 #endif
170 
171 	return 0;
172 }
173 
174 static int announce_dram_init(void)
175 {
176 	puts("DRAM:  ");
177 	return 0;
178 }
179 
180 #ifdef CONFIG_PPC
181 static int init_func_ram(void)
182 {
183 #ifdef	CONFIG_BOARD_TYPES
184 	int board_type = gd->board_type;
185 #else
186 	int board_type = 0;	/* use dummy arg */
187 #endif
188 
189 	gd->ram_size = initdram(board_type);
190 
191 	if (gd->ram_size > 0)
192 		return 0;
193 
194 	puts("*** failed ***\n");
195 	return 1;
196 }
197 #endif
198 
199 static int show_dram_config(void)
200 {
201 	ulong size;
202 
203 #ifdef CONFIG_NR_DRAM_BANKS
204 	int i;
205 
206 	debug("\nRAM Configuration:\n");
207 	for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
208 		size += gd->bd->bi_dram[i].size;
209 		debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
210 #ifdef DEBUG
211 		print_size(gd->bd->bi_dram[i].size, "\n");
212 #endif
213 	}
214 	debug("\nDRAM:  ");
215 #else
216 	size = gd->ram_size;
217 #endif
218 
219 	print_size(size, "");
220 	board_add_ram_info(0);
221 	putc('\n');
222 
223 	return 0;
224 }
225 
226 void __dram_init_banksize(void)
227 {
228 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
229 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
230 	gd->bd->bi_dram[0].size = get_effective_memsize();
231 #endif
232 }
233 
234 void dram_init_banksize(void)
235 	__attribute__((weak, alias("__dram_init_banksize")));
236 
237 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
238 static int init_func_i2c(void)
239 {
240 	puts("I2C:   ");
241 #ifdef CONFIG_SYS_I2C
242 	i2c_init_all();
243 #else
244 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
245 #endif
246 	puts("ready\n");
247 	return 0;
248 }
249 #endif
250 
251 #if defined(CONFIG_HARD_SPI)
252 static int init_func_spi(void)
253 {
254 	puts("SPI:   ");
255 	spi_init();
256 	puts("ready\n");
257 	return 0;
258 }
259 #endif
260 
261 __maybe_unused
262 static int zero_global_data(void)
263 {
264 	memset((void *)gd, '\0', sizeof(gd_t));
265 
266 	return 0;
267 }
268 
269 static int setup_mon_len(void)
270 {
271 #ifdef CONFIG_SYS_SYM_OFFSETS
272 	gd->mon_len = _bss_end_ofs;
273 #elif defined(CONFIG_SANDBOX)
274 	gd->mon_len = (ulong)&_end - (ulong)_init;
275 #else
276 	/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
277 	gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
278 #endif
279 	return 0;
280 }
281 
282 __weak int arch_cpu_init(void)
283 {
284 	return 0;
285 }
286 
287 #ifdef CONFIG_OF_HOSTFILE
288 
289 #define CHECK(x)		err = (x); if (err) goto failed;
290 
291 /* Create an empty device tree blob */
292 static int make_empty_fdt(void *fdt)
293 {
294 	int err;
295 
296 	CHECK(fdt_create(fdt, 256));
297 	CHECK(fdt_finish_reservemap(fdt));
298 	CHECK(fdt_begin_node(fdt, ""));
299 	CHECK(fdt_end_node(fdt));
300 	CHECK(fdt_finish(fdt));
301 
302 	return 0;
303 failed:
304 	printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
305 	return -EACCES;
306 }
307 
308 static int read_fdt_from_file(void)
309 {
310 	struct sandbox_state *state = state_get_current();
311 	void *blob;
312 	int size;
313 	int err;
314 
315 	blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
316 	if (!state->fdt_fname) {
317 		err = make_empty_fdt(blob);
318 		if (!err)
319 			goto done;
320 		return err;
321 	}
322 	err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX);
323 	if (err)
324 		return err;
325 	size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0);
326 	if (size < 0)
327 		return -EIO;
328 
329 done:
330 	gd->fdt_blob = blob;
331 
332 	return 0;
333 }
334 #endif
335 
336 #ifdef CONFIG_SANDBOX
337 static int setup_ram_buf(void)
338 {
339 	struct sandbox_state *state = state_get_current();
340 
341 	gd->arch.ram_buf = state->ram_buf;
342 	gd->ram_size = state->ram_size;
343 
344 	return 0;
345 }
346 #endif
347 
348 static int setup_fdt(void)
349 {
350 #ifdef CONFIG_OF_EMBED
351 	/* Get a pointer to the FDT */
352 	gd->fdt_blob = __dtb_dt_begin;
353 #elif defined CONFIG_OF_SEPARATE
354 	/* FDT is at end of image */
355 # ifdef CONFIG_SYS_SYM_OFFSETS
356 	gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
357 # else
358 	gd->fdt_blob = (ulong *)&_end;
359 # endif
360 #elif defined(CONFIG_OF_HOSTFILE)
361 	if (read_fdt_from_file()) {
362 		puts("Failed to read control FDT\n");
363 		return -1;
364 	}
365 #endif
366 	/* Allow the early environment to override the fdt address */
367 	gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
368 						(uintptr_t)gd->fdt_blob);
369 	return 0;
370 }
371 
372 /* Get the top of usable RAM */
373 __weak ulong board_get_usable_ram_top(ulong total_size)
374 {
375 	return gd->ram_top;
376 }
377 
378 static int setup_dest_addr(void)
379 {
380 	debug("Monitor len: %08lX\n", gd->mon_len);
381 	/*
382 	 * Ram is setup, size stored in gd !!
383 	 */
384 	debug("Ram size: %08lX\n", (ulong)gd->ram_size);
385 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
386 	/*
387 	 * Subtract specified amount of memory to hide so that it won't
388 	 * get "touched" at all by U-Boot. By fixing up gd->ram_size
389 	 * the Linux kernel should now get passed the now "corrected"
390 	 * memory size and won't touch it either. This should work
391 	 * for arch/ppc and arch/powerpc. Only Linux board ports in
392 	 * arch/powerpc with bootwrapper support, that recalculate the
393 	 * memory size from the SDRAM controller setup will have to
394 	 * get fixed.
395 	 */
396 	gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
397 #endif
398 #ifdef CONFIG_SYS_SDRAM_BASE
399 	gd->ram_top = CONFIG_SYS_SDRAM_BASE;
400 #endif
401 	gd->ram_top += get_effective_memsize();
402 	gd->ram_top = board_get_usable_ram_top(gd->mon_len);
403 	gd->relocaddr = gd->ram_top;
404 	debug("Ram top: %08lX\n", (ulong)gd->ram_top);
405 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
406 	/*
407 	 * We need to make sure the location we intend to put secondary core
408 	 * boot code is reserved and not used by any part of u-boot
409 	 */
410 	if (gd->relocaddr > determine_mp_bootpg(NULL)) {
411 		gd->relocaddr = determine_mp_bootpg(NULL);
412 		debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
413 	}
414 #endif
415 	return 0;
416 }
417 
418 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
419 static int reserve_logbuffer(void)
420 {
421 	/* reserve kernel log buffer */
422 	gd->relocaddr -= LOGBUFF_RESERVE;
423 	debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
424 		gd->relocaddr);
425 	return 0;
426 }
427 #endif
428 
429 #ifdef CONFIG_PRAM
430 /* reserve protected RAM */
431 static int reserve_pram(void)
432 {
433 	ulong reg;
434 
435 	reg = getenv_ulong("pram", 10, CONFIG_PRAM);
436 	gd->relocaddr -= (reg << 10);		/* size is in kB */
437 	debug("Reserving %ldk for protected RAM at %08lx\n", reg,
438 	      gd->relocaddr);
439 	return 0;
440 }
441 #endif /* CONFIG_PRAM */
442 
443 /* Round memory pointer down to next 4 kB limit */
444 static int reserve_round_4k(void)
445 {
446 	gd->relocaddr &= ~(4096 - 1);
447 	return 0;
448 }
449 
450 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
451 		defined(CONFIG_ARM)
452 static int reserve_mmu(void)
453 {
454 	/* reserve TLB table */
455 	gd->arch.tlb_size = PGTABLE_SIZE;
456 	gd->relocaddr -= gd->arch.tlb_size;
457 
458 	/* round down to next 64 kB limit */
459 	gd->relocaddr &= ~(0x10000 - 1);
460 
461 	gd->arch.tlb_addr = gd->relocaddr;
462 	debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
463 	      gd->arch.tlb_addr + gd->arch.tlb_size);
464 	return 0;
465 }
466 #endif
467 
468 #ifdef CONFIG_LCD
469 static int reserve_lcd(void)
470 {
471 #ifdef CONFIG_FB_ADDR
472 	gd->fb_base = CONFIG_FB_ADDR;
473 #else
474 	/* reserve memory for LCD display (always full pages) */
475 	gd->relocaddr = lcd_setmem(gd->relocaddr);
476 	gd->fb_base = gd->relocaddr;
477 #endif /* CONFIG_FB_ADDR */
478 	return 0;
479 }
480 #endif /* CONFIG_LCD */
481 
482 static int reserve_trace(void)
483 {
484 #ifdef CONFIG_TRACE
485 	gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
486 	gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
487 	debug("Reserving %dk for trace data at: %08lx\n",
488 	      CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
489 #endif
490 
491 	return 0;
492 }
493 
494 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
495 		&& !defined(CONFIG_ARM) && !defined(CONFIG_X86)
496 static int reserve_video(void)
497 {
498 	/* reserve memory for video display (always full pages) */
499 	gd->relocaddr = video_setmem(gd->relocaddr);
500 	gd->fb_base = gd->relocaddr;
501 
502 	return 0;
503 }
504 #endif
505 
506 static int reserve_uboot(void)
507 {
508 	/*
509 	 * reserve memory for U-Boot code, data & bss
510 	 * round down to next 4 kB limit
511 	 */
512 	gd->relocaddr -= gd->mon_len;
513 	gd->relocaddr &= ~(4096 - 1);
514 #ifdef CONFIG_E500
515 	/* round down to next 64 kB limit so that IVPR stays aligned */
516 	gd->relocaddr &= ~(65536 - 1);
517 #endif
518 
519 	debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
520 	      gd->relocaddr);
521 
522 	gd->start_addr_sp = gd->relocaddr;
523 
524 	return 0;
525 }
526 
527 #ifndef CONFIG_SPL_BUILD
528 /* reserve memory for malloc() area */
529 static int reserve_malloc(void)
530 {
531 	gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
532 	debug("Reserving %dk for malloc() at: %08lx\n",
533 			TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
534 	return 0;
535 }
536 
537 /* (permanently) allocate a Board Info struct */
538 static int reserve_board(void)
539 {
540 	gd->start_addr_sp -= sizeof(bd_t);
541 	gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
542 	memset(gd->bd, '\0', sizeof(bd_t));
543 	debug("Reserving %zu Bytes for Board Info at: %08lx\n",
544 			sizeof(bd_t), gd->start_addr_sp);
545 	return 0;
546 }
547 #endif
548 
549 static int setup_machine(void)
550 {
551 #ifdef CONFIG_MACH_TYPE
552 	gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
553 #endif
554 	return 0;
555 }
556 
557 static int reserve_global_data(void)
558 {
559 	gd->start_addr_sp -= sizeof(gd_t);
560 	gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
561 	debug("Reserving %zu Bytes for Global Data at: %08lx\n",
562 			sizeof(gd_t), gd->start_addr_sp);
563 	return 0;
564 }
565 
566 static int reserve_fdt(void)
567 {
568 	/*
569 	 * If the device tree is sitting immediate above our image then we
570 	 * must relocate it. If it is embedded in the data section, then it
571 	 * will be relocated with other data.
572 	 */
573 	if (gd->fdt_blob) {
574 		gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
575 
576 		gd->start_addr_sp -= gd->fdt_size;
577 		gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
578 		debug("Reserving %lu Bytes for FDT at: %08lx\n",
579 		      gd->fdt_size, gd->start_addr_sp);
580 	}
581 
582 	return 0;
583 }
584 
585 static int reserve_stacks(void)
586 {
587 #ifdef CONFIG_SPL_BUILD
588 # ifdef CONFIG_ARM
589 	gd->start_addr_sp -= 128;	/* leave 32 words for abort-stack */
590 	gd->irq_sp = gd->start_addr_sp;
591 # endif
592 #else
593 # ifdef CONFIG_PPC
594 	ulong *s;
595 # endif
596 
597 	/* setup stack pointer for exceptions */
598 	gd->start_addr_sp -= 16;
599 	gd->start_addr_sp &= ~0xf;
600 	gd->irq_sp = gd->start_addr_sp;
601 
602 	/*
603 	 * Handle architecture-specific things here
604 	 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
605 	 * to handle this and put in arch/xxx/lib/stack.c
606 	 */
607 # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
608 #  ifdef CONFIG_USE_IRQ
609 	gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
610 	debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
611 		CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
612 
613 	/* 8-byte alignment for ARM ABI compliance */
614 	gd->start_addr_sp &= ~0x07;
615 #  endif
616 	/* leave 3 words for abort-stack, plus 1 for alignment */
617 	gd->start_addr_sp -= 16;
618 # elif defined(CONFIG_PPC)
619 	/* Clear initial stack frame */
620 	s = (ulong *) gd->start_addr_sp;
621 	*s = 0; /* Terminate back chain */
622 	*++s = 0; /* NULL return address */
623 # endif /* Architecture specific code */
624 
625 	return 0;
626 #endif
627 }
628 
629 static int display_new_sp(void)
630 {
631 	debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
632 
633 	return 0;
634 }
635 
636 #ifdef CONFIG_PPC
637 static int setup_board_part1(void)
638 {
639 	bd_t *bd = gd->bd;
640 
641 	/*
642 	 * Save local variables to board info struct
643 	 */
644 
645 	bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;	/* start of memory */
646 	bd->bi_memsize = gd->ram_size;			/* size in bytes */
647 
648 #ifdef CONFIG_SYS_SRAM_BASE
649 	bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;	/* start of SRAM */
650 	bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;		/* size  of SRAM */
651 #endif
652 
653 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
654 		defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
655 	bd->bi_immr_base = CONFIG_SYS_IMMR;	/* base  of IMMR register     */
656 #endif
657 #if defined(CONFIG_MPC5xxx)
658 	bd->bi_mbar_base = CONFIG_SYS_MBAR;	/* base of internal registers */
659 #endif
660 #if defined(CONFIG_MPC83xx)
661 	bd->bi_immrbar = CONFIG_SYS_IMMR;
662 #endif
663 
664 	return 0;
665 }
666 
667 static int setup_board_part2(void)
668 {
669 	bd_t *bd = gd->bd;
670 
671 	bd->bi_intfreq = gd->cpu_clk;	/* Internal Freq, in Hz */
672 	bd->bi_busfreq = gd->bus_clk;	/* Bus Freq,      in Hz */
673 #if defined(CONFIG_CPM2)
674 	bd->bi_cpmfreq = gd->arch.cpm_clk;
675 	bd->bi_brgfreq = gd->arch.brg_clk;
676 	bd->bi_sccfreq = gd->arch.scc_clk;
677 	bd->bi_vco = gd->arch.vco_out;
678 #endif /* CONFIG_CPM2 */
679 #if defined(CONFIG_MPC512X)
680 	bd->bi_ipsfreq = gd->arch.ips_clk;
681 #endif /* CONFIG_MPC512X */
682 #if defined(CONFIG_MPC5xxx)
683 	bd->bi_ipbfreq = gd->arch.ipb_clk;
684 	bd->bi_pcifreq = gd->pci_clk;
685 #endif /* CONFIG_MPC5xxx */
686 
687 	return 0;
688 }
689 #endif
690 
691 #ifdef CONFIG_SYS_EXTBDINFO
692 static int setup_board_extra(void)
693 {
694 	bd_t *bd = gd->bd;
695 
696 	strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
697 	strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
698 		sizeof(bd->bi_r_version));
699 
700 	bd->bi_procfreq = gd->cpu_clk;	/* Processor Speed, In Hz */
701 	bd->bi_plb_busfreq = gd->bus_clk;
702 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
703 		defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
704 		defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
705 	bd->bi_pci_busfreq = get_PCI_freq();
706 	bd->bi_opbfreq = get_OPB_freq();
707 #elif defined(CONFIG_XILINX_405)
708 	bd->bi_pci_busfreq = get_PCI_freq();
709 #endif
710 
711 	return 0;
712 }
713 #endif
714 
715 #ifdef CONFIG_POST
716 static int init_post(void)
717 {
718 	post_bootmode_init();
719 	post_run(NULL, POST_ROM | post_bootmode_get(0));
720 
721 	return 0;
722 }
723 #endif
724 
725 static int setup_baud_rate(void)
726 {
727 	/* Ick, can we get rid of this line? */
728 	gd->bd->bi_baudrate = gd->baudrate;
729 
730 	return 0;
731 }
732 
733 static int setup_dram_config(void)
734 {
735 	/* Ram is board specific, so move it to board code ... */
736 	dram_init_banksize();
737 
738 	return 0;
739 }
740 
741 static int reloc_fdt(void)
742 {
743 	if (gd->new_fdt) {
744 		memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
745 		gd->fdt_blob = gd->new_fdt;
746 	}
747 
748 	return 0;
749 }
750 
751 static int setup_reloc(void)
752 {
753 	gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
754 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
755 
756 	debug("Relocation Offset is: %08lx\n", gd->reloc_off);
757 	debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
758 	      gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
759 	      gd->start_addr_sp);
760 
761 	return 0;
762 }
763 
764 /* ARM calls relocate_code from its crt0.S */
765 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
766 
767 static int jump_to_copy(void)
768 {
769 	/*
770 	 * x86 is special, but in a nice way. It uses a trampoline which
771 	 * enables the dcache if possible.
772 	 *
773 	 * For now, other archs use relocate_code(), which is implemented
774 	 * similarly for all archs. When we do generic relocation, hopefully
775 	 * we can make all archs enable the dcache prior to relocation.
776 	 */
777 #ifdef CONFIG_X86
778 	/*
779 	 * SDRAM and console are now initialised. The final stack can now
780 	 * be setup in SDRAM. Code execution will continue in Flash, but
781 	 * with the stack in SDRAM and Global Data in temporary memory
782 	 * (CPU cache)
783 	 */
784 	board_init_f_r_trampoline(gd->start_addr_sp);
785 #else
786 	relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
787 #endif
788 
789 	return 0;
790 }
791 #endif
792 
793 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
794 static int mark_bootstage(void)
795 {
796 	bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
797 
798 	return 0;
799 }
800 
801 static init_fnc_t init_sequence_f[] = {
802 #ifdef CONFIG_SANDBOX
803 	setup_ram_buf,
804 #endif
805 	setup_mon_len,
806 	setup_fdt,
807 	trace_early_init,
808 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
809 	/* TODO: can this go into arch_cpu_init()? */
810 	probecpu,
811 #endif
812 	arch_cpu_init,		/* basic arch cpu dependent setup */
813 #ifdef CONFIG_X86
814 	cpu_init_f,		/* TODO(sjg@chromium.org): remove */
815 # ifdef CONFIG_OF_CONTROL
816 	find_fdt,		/* TODO(sjg@chromium.org): remove */
817 # endif
818 #endif
819 	mark_bootstage,
820 #ifdef CONFIG_OF_CONTROL
821 	fdtdec_check_fdt,
822 #endif
823 #if defined(CONFIG_BOARD_EARLY_INIT_F)
824 	board_early_init_f,
825 #endif
826 	/* TODO: can any of this go into arch_cpu_init()? */
827 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
828 	get_clocks,		/* get CPU and bus clocks (etc.) */
829 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
830 		&& !defined(CONFIG_TQM885D)
831 	adjust_sdram_tbs_8xx,
832 #endif
833 	/* TODO: can we rename this to timer_init()? */
834 	init_timebase,
835 #endif
836 #ifdef CONFIG_ARM
837 	timer_init,		/* initialize timer */
838 #endif
839 #ifdef CONFIG_SYS_ALLOC_DPRAM
840 #if !defined(CONFIG_CPM2)
841 	dpram_init,
842 #endif
843 #endif
844 #if defined(CONFIG_BOARD_POSTCLK_INIT)
845 	board_postclk_init,
846 #endif
847 #ifdef CONFIG_FSL_ESDHC
848 	get_clocks,
849 #endif
850 	env_init,		/* initialize environment */
851 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
852 	/* get CPU and bus clocks according to the environment variable */
853 	get_clocks_866,
854 	/* adjust sdram refresh rate according to the new clock */
855 	sdram_adjust_866,
856 	init_timebase,
857 #endif
858 	init_baud_rate,		/* initialze baudrate settings */
859 	serial_init,		/* serial communications setup */
860 	console_init_f,		/* stage 1 init of console */
861 #ifdef CONFIG_SANDBOX
862 	sandbox_early_getopt_check,
863 #endif
864 #ifdef CONFIG_OF_CONTROL
865 	fdtdec_prepare_fdt,
866 #endif
867 	display_options,	/* say that we are here */
868 	display_text_info,	/* show debugging info if required */
869 #if defined(CONFIG_8260)
870 	prt_8260_rsr,
871 	prt_8260_clks,
872 #endif /* CONFIG_8260 */
873 #if defined(CONFIG_MPC83xx)
874 	prt_83xx_rsr,
875 #endif
876 #ifdef CONFIG_PPC
877 	checkcpu,
878 #endif
879 	print_cpuinfo,		/* display cpu info (and speed) */
880 #if defined(CONFIG_MPC5xxx)
881 	prt_mpc5xxx_clks,
882 #endif /* CONFIG_MPC5xxx */
883 #if defined(CONFIG_DISPLAY_BOARDINFO)
884 	checkboard,		/* display board info */
885 #endif
886 	INIT_FUNC_WATCHDOG_INIT
887 #if defined(CONFIG_MISC_INIT_F)
888 	misc_init_f,
889 #endif
890 	INIT_FUNC_WATCHDOG_RESET
891 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
892 	init_func_i2c,
893 #endif
894 #if defined(CONFIG_HARD_SPI)
895 	init_func_spi,
896 #endif
897 #ifdef CONFIG_X86
898 	dram_init_f,		/* configure available RAM banks */
899 	calculate_relocation_address,
900 #endif
901 	announce_dram_init,
902 	/* TODO: unify all these dram functions? */
903 #ifdef CONFIG_ARM
904 	dram_init,		/* configure available RAM banks */
905 #endif
906 #ifdef CONFIG_PPC
907 	init_func_ram,
908 #endif
909 #ifdef CONFIG_POST
910 	post_init_f,
911 #endif
912 	INIT_FUNC_WATCHDOG_RESET
913 #if defined(CONFIG_SYS_DRAM_TEST)
914 	testdram,
915 #endif /* CONFIG_SYS_DRAM_TEST */
916 	INIT_FUNC_WATCHDOG_RESET
917 
918 #ifdef CONFIG_POST
919 	init_post,
920 #endif
921 	INIT_FUNC_WATCHDOG_RESET
922 	/*
923 	 * Now that we have DRAM mapped and working, we can
924 	 * relocate the code and continue running from DRAM.
925 	 *
926 	 * Reserve memory at end of RAM for (top down in that order):
927 	 *  - area that won't get touched by U-Boot and Linux (optional)
928 	 *  - kernel log buffer
929 	 *  - protected RAM
930 	 *  - LCD framebuffer
931 	 *  - monitor code
932 	 *  - board info struct
933 	 */
934 	setup_dest_addr,
935 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
936 	reserve_logbuffer,
937 #endif
938 #ifdef CONFIG_PRAM
939 	reserve_pram,
940 #endif
941 	reserve_round_4k,
942 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
943 		defined(CONFIG_ARM)
944 	reserve_mmu,
945 #endif
946 #ifdef CONFIG_LCD
947 	reserve_lcd,
948 #endif
949 	reserve_trace,
950 	/* TODO: Why the dependency on CONFIG_8xx? */
951 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
952 		&& !defined(CONFIG_ARM) && !defined(CONFIG_X86)
953 	reserve_video,
954 #endif
955 	reserve_uboot,
956 #ifndef CONFIG_SPL_BUILD
957 	reserve_malloc,
958 	reserve_board,
959 #endif
960 	setup_machine,
961 	reserve_global_data,
962 	reserve_fdt,
963 	reserve_stacks,
964 	setup_dram_config,
965 	show_dram_config,
966 #ifdef CONFIG_PPC
967 	setup_board_part1,
968 	INIT_FUNC_WATCHDOG_RESET
969 	setup_board_part2,
970 #endif
971 	setup_baud_rate,
972 	display_new_sp,
973 #ifdef CONFIG_SYS_EXTBDINFO
974 	setup_board_extra,
975 #endif
976 	INIT_FUNC_WATCHDOG_RESET
977 	reloc_fdt,
978 	setup_reloc,
979 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
980 	jump_to_copy,
981 #endif
982 	NULL,
983 };
984 
985 void board_init_f(ulong boot_flags)
986 {
987 #ifndef CONFIG_X86
988 	gd_t data;
989 
990 	gd = &data;
991 #endif
992 
993 	/*
994 	 * Clear global data before it is accessed at debug print
995 	 * in initcall_run_list. Otherwise the debug print probably
996 	 * get the wrong vaule of gd->have_console.
997 	 */
998 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
999 		!defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
1000 		!defined(CONFIG_MPC86xx) && !defined(CONFIG_X86)
1001 	zero_global_data();
1002 #endif
1003 
1004 	gd->flags = boot_flags;
1005 	gd->have_console = 0;
1006 
1007 	if (initcall_run_list(init_sequence_f))
1008 		hang();
1009 
1010 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1011 	/* NOTREACHED - jump_to_copy() does not return */
1012 	hang();
1013 #endif
1014 }
1015 
1016 #ifdef CONFIG_X86
1017 /*
1018  * For now this code is only used on x86.
1019  *
1020  * init_sequence_f_r is the list of init functions which are run when
1021  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1022  * The following limitations must be considered when implementing an
1023  * '_f_r' function:
1024  *  - 'static' variables are read-only
1025  *  - Global Data (gd->xxx) is read/write
1026  *
1027  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1028  * supported).  It _should_, if possible, copy global data to RAM and
1029  * initialise the CPU caches (to speed up the relocation process)
1030  *
1031  * NOTE: At present only x86 uses this route, but it is intended that
1032  * all archs will move to this when generic relocation is implemented.
1033  */
1034 static init_fnc_t init_sequence_f_r[] = {
1035 	init_cache_f_r,
1036 	copy_uboot_to_ram,
1037 	clear_bss,
1038 	do_elf_reloc_fixups,
1039 
1040 	NULL,
1041 };
1042 
1043 void board_init_f_r(void)
1044 {
1045 	if (initcall_run_list(init_sequence_f_r))
1046 		hang();
1047 
1048 	/*
1049 	 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1050 	 * Transfer execution from Flash to RAM by calculating the address
1051 	 * of the in-RAM copy of board_init_r() and calling it
1052 	 */
1053 	(board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1054 
1055 	/* NOTREACHED - board_init_r() does not return */
1056 	hang();
1057 }
1058 #endif /* CONFIG_X86 */
1059