xref: /openbmc/u-boot/common/board_f.c (revision 473af36a)
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * (C) Copyright 2002-2006
4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5  *
6  * (C) Copyright 2002
7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8  * Marius Groeger <mgroeger@sysgo.de>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #include <common.h>
14 #include <linux/compiler.h>
15 #include <version.h>
16 #include <console.h>
17 #include <environment.h>
18 #include <dm.h>
19 #include <fdtdec.h>
20 #include <fs.h>
21 #if defined(CONFIG_CMD_IDE)
22 #include <ide.h>
23 #endif
24 #include <i2c.h>
25 #include <initcall.h>
26 #include <logbuff.h>
27 #include <malloc.h>
28 #include <mapmem.h>
29 
30 /* TODO: Can we move these into arch/ headers? */
31 #ifdef CONFIG_8xx
32 #include <mpc8xx.h>
33 #endif
34 #ifdef CONFIG_5xx
35 #include <mpc5xx.h>
36 #endif
37 #ifdef CONFIG_MPC5xxx
38 #include <mpc5xxx.h>
39 #endif
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
41 #include <asm/mp.h>
42 #endif
43 
44 #include <os.h>
45 #include <post.h>
46 #include <spi.h>
47 #include <status_led.h>
48 #include <timer.h>
49 #include <trace.h>
50 #include <video.h>
51 #include <watchdog.h>
52 #include <asm/errno.h>
53 #include <asm/io.h>
54 #include <asm/sections.h>
55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
56 #include <asm/init_helpers.h>
57 #include <asm/relocate.h>
58 #endif
59 #ifdef CONFIG_SANDBOX
60 #include <asm/state.h>
61 #endif
62 #include <dm/root.h>
63 #include <linux/compiler.h>
64 
65 /*
66  * Pointer to initial global data area
67  *
68  * Here we initialize it if needed.
69  */
70 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
71 #undef	XTRN_DECLARE_GLOBAL_DATA_PTR
72 #define XTRN_DECLARE_GLOBAL_DATA_PTR	/* empty = allocate here */
73 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
74 #else
75 DECLARE_GLOBAL_DATA_PTR;
76 #endif
77 
78 /*
79  * TODO(sjg@chromium.org): IMO this code should be
80  * refactored to a single function, something like:
81  *
82  * void led_set_state(enum led_colour_t colour, int on);
83  */
84 /************************************************************************
85  * Coloured LED functionality
86  ************************************************************************
87  * May be supplied by boards if desired
88  */
89 __weak void coloured_LED_init(void) {}
90 __weak void red_led_on(void) {}
91 __weak void red_led_off(void) {}
92 __weak void green_led_on(void) {}
93 __weak void green_led_off(void) {}
94 __weak void yellow_led_on(void) {}
95 __weak void yellow_led_off(void) {}
96 __weak void blue_led_on(void) {}
97 __weak void blue_led_off(void) {}
98 
99 /*
100  * Why is gd allocated a register? Prior to reloc it might be better to
101  * just pass it around to each function in this file?
102  *
103  * After reloc one could argue that it is hardly used and doesn't need
104  * to be in a register. Or if it is it should perhaps hold pointers to all
105  * global data for all modules, so that post-reloc we can avoid the massive
106  * literal pool we get on ARM. Or perhaps just encourage each module to use
107  * a structure...
108  */
109 
110 /*
111  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
112  */
113 
114 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
115 static int init_func_watchdog_init(void)
116 {
117 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
118 	defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
119 	defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
120 	defined(CONFIG_DESIGNWARE_WATCHDOG) || \
121 	defined(CONFIG_IMX_WATCHDOG))
122 	hw_watchdog_init();
123 	puts("       Watchdog enabled\n");
124 # endif
125 	WATCHDOG_RESET();
126 
127 	return 0;
128 }
129 
130 int init_func_watchdog_reset(void)
131 {
132 	WATCHDOG_RESET();
133 
134 	return 0;
135 }
136 #endif /* CONFIG_WATCHDOG */
137 
138 __weak void board_add_ram_info(int use_default)
139 {
140 	/* please define platform specific board_add_ram_info() */
141 }
142 
143 static int init_baud_rate(void)
144 {
145 	gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
146 	return 0;
147 }
148 
149 static int display_text_info(void)
150 {
151 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
152 	ulong bss_start, bss_end, text_base;
153 
154 	bss_start = (ulong)&__bss_start;
155 	bss_end = (ulong)&__bss_end;
156 
157 #ifdef CONFIG_SYS_TEXT_BASE
158 	text_base = CONFIG_SYS_TEXT_BASE;
159 #else
160 	text_base = CONFIG_SYS_MONITOR_BASE;
161 #endif
162 
163 	debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
164 		text_base, bss_start, bss_end);
165 #endif
166 
167 #ifdef CONFIG_USE_IRQ
168 	debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
169 	debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
170 #endif
171 
172 	return 0;
173 }
174 
175 static int announce_dram_init(void)
176 {
177 	puts("DRAM:  ");
178 	return 0;
179 }
180 
181 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
182 static int init_func_ram(void)
183 {
184 #ifdef	CONFIG_BOARD_TYPES
185 	int board_type = gd->board_type;
186 #else
187 	int board_type = 0;	/* use dummy arg */
188 #endif
189 
190 	gd->ram_size = initdram(board_type);
191 
192 	if (gd->ram_size > 0)
193 		return 0;
194 
195 	puts("*** failed ***\n");
196 	return 1;
197 }
198 #endif
199 
200 static int show_dram_config(void)
201 {
202 	unsigned long long size;
203 
204 #ifdef CONFIG_NR_DRAM_BANKS
205 	int i;
206 
207 	debug("\nRAM Configuration:\n");
208 	for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
209 		size += gd->bd->bi_dram[i].size;
210 		debug("Bank #%d: %llx ", i,
211 		      (unsigned long long)(gd->bd->bi_dram[i].start));
212 #ifdef DEBUG
213 		print_size(gd->bd->bi_dram[i].size, "\n");
214 #endif
215 	}
216 	debug("\nDRAM:  ");
217 #else
218 	size = gd->ram_size;
219 #endif
220 
221 	print_size(size, "");
222 	board_add_ram_info(0);
223 	putc('\n');
224 
225 	return 0;
226 }
227 
228 __weak void dram_init_banksize(void)
229 {
230 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
231 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
232 	gd->bd->bi_dram[0].size = get_effective_memsize();
233 #endif
234 }
235 
236 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
237 static int init_func_i2c(void)
238 {
239 	puts("I2C:   ");
240 #ifdef CONFIG_SYS_I2C
241 	i2c_init_all();
242 #else
243 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
244 #endif
245 	puts("ready\n");
246 	return 0;
247 }
248 #endif
249 
250 #if defined(CONFIG_HARD_SPI)
251 static int init_func_spi(void)
252 {
253 	puts("SPI:   ");
254 	spi_init();
255 	puts("ready\n");
256 	return 0;
257 }
258 #endif
259 
260 __maybe_unused
261 static int zero_global_data(void)
262 {
263 	memset((void *)gd, '\0', sizeof(gd_t));
264 
265 	return 0;
266 }
267 
268 static int setup_mon_len(void)
269 {
270 #if defined(__ARM__) || defined(__MICROBLAZE__)
271 	gd->mon_len = (ulong)&__bss_end - (ulong)_start;
272 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
273 	gd->mon_len = (ulong)&_end - (ulong)_init;
274 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
275 	gd->mon_len = CONFIG_SYS_MONITOR_LEN;
276 #elif defined(CONFIG_NDS32)
277 	gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
278 #elif defined(CONFIG_SYS_MONITOR_BASE)
279 	/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
280 	gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
281 #endif
282 	return 0;
283 }
284 
285 __weak int arch_cpu_init(void)
286 {
287 	return 0;
288 }
289 
290 #ifdef CONFIG_SANDBOX
291 static int setup_ram_buf(void)
292 {
293 	struct sandbox_state *state = state_get_current();
294 
295 	gd->arch.ram_buf = state->ram_buf;
296 	gd->ram_size = state->ram_size;
297 
298 	return 0;
299 }
300 #endif
301 
302 /* Get the top of usable RAM */
303 __weak ulong board_get_usable_ram_top(ulong total_size)
304 {
305 #ifdef CONFIG_SYS_SDRAM_BASE
306 	/*
307 	 * Detect whether we have so much RAM that it goes past the end of our
308 	 * 32-bit address space. If so, clip the usable RAM so it doesn't.
309 	 */
310 	if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
311 		/*
312 		 * Will wrap back to top of 32-bit space when reservations
313 		 * are made.
314 		 */
315 		return 0;
316 #endif
317 	return gd->ram_top;
318 }
319 
320 __weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)
321 {
322 #ifdef CONFIG_SYS_MEM_TOP_HIDE
323 	return ram_size - CONFIG_SYS_MEM_TOP_HIDE;
324 #else
325 	return ram_size;
326 #endif
327 }
328 
329 static int setup_dest_addr(void)
330 {
331 	debug("Monitor len: %08lX\n", gd->mon_len);
332 	/*
333 	 * Ram is setup, size stored in gd !!
334 	 */
335 	debug("Ram size: %08lX\n", (ulong)gd->ram_size);
336 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
337 	/* Reserve memory for secure MMU tables, and/or security monitor */
338 	gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
339 	/*
340 	 * Record secure memory location. Need recalcuate if memory splits
341 	 * into banks, or the ram base is not zero.
342 	 */
343 	gd->arch.secure_ram = gd->ram_size;
344 #endif
345 	/*
346 	 * Subtract specified amount of memory to hide so that it won't
347 	 * get "touched" at all by U-Boot. By fixing up gd->ram_size
348 	 * the Linux kernel should now get passed the now "corrected"
349 	 * memory size and won't touch it either. This has been used
350 	 * by arch/powerpc exclusively. Now ARMv8 takes advantage of
351 	 * thie mechanism. If memory is split into banks, addresses
352 	 * need to be calculated.
353 	 */
354 	gd->ram_size = board_reserve_ram_top(gd->ram_size);
355 
356 #ifdef CONFIG_SYS_SDRAM_BASE
357 	gd->ram_top = CONFIG_SYS_SDRAM_BASE;
358 #endif
359 	gd->ram_top += get_effective_memsize();
360 	gd->ram_top = board_get_usable_ram_top(gd->mon_len);
361 	gd->relocaddr = gd->ram_top;
362 	debug("Ram top: %08lX\n", (ulong)gd->ram_top);
363 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
364 	/*
365 	 * We need to make sure the location we intend to put secondary core
366 	 * boot code is reserved and not used by any part of u-boot
367 	 */
368 	if (gd->relocaddr > determine_mp_bootpg(NULL)) {
369 		gd->relocaddr = determine_mp_bootpg(NULL);
370 		debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
371 	}
372 #endif
373 	return 0;
374 }
375 
376 #if defined(CONFIG_SPARC)
377 static int reserve_prom(void)
378 {
379 	/* defined in arch/sparc/cpu/leon?/prom.c */
380 	extern void *__prom_start_reloc;
381 	int size = 8192; /* page table = 2k, prom = 6k */
382 	gd->relocaddr -= size;
383 	__prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
384 	debug("Reserving %dk for PROM and page table at %08lx\n", size,
385 		gd->relocaddr);
386 	return 0;
387 }
388 #endif
389 
390 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
391 static int reserve_logbuffer(void)
392 {
393 	/* reserve kernel log buffer */
394 	gd->relocaddr -= LOGBUFF_RESERVE;
395 	debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
396 		gd->relocaddr);
397 	return 0;
398 }
399 #endif
400 
401 #ifdef CONFIG_PRAM
402 /* reserve protected RAM */
403 static int reserve_pram(void)
404 {
405 	ulong reg;
406 
407 	reg = getenv_ulong("pram", 10, CONFIG_PRAM);
408 	gd->relocaddr -= (reg << 10);		/* size is in kB */
409 	debug("Reserving %ldk for protected RAM at %08lx\n", reg,
410 	      gd->relocaddr);
411 	return 0;
412 }
413 #endif /* CONFIG_PRAM */
414 
415 /* Round memory pointer down to next 4 kB limit */
416 static int reserve_round_4k(void)
417 {
418 	gd->relocaddr &= ~(4096 - 1);
419 	return 0;
420 }
421 
422 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
423 		defined(CONFIG_ARM)
424 static int reserve_mmu(void)
425 {
426 	/* reserve TLB table */
427 	gd->arch.tlb_size = PGTABLE_SIZE;
428 	gd->relocaddr -= gd->arch.tlb_size;
429 
430 	/* round down to next 64 kB limit */
431 	gd->relocaddr &= ~(0x10000 - 1);
432 
433 	gd->arch.tlb_addr = gd->relocaddr;
434 	debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
435 	      gd->arch.tlb_addr + gd->arch.tlb_size);
436 
437 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
438 	/*
439 	 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
440 	 * with location within secure ram.
441 	 */
442 	gd->arch.tlb_allocated = gd->arch.tlb_addr;
443 #endif
444 
445 	return 0;
446 }
447 #endif
448 
449 #ifdef CONFIG_DM_VIDEO
450 static int reserve_video(void)
451 {
452 	ulong addr;
453 	int ret;
454 
455 	addr = gd->relocaddr;
456 	ret = video_reserve(&addr);
457 	if (ret)
458 		return ret;
459 	gd->relocaddr = addr;
460 
461 	return 0;
462 }
463 #else
464 
465 # ifdef CONFIG_LCD
466 static int reserve_lcd(void)
467 {
468 #  ifdef CONFIG_FB_ADDR
469 	gd->fb_base = CONFIG_FB_ADDR;
470 #  else
471 	/* reserve memory for LCD display (always full pages) */
472 	gd->relocaddr = lcd_setmem(gd->relocaddr);
473 	gd->fb_base = gd->relocaddr;
474 #  endif /* CONFIG_FB_ADDR */
475 
476 	return 0;
477 }
478 # endif /* CONFIG_LCD */
479 
480 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
481 		!defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
482 		!defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
483 static int reserve_legacy_video(void)
484 {
485 	/* reserve memory for video display (always full pages) */
486 	gd->relocaddr = video_setmem(gd->relocaddr);
487 	gd->fb_base = gd->relocaddr;
488 
489 	return 0;
490 }
491 # endif
492 #endif /* !CONFIG_DM_VIDEO */
493 
494 static int reserve_trace(void)
495 {
496 #ifdef CONFIG_TRACE
497 	gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
498 	gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
499 	debug("Reserving %dk for trace data at: %08lx\n",
500 	      CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
501 #endif
502 
503 	return 0;
504 }
505 
506 static int reserve_uboot(void)
507 {
508 	/*
509 	 * reserve memory for U-Boot code, data & bss
510 	 * round down to next 4 kB limit
511 	 */
512 	gd->relocaddr -= gd->mon_len;
513 	gd->relocaddr &= ~(4096 - 1);
514 #ifdef CONFIG_E500
515 	/* round down to next 64 kB limit so that IVPR stays aligned */
516 	gd->relocaddr &= ~(65536 - 1);
517 #endif
518 
519 	debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
520 	      gd->relocaddr);
521 
522 	gd->start_addr_sp = gd->relocaddr;
523 
524 	return 0;
525 }
526 
527 #ifndef CONFIG_SPL_BUILD
528 /* reserve memory for malloc() area */
529 static int reserve_malloc(void)
530 {
531 	gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
532 	debug("Reserving %dk for malloc() at: %08lx\n",
533 			TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
534 	return 0;
535 }
536 
537 /* (permanently) allocate a Board Info struct */
538 static int reserve_board(void)
539 {
540 	if (!gd->bd) {
541 		gd->start_addr_sp -= sizeof(bd_t);
542 		gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
543 		memset(gd->bd, '\0', sizeof(bd_t));
544 		debug("Reserving %zu Bytes for Board Info at: %08lx\n",
545 		      sizeof(bd_t), gd->start_addr_sp);
546 	}
547 	return 0;
548 }
549 #endif
550 
551 static int setup_machine(void)
552 {
553 #ifdef CONFIG_MACH_TYPE
554 	gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
555 #endif
556 	return 0;
557 }
558 
559 static int reserve_global_data(void)
560 {
561 	gd->start_addr_sp -= sizeof(gd_t);
562 	gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
563 	debug("Reserving %zu Bytes for Global Data at: %08lx\n",
564 			sizeof(gd_t), gd->start_addr_sp);
565 	return 0;
566 }
567 
568 static int reserve_fdt(void)
569 {
570 #ifndef CONFIG_OF_EMBED
571 	/*
572 	 * If the device tree is sitting immediately above our image then we
573 	 * must relocate it. If it is embedded in the data section, then it
574 	 * will be relocated with other data.
575 	 */
576 	if (gd->fdt_blob) {
577 		gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
578 
579 		gd->start_addr_sp -= gd->fdt_size;
580 		gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
581 		debug("Reserving %lu Bytes for FDT at: %08lx\n",
582 		      gd->fdt_size, gd->start_addr_sp);
583 	}
584 #endif
585 
586 	return 0;
587 }
588 
589 int arch_reserve_stacks(void)
590 {
591 	return 0;
592 }
593 
594 static int reserve_stacks(void)
595 {
596 	/* make stack pointer 16-byte aligned */
597 	gd->start_addr_sp -= 16;
598 	gd->start_addr_sp &= ~0xf;
599 
600 	/*
601 	 * let the architecture-specific code tailor gd->start_addr_sp and
602 	 * gd->irq_sp
603 	 */
604 	return arch_reserve_stacks();
605 }
606 
607 static int display_new_sp(void)
608 {
609 	debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
610 
611 	return 0;
612 }
613 
614 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
615 static int setup_board_part1(void)
616 {
617 	bd_t *bd = gd->bd;
618 
619 	/*
620 	 * Save local variables to board info struct
621 	 */
622 	bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;	/* start of memory */
623 	bd->bi_memsize = gd->ram_size;			/* size in bytes */
624 
625 #ifdef CONFIG_SYS_SRAM_BASE
626 	bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;	/* start of SRAM */
627 	bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;		/* size  of SRAM */
628 #endif
629 
630 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
631 		defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
632 	bd->bi_immr_base = CONFIG_SYS_IMMR;	/* base  of IMMR register     */
633 #endif
634 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
635 	bd->bi_mbar_base = CONFIG_SYS_MBAR;	/* base of internal registers */
636 #endif
637 #if defined(CONFIG_MPC83xx)
638 	bd->bi_immrbar = CONFIG_SYS_IMMR;
639 #endif
640 
641 	return 0;
642 }
643 #endif
644 
645 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
646 static int setup_board_part2(void)
647 {
648 	bd_t *bd = gd->bd;
649 
650 	bd->bi_intfreq = gd->cpu_clk;	/* Internal Freq, in Hz */
651 	bd->bi_busfreq = gd->bus_clk;	/* Bus Freq,      in Hz */
652 #if defined(CONFIG_CPM2)
653 	bd->bi_cpmfreq = gd->arch.cpm_clk;
654 	bd->bi_brgfreq = gd->arch.brg_clk;
655 	bd->bi_sccfreq = gd->arch.scc_clk;
656 	bd->bi_vco = gd->arch.vco_out;
657 #endif /* CONFIG_CPM2 */
658 #if defined(CONFIG_MPC512X)
659 	bd->bi_ipsfreq = gd->arch.ips_clk;
660 #endif /* CONFIG_MPC512X */
661 #if defined(CONFIG_MPC5xxx)
662 	bd->bi_ipbfreq = gd->arch.ipb_clk;
663 	bd->bi_pcifreq = gd->pci_clk;
664 #endif /* CONFIG_MPC5xxx */
665 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
666 	bd->bi_pcifreq = gd->pci_clk;
667 #endif
668 #if defined(CONFIG_EXTRA_CLOCK)
669 	bd->bi_inpfreq = gd->arch.inp_clk;	/* input Freq in Hz */
670 	bd->bi_vcofreq = gd->arch.vco_clk;	/* vco Freq in Hz */
671 	bd->bi_flbfreq = gd->arch.flb_clk;	/* flexbus Freq in Hz */
672 #endif
673 
674 	return 0;
675 }
676 #endif
677 
678 #ifdef CONFIG_SYS_EXTBDINFO
679 static int setup_board_extra(void)
680 {
681 	bd_t *bd = gd->bd;
682 
683 	strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
684 	strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
685 		sizeof(bd->bi_r_version));
686 
687 	bd->bi_procfreq = gd->cpu_clk;	/* Processor Speed, In Hz */
688 	bd->bi_plb_busfreq = gd->bus_clk;
689 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
690 		defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
691 		defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
692 	bd->bi_pci_busfreq = get_PCI_freq();
693 	bd->bi_opbfreq = get_OPB_freq();
694 #elif defined(CONFIG_XILINX_405)
695 	bd->bi_pci_busfreq = get_PCI_freq();
696 #endif
697 
698 	return 0;
699 }
700 #endif
701 
702 #ifdef CONFIG_POST
703 static int init_post(void)
704 {
705 	post_bootmode_init();
706 	post_run(NULL, POST_ROM | post_bootmode_get(0));
707 
708 	return 0;
709 }
710 #endif
711 
712 static int setup_dram_config(void)
713 {
714 	/* Ram is board specific, so move it to board code ... */
715 	dram_init_banksize();
716 
717 	return 0;
718 }
719 
720 static int reloc_fdt(void)
721 {
722 #ifndef CONFIG_OF_EMBED
723 	if (gd->flags & GD_FLG_SKIP_RELOC)
724 		return 0;
725 	if (gd->new_fdt) {
726 		memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
727 		gd->fdt_blob = gd->new_fdt;
728 	}
729 #endif
730 
731 	return 0;
732 }
733 
734 static int setup_reloc(void)
735 {
736 	if (gd->flags & GD_FLG_SKIP_RELOC) {
737 		debug("Skipping relocation due to flag\n");
738 		return 0;
739 	}
740 
741 #ifdef CONFIG_SYS_TEXT_BASE
742 	gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
743 #ifdef CONFIG_M68K
744 	/*
745 	 * On all ColdFire arch cpu, monitor code starts always
746 	 * just after the default vector table location, so at 0x400
747 	 */
748 	gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
749 #endif
750 #endif
751 	memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
752 
753 	debug("Relocation Offset is: %08lx\n", gd->reloc_off);
754 	debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
755 	      gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
756 	      gd->start_addr_sp);
757 
758 	return 0;
759 }
760 
761 /* ARM calls relocate_code from its crt0.S */
762 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
763 
764 static int jump_to_copy(void)
765 {
766 	if (gd->flags & GD_FLG_SKIP_RELOC)
767 		return 0;
768 	/*
769 	 * x86 is special, but in a nice way. It uses a trampoline which
770 	 * enables the dcache if possible.
771 	 *
772 	 * For now, other archs use relocate_code(), which is implemented
773 	 * similarly for all archs. When we do generic relocation, hopefully
774 	 * we can make all archs enable the dcache prior to relocation.
775 	 */
776 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
777 	/*
778 	 * SDRAM and console are now initialised. The final stack can now
779 	 * be setup in SDRAM. Code execution will continue in Flash, but
780 	 * with the stack in SDRAM and Global Data in temporary memory
781 	 * (CPU cache)
782 	 */
783 	arch_setup_gd(gd->new_gd);
784 	board_init_f_r_trampoline(gd->start_addr_sp);
785 #else
786 	relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
787 #endif
788 
789 	return 0;
790 }
791 #endif
792 
793 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
794 static int mark_bootstage(void)
795 {
796 	bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
797 
798 	return 0;
799 }
800 
801 static int initf_console_record(void)
802 {
803 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
804 	return console_record_init();
805 #else
806 	return 0;
807 #endif
808 }
809 
810 static int initf_dm(void)
811 {
812 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
813 	int ret;
814 
815 	ret = dm_init_and_scan(true);
816 	if (ret)
817 		return ret;
818 #endif
819 #ifdef CONFIG_TIMER_EARLY
820 	ret = dm_timer_init();
821 	if (ret)
822 		return ret;
823 #endif
824 
825 	return 0;
826 }
827 
828 /* Architecture-specific memory reservation */
829 __weak int reserve_arch(void)
830 {
831 	return 0;
832 }
833 
834 __weak int arch_cpu_init_dm(void)
835 {
836 	return 0;
837 }
838 
839 static init_fnc_t init_sequence_f[] = {
840 #ifdef CONFIG_SANDBOX
841 	setup_ram_buf,
842 #endif
843 	setup_mon_len,
844 #ifdef CONFIG_OF_CONTROL
845 	fdtdec_setup,
846 #endif
847 #ifdef CONFIG_TRACE
848 	trace_early_init,
849 #endif
850 	initf_malloc,
851 	initf_console_record,
852 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
853 	/* TODO: can this go into arch_cpu_init()? */
854 	probecpu,
855 #endif
856 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
857 	x86_fsp_init,
858 #endif
859 	arch_cpu_init,		/* basic arch cpu dependent setup */
860 	initf_dm,
861 	arch_cpu_init_dm,
862 	mark_bootstage,		/* need timer, go after init dm */
863 #if defined(CONFIG_BOARD_EARLY_INIT_F)
864 	board_early_init_f,
865 #endif
866 	/* TODO: can any of this go into arch_cpu_init()? */
867 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
868 	get_clocks,		/* get CPU and bus clocks (etc.) */
869 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
870 		&& !defined(CONFIG_TQM885D)
871 	adjust_sdram_tbs_8xx,
872 #endif
873 	/* TODO: can we rename this to timer_init()? */
874 	init_timebase,
875 #endif
876 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
877 		defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
878 		defined(CONFIG_SPARC)
879 	timer_init,		/* initialize timer */
880 #endif
881 #ifdef CONFIG_SYS_ALLOC_DPRAM
882 #if !defined(CONFIG_CPM2)
883 	dpram_init,
884 #endif
885 #endif
886 #if defined(CONFIG_BOARD_POSTCLK_INIT)
887 	board_postclk_init,
888 #endif
889 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
890 	get_clocks,
891 #endif
892 	env_init,		/* initialize environment */
893 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
894 	/* get CPU and bus clocks according to the environment variable */
895 	get_clocks_866,
896 	/* adjust sdram refresh rate according to the new clock */
897 	sdram_adjust_866,
898 	init_timebase,
899 #endif
900 	init_baud_rate,		/* initialze baudrate settings */
901 	serial_init,		/* serial communications setup */
902 	console_init_f,		/* stage 1 init of console */
903 #ifdef CONFIG_SANDBOX
904 	sandbox_early_getopt_check,
905 #endif
906 #ifdef CONFIG_OF_CONTROL
907 	fdtdec_prepare_fdt,
908 #endif
909 	display_options,	/* say that we are here */
910 	display_text_info,	/* show debugging info if required */
911 #if defined(CONFIG_MPC8260)
912 	prt_8260_rsr,
913 	prt_8260_clks,
914 #endif /* CONFIG_MPC8260 */
915 #if defined(CONFIG_MPC83xx)
916 	prt_83xx_rsr,
917 #endif
918 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
919 	checkcpu,
920 #endif
921 	print_cpuinfo,		/* display cpu info (and speed) */
922 #if defined(CONFIG_MPC5xxx)
923 	prt_mpc5xxx_clks,
924 #endif /* CONFIG_MPC5xxx */
925 #if defined(CONFIG_DISPLAY_BOARDINFO)
926 	show_board_info,
927 #endif
928 	INIT_FUNC_WATCHDOG_INIT
929 #if defined(CONFIG_MISC_INIT_F)
930 	misc_init_f,
931 #endif
932 	INIT_FUNC_WATCHDOG_RESET
933 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
934 	init_func_i2c,
935 #endif
936 #if defined(CONFIG_HARD_SPI)
937 	init_func_spi,
938 #endif
939 	announce_dram_init,
940 	/* TODO: unify all these dram functions? */
941 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
942 		defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
943 	dram_init,		/* configure available RAM banks */
944 #endif
945 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
946 	init_func_ram,
947 #endif
948 #ifdef CONFIG_POST
949 	post_init_f,
950 #endif
951 	INIT_FUNC_WATCHDOG_RESET
952 #if defined(CONFIG_SYS_DRAM_TEST)
953 	testdram,
954 #endif /* CONFIG_SYS_DRAM_TEST */
955 	INIT_FUNC_WATCHDOG_RESET
956 
957 #ifdef CONFIG_POST
958 	init_post,
959 #endif
960 	INIT_FUNC_WATCHDOG_RESET
961 	/*
962 	 * Now that we have DRAM mapped and working, we can
963 	 * relocate the code and continue running from DRAM.
964 	 *
965 	 * Reserve memory at end of RAM for (top down in that order):
966 	 *  - area that won't get touched by U-Boot and Linux (optional)
967 	 *  - kernel log buffer
968 	 *  - protected RAM
969 	 *  - LCD framebuffer
970 	 *  - monitor code
971 	 *  - board info struct
972 	 */
973 	setup_dest_addr,
974 #if defined(CONFIG_BLACKFIN)
975 	/* Blackfin u-boot monitor should be on top of the ram */
976 	reserve_uboot,
977 #endif
978 #if defined(CONFIG_SPARC)
979 	reserve_prom,
980 #endif
981 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
982 	reserve_logbuffer,
983 #endif
984 #ifdef CONFIG_PRAM
985 	reserve_pram,
986 #endif
987 	reserve_round_4k,
988 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
989 		defined(CONFIG_ARM)
990 	reserve_mmu,
991 #endif
992 #ifdef CONFIG_DM_VIDEO
993 	reserve_video,
994 #else
995 # ifdef CONFIG_LCD
996 	reserve_lcd,
997 # endif
998 	/* TODO: Why the dependency on CONFIG_8xx? */
999 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
1000 		!defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
1001 		!defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
1002 	reserve_legacy_video,
1003 # endif
1004 #endif /* CONFIG_DM_VIDEO */
1005 	reserve_trace,
1006 #if !defined(CONFIG_BLACKFIN)
1007 	reserve_uboot,
1008 #endif
1009 #ifndef CONFIG_SPL_BUILD
1010 	reserve_malloc,
1011 	reserve_board,
1012 #endif
1013 	setup_machine,
1014 	reserve_global_data,
1015 	reserve_fdt,
1016 	reserve_arch,
1017 	reserve_stacks,
1018 	setup_dram_config,
1019 	show_dram_config,
1020 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
1021 	setup_board_part1,
1022 #endif
1023 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
1024 	INIT_FUNC_WATCHDOG_RESET
1025 	setup_board_part2,
1026 #endif
1027 	display_new_sp,
1028 #ifdef CONFIG_SYS_EXTBDINFO
1029 	setup_board_extra,
1030 #endif
1031 	INIT_FUNC_WATCHDOG_RESET
1032 	reloc_fdt,
1033 	setup_reloc,
1034 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1035 	copy_uboot_to_ram,
1036 	clear_bss,
1037 	do_elf_reloc_fixups,
1038 #endif
1039 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1040 	jump_to_copy,
1041 #endif
1042 	NULL,
1043 };
1044 
1045 void board_init_f(ulong boot_flags)
1046 {
1047 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1048 	/*
1049 	 * For some archtectures, global data is initialized and used before
1050 	 * calling this function. The data should be preserved. For others,
1051 	 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1052 	 * here to host global data until relocation.
1053 	 */
1054 	gd_t data;
1055 
1056 	gd = &data;
1057 
1058 	/*
1059 	 * Clear global data before it is accessed at debug print
1060 	 * in initcall_run_list. Otherwise the debug print probably
1061 	 * get the wrong vaule of gd->have_console.
1062 	 */
1063 	zero_global_data();
1064 #endif
1065 
1066 	gd->flags = boot_flags;
1067 	gd->have_console = 0;
1068 
1069 	if (initcall_run_list(init_sequence_f))
1070 		hang();
1071 
1072 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1073 		!defined(CONFIG_EFI_APP)
1074 	/* NOTREACHED - jump_to_copy() does not return */
1075 	hang();
1076 #endif
1077 }
1078 
1079 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1080 /*
1081  * For now this code is only used on x86.
1082  *
1083  * init_sequence_f_r is the list of init functions which are run when
1084  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1085  * The following limitations must be considered when implementing an
1086  * '_f_r' function:
1087  *  - 'static' variables are read-only
1088  *  - Global Data (gd->xxx) is read/write
1089  *
1090  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1091  * supported).  It _should_, if possible, copy global data to RAM and
1092  * initialise the CPU caches (to speed up the relocation process)
1093  *
1094  * NOTE: At present only x86 uses this route, but it is intended that
1095  * all archs will move to this when generic relocation is implemented.
1096  */
1097 static init_fnc_t init_sequence_f_r[] = {
1098 	init_cache_f_r,
1099 
1100 	NULL,
1101 };
1102 
1103 void board_init_f_r(void)
1104 {
1105 	if (initcall_run_list(init_sequence_f_r))
1106 		hang();
1107 
1108 	/*
1109 	 * The pre-relocation drivers may be using memory that has now gone
1110 	 * away. Mark serial as unavailable - this will fall back to the debug
1111 	 * UART if available.
1112 	 */
1113 	gd->flags &= ~GD_FLG_SERIAL_READY;
1114 
1115 	/*
1116 	 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1117 	 * Transfer execution from Flash to RAM by calculating the address
1118 	 * of the in-RAM copy of board_init_r() and calling it
1119 	 */
1120 	(board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1121 
1122 	/* NOTREACHED - board_init_r() does not return */
1123 	hang();
1124 }
1125 #endif /* CONFIG_X86 */
1126