1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <environment.h> 17 #include <fdtdec.h> 18 #include <fs.h> 19 #if defined(CONFIG_CMD_IDE) 20 #include <ide.h> 21 #endif 22 #include <i2c.h> 23 #include <initcall.h> 24 #include <logbuff.h> 25 26 /* TODO: Can we move these into arch/ headers? */ 27 #ifdef CONFIG_8xx 28 #include <mpc8xx.h> 29 #endif 30 #ifdef CONFIG_5xx 31 #include <mpc5xx.h> 32 #endif 33 #ifdef CONFIG_MPC5xxx 34 #include <mpc5xxx.h> 35 #endif 36 37 #include <os.h> 38 #include <post.h> 39 #include <spi.h> 40 #include <trace.h> 41 #include <watchdog.h> 42 #include <asm/errno.h> 43 #include <asm/io.h> 44 #ifdef CONFIG_MP 45 #include <asm/mp.h> 46 #endif 47 #include <asm/sections.h> 48 #ifdef CONFIG_X86 49 #include <asm/init_helpers.h> 50 #include <asm/relocate.h> 51 #endif 52 #ifdef CONFIG_SANDBOX 53 #include <asm/state.h> 54 #endif 55 #include <linux/compiler.h> 56 57 /* 58 * Pointer to initial global data area 59 * 60 * Here we initialize it if needed. 61 */ 62 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 63 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 64 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 65 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 66 #else 67 DECLARE_GLOBAL_DATA_PTR; 68 #endif 69 70 /* 71 * sjg: IMO this code should be 72 * refactored to a single function, something like: 73 * 74 * void led_set_state(enum led_colour_t colour, int on); 75 */ 76 /************************************************************************ 77 * Coloured LED functionality 78 ************************************************************************ 79 * May be supplied by boards if desired 80 */ 81 inline void __coloured_LED_init(void) {} 82 void coloured_LED_init(void) 83 __attribute__((weak, alias("__coloured_LED_init"))); 84 inline void __red_led_on(void) {} 85 void red_led_on(void) __attribute__((weak, alias("__red_led_on"))); 86 inline void __red_led_off(void) {} 87 void red_led_off(void) __attribute__((weak, alias("__red_led_off"))); 88 inline void __green_led_on(void) {} 89 void green_led_on(void) __attribute__((weak, alias("__green_led_on"))); 90 inline void __green_led_off(void) {} 91 void green_led_off(void) __attribute__((weak, alias("__green_led_off"))); 92 inline void __yellow_led_on(void) {} 93 void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on"))); 94 inline void __yellow_led_off(void) {} 95 void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off"))); 96 inline void __blue_led_on(void) {} 97 void blue_led_on(void) __attribute__((weak, alias("__blue_led_on"))); 98 inline void __blue_led_off(void) {} 99 void blue_led_off(void) __attribute__((weak, alias("__blue_led_off"))); 100 101 /* 102 * Why is gd allocated a register? Prior to reloc it might be better to 103 * just pass it around to each function in this file? 104 * 105 * After reloc one could argue that it is hardly used and doesn't need 106 * to be in a register. Or if it is it should perhaps hold pointers to all 107 * global data for all modules, so that post-reloc we can avoid the massive 108 * literal pool we get on ARM. Or perhaps just encourage each module to use 109 * a structure... 110 */ 111 112 /* 113 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 114 */ 115 116 #if defined(CONFIG_WATCHDOG) 117 static int init_func_watchdog_init(void) 118 { 119 puts(" Watchdog enabled\n"); 120 WATCHDOG_RESET(); 121 122 return 0; 123 } 124 125 int init_func_watchdog_reset(void) 126 { 127 WATCHDOG_RESET(); 128 129 return 0; 130 } 131 #endif /* CONFIG_WATCHDOG */ 132 133 void __board_add_ram_info(int use_default) 134 { 135 /* please define platform specific board_add_ram_info() */ 136 } 137 138 void board_add_ram_info(int) 139 __attribute__ ((weak, alias("__board_add_ram_info"))); 140 141 static int init_baud_rate(void) 142 { 143 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 144 return 0; 145 } 146 147 static int display_text_info(void) 148 { 149 #ifndef CONFIG_SANDBOX 150 ulong bss_start, bss_end; 151 152 bss_start = (ulong)&__bss_start; 153 bss_end = (ulong)&__bss_end; 154 155 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n", 156 CONFIG_SYS_TEXT_BASE, bss_start, bss_end); 157 #endif 158 159 #ifdef CONFIG_MODEM_SUPPORT 160 debug("Modem Support enabled\n"); 161 #endif 162 #ifdef CONFIG_USE_IRQ 163 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 164 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 165 #endif 166 167 return 0; 168 } 169 170 static int announce_dram_init(void) 171 { 172 puts("DRAM: "); 173 return 0; 174 } 175 176 #ifdef CONFIG_PPC 177 static int init_func_ram(void) 178 { 179 #ifdef CONFIG_BOARD_TYPES 180 int board_type = gd->board_type; 181 #else 182 int board_type = 0; /* use dummy arg */ 183 #endif 184 185 gd->ram_size = initdram(board_type); 186 187 if (gd->ram_size > 0) 188 return 0; 189 190 puts("*** failed ***\n"); 191 return 1; 192 } 193 #endif 194 195 static int show_dram_config(void) 196 { 197 ulong size; 198 199 #ifdef CONFIG_NR_DRAM_BANKS 200 int i; 201 202 debug("\nRAM Configuration:\n"); 203 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 204 size += gd->bd->bi_dram[i].size; 205 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); 206 #ifdef DEBUG 207 print_size(gd->bd->bi_dram[i].size, "\n"); 208 #endif 209 } 210 debug("\nDRAM: "); 211 #else 212 size = gd->ram_size; 213 #endif 214 215 print_size(size, ""); 216 board_add_ram_info(0); 217 putc('\n'); 218 219 return 0; 220 } 221 222 void __dram_init_banksize(void) 223 { 224 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 225 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 226 gd->bd->bi_dram[0].size = get_effective_memsize(); 227 #endif 228 } 229 230 void dram_init_banksize(void) 231 __attribute__((weak, alias("__dram_init_banksize"))); 232 233 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 234 static int init_func_i2c(void) 235 { 236 puts("I2C: "); 237 #ifdef CONFIG_SYS_I2C 238 i2c_init_all(); 239 #else 240 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 241 #endif 242 puts("ready\n"); 243 return 0; 244 } 245 #endif 246 247 #if defined(CONFIG_HARD_SPI) 248 static int init_func_spi(void) 249 { 250 puts("SPI: "); 251 spi_init(); 252 puts("ready\n"); 253 return 0; 254 } 255 #endif 256 257 __maybe_unused 258 static int zero_global_data(void) 259 { 260 memset((void *)gd, '\0', sizeof(gd_t)); 261 262 return 0; 263 } 264 265 static int setup_mon_len(void) 266 { 267 #ifdef __ARM__ 268 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 269 #elif defined(CONFIG_SANDBOX) 270 gd->mon_len = (ulong)&_end - (ulong)_init; 271 #else 272 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 273 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 274 #endif 275 return 0; 276 } 277 278 __weak int arch_cpu_init(void) 279 { 280 return 0; 281 } 282 283 #ifdef CONFIG_OF_HOSTFILE 284 285 #define CHECK(x) err = (x); if (err) goto failed; 286 287 /* Create an empty device tree blob */ 288 static int make_empty_fdt(void *fdt) 289 { 290 int err; 291 292 CHECK(fdt_create(fdt, 256)); 293 CHECK(fdt_finish_reservemap(fdt)); 294 CHECK(fdt_begin_node(fdt, "")); 295 CHECK(fdt_end_node(fdt)); 296 CHECK(fdt_finish(fdt)); 297 298 return 0; 299 failed: 300 printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); 301 return -EACCES; 302 } 303 304 static int read_fdt_from_file(void) 305 { 306 struct sandbox_state *state = state_get_current(); 307 void *blob; 308 int size; 309 int err; 310 311 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); 312 if (!state->fdt_fname) { 313 err = make_empty_fdt(blob); 314 if (!err) 315 goto done; 316 return err; 317 } 318 err = fs_set_blk_dev("host", NULL, FS_TYPE_SANDBOX); 319 if (err) 320 return err; 321 size = fs_read(state->fdt_fname, CONFIG_SYS_FDT_LOAD_ADDR, 0, 0); 322 if (size < 0) 323 return -EIO; 324 325 done: 326 gd->fdt_blob = blob; 327 328 return 0; 329 } 330 #endif 331 332 #ifdef CONFIG_SANDBOX 333 static int setup_ram_buf(void) 334 { 335 struct sandbox_state *state = state_get_current(); 336 337 gd->arch.ram_buf = state->ram_buf; 338 gd->ram_size = state->ram_size; 339 340 return 0; 341 } 342 #endif 343 344 static int setup_fdt(void) 345 { 346 #ifdef CONFIG_OF_EMBED 347 /* Get a pointer to the FDT */ 348 gd->fdt_blob = __dtb_dt_begin; 349 #elif defined CONFIG_OF_SEPARATE 350 /* FDT is at end of image */ 351 gd->fdt_blob = (ulong *)&_end; 352 #elif defined(CONFIG_OF_HOSTFILE) 353 if (read_fdt_from_file()) { 354 puts("Failed to read control FDT\n"); 355 return -1; 356 } 357 #endif 358 /* Allow the early environment to override the fdt address */ 359 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, 360 (uintptr_t)gd->fdt_blob); 361 return 0; 362 } 363 364 /* Get the top of usable RAM */ 365 __weak ulong board_get_usable_ram_top(ulong total_size) 366 { 367 return gd->ram_top; 368 } 369 370 static int setup_dest_addr(void) 371 { 372 debug("Monitor len: %08lX\n", gd->mon_len); 373 /* 374 * Ram is setup, size stored in gd !! 375 */ 376 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 377 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 378 /* 379 * Subtract specified amount of memory to hide so that it won't 380 * get "touched" at all by U-Boot. By fixing up gd->ram_size 381 * the Linux kernel should now get passed the now "corrected" 382 * memory size and won't touch it either. This should work 383 * for arch/ppc and arch/powerpc. Only Linux board ports in 384 * arch/powerpc with bootwrapper support, that recalculate the 385 * memory size from the SDRAM controller setup will have to 386 * get fixed. 387 */ 388 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 389 #endif 390 #ifdef CONFIG_SYS_SDRAM_BASE 391 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 392 #endif 393 gd->ram_top += get_effective_memsize(); 394 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 395 gd->relocaddr = gd->ram_top; 396 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 397 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 398 /* 399 * We need to make sure the location we intend to put secondary core 400 * boot code is reserved and not used by any part of u-boot 401 */ 402 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 403 gd->relocaddr = determine_mp_bootpg(NULL); 404 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 405 } 406 #endif 407 return 0; 408 } 409 410 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 411 static int reserve_logbuffer(void) 412 { 413 /* reserve kernel log buffer */ 414 gd->relocaddr -= LOGBUFF_RESERVE; 415 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 416 gd->relocaddr); 417 return 0; 418 } 419 #endif 420 421 #ifdef CONFIG_PRAM 422 /* reserve protected RAM */ 423 static int reserve_pram(void) 424 { 425 ulong reg; 426 427 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 428 gd->relocaddr -= (reg << 10); /* size is in kB */ 429 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 430 gd->relocaddr); 431 return 0; 432 } 433 #endif /* CONFIG_PRAM */ 434 435 /* Round memory pointer down to next 4 kB limit */ 436 static int reserve_round_4k(void) 437 { 438 gd->relocaddr &= ~(4096 - 1); 439 return 0; 440 } 441 442 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 443 defined(CONFIG_ARM) 444 static int reserve_mmu(void) 445 { 446 /* reserve TLB table */ 447 gd->arch.tlb_size = PGTABLE_SIZE; 448 gd->relocaddr -= gd->arch.tlb_size; 449 450 /* round down to next 64 kB limit */ 451 gd->relocaddr &= ~(0x10000 - 1); 452 453 gd->arch.tlb_addr = gd->relocaddr; 454 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 455 gd->arch.tlb_addr + gd->arch.tlb_size); 456 return 0; 457 } 458 #endif 459 460 #ifdef CONFIG_LCD 461 static int reserve_lcd(void) 462 { 463 #ifdef CONFIG_FB_ADDR 464 gd->fb_base = CONFIG_FB_ADDR; 465 #else 466 /* reserve memory for LCD display (always full pages) */ 467 gd->relocaddr = lcd_setmem(gd->relocaddr); 468 gd->fb_base = gd->relocaddr; 469 #endif /* CONFIG_FB_ADDR */ 470 return 0; 471 } 472 #endif /* CONFIG_LCD */ 473 474 static int reserve_trace(void) 475 { 476 #ifdef CONFIG_TRACE 477 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 478 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 479 debug("Reserving %dk for trace data at: %08lx\n", 480 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 481 #endif 482 483 return 0; 484 } 485 486 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ 487 && !defined(CONFIG_ARM) && !defined(CONFIG_X86) 488 static int reserve_video(void) 489 { 490 /* reserve memory for video display (always full pages) */ 491 gd->relocaddr = video_setmem(gd->relocaddr); 492 gd->fb_base = gd->relocaddr; 493 494 return 0; 495 } 496 #endif 497 498 static int reserve_uboot(void) 499 { 500 /* 501 * reserve memory for U-Boot code, data & bss 502 * round down to next 4 kB limit 503 */ 504 gd->relocaddr -= gd->mon_len; 505 gd->relocaddr &= ~(4096 - 1); 506 #ifdef CONFIG_E500 507 /* round down to next 64 kB limit so that IVPR stays aligned */ 508 gd->relocaddr &= ~(65536 - 1); 509 #endif 510 511 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 512 gd->relocaddr); 513 514 gd->start_addr_sp = gd->relocaddr; 515 516 return 0; 517 } 518 519 #ifndef CONFIG_SPL_BUILD 520 /* reserve memory for malloc() area */ 521 static int reserve_malloc(void) 522 { 523 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 524 debug("Reserving %dk for malloc() at: %08lx\n", 525 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 526 return 0; 527 } 528 529 /* (permanently) allocate a Board Info struct */ 530 static int reserve_board(void) 531 { 532 gd->start_addr_sp -= sizeof(bd_t); 533 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 534 memset(gd->bd, '\0', sizeof(bd_t)); 535 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 536 sizeof(bd_t), gd->start_addr_sp); 537 return 0; 538 } 539 #endif 540 541 static int setup_machine(void) 542 { 543 #ifdef CONFIG_MACH_TYPE 544 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 545 #endif 546 return 0; 547 } 548 549 static int reserve_global_data(void) 550 { 551 gd->start_addr_sp -= sizeof(gd_t); 552 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 553 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 554 sizeof(gd_t), gd->start_addr_sp); 555 return 0; 556 } 557 558 static int reserve_fdt(void) 559 { 560 /* 561 * If the device tree is sitting immediate above our image then we 562 * must relocate it. If it is embedded in the data section, then it 563 * will be relocated with other data. 564 */ 565 if (gd->fdt_blob) { 566 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 567 568 gd->start_addr_sp -= gd->fdt_size; 569 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 570 debug("Reserving %lu Bytes for FDT at: %08lx\n", 571 gd->fdt_size, gd->start_addr_sp); 572 } 573 574 return 0; 575 } 576 577 static int reserve_stacks(void) 578 { 579 #ifdef CONFIG_SPL_BUILD 580 # ifdef CONFIG_ARM 581 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */ 582 gd->irq_sp = gd->start_addr_sp; 583 # endif 584 #else 585 # ifdef CONFIG_PPC 586 ulong *s; 587 # endif 588 589 /* setup stack pointer for exceptions */ 590 gd->start_addr_sp -= 16; 591 gd->start_addr_sp &= ~0xf; 592 gd->irq_sp = gd->start_addr_sp; 593 594 /* 595 * Handle architecture-specific things here 596 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() 597 * to handle this and put in arch/xxx/lib/stack.c 598 */ 599 # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) 600 # ifdef CONFIG_USE_IRQ 601 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); 602 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", 603 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp); 604 605 /* 8-byte alignment for ARM ABI compliance */ 606 gd->start_addr_sp &= ~0x07; 607 # endif 608 /* leave 3 words for abort-stack, plus 1 for alignment */ 609 gd->start_addr_sp -= 16; 610 # elif defined(CONFIG_PPC) 611 /* Clear initial stack frame */ 612 s = (ulong *) gd->start_addr_sp; 613 *s = 0; /* Terminate back chain */ 614 *++s = 0; /* NULL return address */ 615 # endif /* Architecture specific code */ 616 617 return 0; 618 #endif 619 } 620 621 static int display_new_sp(void) 622 { 623 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 624 625 return 0; 626 } 627 628 #ifdef CONFIG_PPC 629 static int setup_board_part1(void) 630 { 631 bd_t *bd = gd->bd; 632 633 /* 634 * Save local variables to board info struct 635 */ 636 637 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 638 bd->bi_memsize = gd->ram_size; /* size in bytes */ 639 640 #ifdef CONFIG_SYS_SRAM_BASE 641 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 642 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 643 #endif 644 645 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 646 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 647 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 648 #endif 649 #if defined(CONFIG_MPC5xxx) 650 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 651 #endif 652 #if defined(CONFIG_MPC83xx) 653 bd->bi_immrbar = CONFIG_SYS_IMMR; 654 #endif 655 656 return 0; 657 } 658 659 static int setup_board_part2(void) 660 { 661 bd_t *bd = gd->bd; 662 663 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 664 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 665 #if defined(CONFIG_CPM2) 666 bd->bi_cpmfreq = gd->arch.cpm_clk; 667 bd->bi_brgfreq = gd->arch.brg_clk; 668 bd->bi_sccfreq = gd->arch.scc_clk; 669 bd->bi_vco = gd->arch.vco_out; 670 #endif /* CONFIG_CPM2 */ 671 #if defined(CONFIG_MPC512X) 672 bd->bi_ipsfreq = gd->arch.ips_clk; 673 #endif /* CONFIG_MPC512X */ 674 #if defined(CONFIG_MPC5xxx) 675 bd->bi_ipbfreq = gd->arch.ipb_clk; 676 bd->bi_pcifreq = gd->pci_clk; 677 #endif /* CONFIG_MPC5xxx */ 678 679 return 0; 680 } 681 #endif 682 683 #ifdef CONFIG_SYS_EXTBDINFO 684 static int setup_board_extra(void) 685 { 686 bd_t *bd = gd->bd; 687 688 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 689 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 690 sizeof(bd->bi_r_version)); 691 692 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 693 bd->bi_plb_busfreq = gd->bus_clk; 694 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 695 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 696 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 697 bd->bi_pci_busfreq = get_PCI_freq(); 698 bd->bi_opbfreq = get_OPB_freq(); 699 #elif defined(CONFIG_XILINX_405) 700 bd->bi_pci_busfreq = get_PCI_freq(); 701 #endif 702 703 return 0; 704 } 705 #endif 706 707 #ifdef CONFIG_POST 708 static int init_post(void) 709 { 710 post_bootmode_init(); 711 post_run(NULL, POST_ROM | post_bootmode_get(0)); 712 713 return 0; 714 } 715 #endif 716 717 static int setup_baud_rate(void) 718 { 719 /* Ick, can we get rid of this line? */ 720 gd->bd->bi_baudrate = gd->baudrate; 721 722 return 0; 723 } 724 725 static int setup_dram_config(void) 726 { 727 /* Ram is board specific, so move it to board code ... */ 728 dram_init_banksize(); 729 730 return 0; 731 } 732 733 static int reloc_fdt(void) 734 { 735 if (gd->new_fdt) { 736 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 737 gd->fdt_blob = gd->new_fdt; 738 } 739 740 return 0; 741 } 742 743 static int setup_reloc(void) 744 { 745 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 746 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 747 748 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 749 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 750 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 751 gd->start_addr_sp); 752 753 return 0; 754 } 755 756 /* ARM calls relocate_code from its crt0.S */ 757 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 758 759 static int jump_to_copy(void) 760 { 761 /* 762 * x86 is special, but in a nice way. It uses a trampoline which 763 * enables the dcache if possible. 764 * 765 * For now, other archs use relocate_code(), which is implemented 766 * similarly for all archs. When we do generic relocation, hopefully 767 * we can make all archs enable the dcache prior to relocation. 768 */ 769 #ifdef CONFIG_X86 770 /* 771 * SDRAM and console are now initialised. The final stack can now 772 * be setup in SDRAM. Code execution will continue in Flash, but 773 * with the stack in SDRAM and Global Data in temporary memory 774 * (CPU cache) 775 */ 776 board_init_f_r_trampoline(gd->start_addr_sp); 777 #else 778 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 779 #endif 780 781 return 0; 782 } 783 #endif 784 785 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 786 static int mark_bootstage(void) 787 { 788 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 789 790 return 0; 791 } 792 793 static init_fnc_t init_sequence_f[] = { 794 #ifdef CONFIG_SANDBOX 795 setup_ram_buf, 796 #endif 797 setup_mon_len, 798 setup_fdt, 799 trace_early_init, 800 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 801 /* TODO: can this go into arch_cpu_init()? */ 802 probecpu, 803 #endif 804 arch_cpu_init, /* basic arch cpu dependent setup */ 805 #ifdef CONFIG_X86 806 cpu_init_f, /* TODO(sjg@chromium.org): remove */ 807 # ifdef CONFIG_OF_CONTROL 808 find_fdt, /* TODO(sjg@chromium.org): remove */ 809 # endif 810 #endif 811 mark_bootstage, 812 #ifdef CONFIG_OF_CONTROL 813 fdtdec_check_fdt, 814 #endif 815 #if defined(CONFIG_BOARD_EARLY_INIT_F) 816 board_early_init_f, 817 #endif 818 /* TODO: can any of this go into arch_cpu_init()? */ 819 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 820 get_clocks, /* get CPU and bus clocks (etc.) */ 821 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 822 && !defined(CONFIG_TQM885D) 823 adjust_sdram_tbs_8xx, 824 #endif 825 /* TODO: can we rename this to timer_init()? */ 826 init_timebase, 827 #endif 828 #ifdef CONFIG_ARM 829 timer_init, /* initialize timer */ 830 #endif 831 #ifdef CONFIG_SYS_ALLOC_DPRAM 832 #if !defined(CONFIG_CPM2) 833 dpram_init, 834 #endif 835 #endif 836 #if defined(CONFIG_BOARD_POSTCLK_INIT) 837 board_postclk_init, 838 #endif 839 #ifdef CONFIG_FSL_ESDHC 840 get_clocks, 841 #endif 842 env_init, /* initialize environment */ 843 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 844 /* get CPU and bus clocks according to the environment variable */ 845 get_clocks_866, 846 /* adjust sdram refresh rate according to the new clock */ 847 sdram_adjust_866, 848 init_timebase, 849 #endif 850 init_baud_rate, /* initialze baudrate settings */ 851 serial_init, /* serial communications setup */ 852 console_init_f, /* stage 1 init of console */ 853 #ifdef CONFIG_SANDBOX 854 sandbox_early_getopt_check, 855 #endif 856 #ifdef CONFIG_OF_CONTROL 857 fdtdec_prepare_fdt, 858 #endif 859 display_options, /* say that we are here */ 860 display_text_info, /* show debugging info if required */ 861 #if defined(CONFIG_MPC8260) 862 prt_8260_rsr, 863 prt_8260_clks, 864 #endif /* CONFIG_MPC8260 */ 865 #if defined(CONFIG_MPC83xx) 866 prt_83xx_rsr, 867 #endif 868 #ifdef CONFIG_PPC 869 checkcpu, 870 #endif 871 print_cpuinfo, /* display cpu info (and speed) */ 872 #if defined(CONFIG_MPC5xxx) 873 prt_mpc5xxx_clks, 874 #endif /* CONFIG_MPC5xxx */ 875 #if defined(CONFIG_DISPLAY_BOARDINFO) 876 checkboard, /* display board info */ 877 #endif 878 INIT_FUNC_WATCHDOG_INIT 879 #if defined(CONFIG_MISC_INIT_F) 880 misc_init_f, 881 #endif 882 INIT_FUNC_WATCHDOG_RESET 883 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 884 init_func_i2c, 885 #endif 886 #if defined(CONFIG_HARD_SPI) 887 init_func_spi, 888 #endif 889 #ifdef CONFIG_X86 890 dram_init_f, /* configure available RAM banks */ 891 calculate_relocation_address, 892 #endif 893 announce_dram_init, 894 /* TODO: unify all these dram functions? */ 895 #ifdef CONFIG_ARM 896 dram_init, /* configure available RAM banks */ 897 #endif 898 #ifdef CONFIG_PPC 899 init_func_ram, 900 #endif 901 #ifdef CONFIG_POST 902 post_init_f, 903 #endif 904 INIT_FUNC_WATCHDOG_RESET 905 #if defined(CONFIG_SYS_DRAM_TEST) 906 testdram, 907 #endif /* CONFIG_SYS_DRAM_TEST */ 908 INIT_FUNC_WATCHDOG_RESET 909 910 #ifdef CONFIG_POST 911 init_post, 912 #endif 913 INIT_FUNC_WATCHDOG_RESET 914 /* 915 * Now that we have DRAM mapped and working, we can 916 * relocate the code and continue running from DRAM. 917 * 918 * Reserve memory at end of RAM for (top down in that order): 919 * - area that won't get touched by U-Boot and Linux (optional) 920 * - kernel log buffer 921 * - protected RAM 922 * - LCD framebuffer 923 * - monitor code 924 * - board info struct 925 */ 926 setup_dest_addr, 927 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 928 reserve_logbuffer, 929 #endif 930 #ifdef CONFIG_PRAM 931 reserve_pram, 932 #endif 933 reserve_round_4k, 934 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 935 defined(CONFIG_ARM) 936 reserve_mmu, 937 #endif 938 #ifdef CONFIG_LCD 939 reserve_lcd, 940 #endif 941 reserve_trace, 942 /* TODO: Why the dependency on CONFIG_8xx? */ 943 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \ 944 && !defined(CONFIG_ARM) && !defined(CONFIG_X86) 945 reserve_video, 946 #endif 947 reserve_uboot, 948 #ifndef CONFIG_SPL_BUILD 949 reserve_malloc, 950 reserve_board, 951 #endif 952 setup_machine, 953 reserve_global_data, 954 reserve_fdt, 955 reserve_stacks, 956 setup_dram_config, 957 show_dram_config, 958 #ifdef CONFIG_PPC 959 setup_board_part1, 960 INIT_FUNC_WATCHDOG_RESET 961 setup_board_part2, 962 #endif 963 setup_baud_rate, 964 display_new_sp, 965 #ifdef CONFIG_SYS_EXTBDINFO 966 setup_board_extra, 967 #endif 968 INIT_FUNC_WATCHDOG_RESET 969 reloc_fdt, 970 setup_reloc, 971 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 972 jump_to_copy, 973 #endif 974 NULL, 975 }; 976 977 void board_init_f(ulong boot_flags) 978 { 979 #ifndef CONFIG_X86 980 gd_t data; 981 982 gd = &data; 983 #endif 984 985 /* 986 * Clear global data before it is accessed at debug print 987 * in initcall_run_list. Otherwise the debug print probably 988 * get the wrong vaule of gd->have_console. 989 */ 990 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ 991 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ 992 !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86) 993 zero_global_data(); 994 #endif 995 996 gd->flags = boot_flags; 997 gd->have_console = 0; 998 999 if (initcall_run_list(init_sequence_f)) 1000 hang(); 1001 1002 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 1003 /* NOTREACHED - jump_to_copy() does not return */ 1004 hang(); 1005 #endif 1006 } 1007 1008 #ifdef CONFIG_X86 1009 /* 1010 * For now this code is only used on x86. 1011 * 1012 * init_sequence_f_r is the list of init functions which are run when 1013 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1014 * The following limitations must be considered when implementing an 1015 * '_f_r' function: 1016 * - 'static' variables are read-only 1017 * - Global Data (gd->xxx) is read/write 1018 * 1019 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1020 * supported). It _should_, if possible, copy global data to RAM and 1021 * initialise the CPU caches (to speed up the relocation process) 1022 * 1023 * NOTE: At present only x86 uses this route, but it is intended that 1024 * all archs will move to this when generic relocation is implemented. 1025 */ 1026 static init_fnc_t init_sequence_f_r[] = { 1027 init_cache_f_r, 1028 copy_uboot_to_ram, 1029 clear_bss, 1030 do_elf_reloc_fixups, 1031 1032 NULL, 1033 }; 1034 1035 void board_init_f_r(void) 1036 { 1037 if (initcall_run_list(init_sequence_f_r)) 1038 hang(); 1039 1040 /* 1041 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1042 * Transfer execution from Flash to RAM by calculating the address 1043 * of the in-RAM copy of board_init_r() and calling it 1044 */ 1045 (board_init_r + gd->reloc_off)(gd, gd->relocaddr); 1046 1047 /* NOTREACHED - board_init_r() does not return */ 1048 hang(); 1049 } 1050 #endif /* CONFIG_X86 */ 1051