1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <console.h> 17 #include <environment.h> 18 #include <dm.h> 19 #include <fdtdec.h> 20 #include <fs.h> 21 #if defined(CONFIG_CMD_IDE) 22 #include <ide.h> 23 #endif 24 #include <i2c.h> 25 #include <initcall.h> 26 #include <logbuff.h> 27 #include <malloc.h> 28 #include <mapmem.h> 29 30 /* TODO: Can we move these into arch/ headers? */ 31 #ifdef CONFIG_8xx 32 #include <mpc8xx.h> 33 #endif 34 #ifdef CONFIG_5xx 35 #include <mpc5xx.h> 36 #endif 37 #ifdef CONFIG_MPC5xxx 38 #include <mpc5xxx.h> 39 #endif 40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 41 #include <asm/mp.h> 42 #endif 43 44 #include <os.h> 45 #include <post.h> 46 #include <spi.h> 47 #include <status_led.h> 48 #include <timer.h> 49 #include <trace.h> 50 #include <video.h> 51 #include <watchdog.h> 52 #include <asm/errno.h> 53 #include <asm/io.h> 54 #include <asm/sections.h> 55 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 56 #include <asm/init_helpers.h> 57 #endif 58 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 59 #include <asm/relocate.h> 60 #endif 61 #ifdef CONFIG_SANDBOX 62 #include <asm/state.h> 63 #endif 64 #include <dm/root.h> 65 #include <linux/compiler.h> 66 67 /* 68 * Pointer to initial global data area 69 * 70 * Here we initialize it if needed. 71 */ 72 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 73 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 74 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 75 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 76 #else 77 DECLARE_GLOBAL_DATA_PTR; 78 #endif 79 80 /* 81 * TODO(sjg@chromium.org): IMO this code should be 82 * refactored to a single function, something like: 83 * 84 * void led_set_state(enum led_colour_t colour, int on); 85 */ 86 /************************************************************************ 87 * Coloured LED functionality 88 ************************************************************************ 89 * May be supplied by boards if desired 90 */ 91 __weak void coloured_LED_init(void) {} 92 __weak void red_led_on(void) {} 93 __weak void red_led_off(void) {} 94 __weak void green_led_on(void) {} 95 __weak void green_led_off(void) {} 96 __weak void yellow_led_on(void) {} 97 __weak void yellow_led_off(void) {} 98 __weak void blue_led_on(void) {} 99 __weak void blue_led_off(void) {} 100 101 /* 102 * Why is gd allocated a register? Prior to reloc it might be better to 103 * just pass it around to each function in this file? 104 * 105 * After reloc one could argue that it is hardly used and doesn't need 106 * to be in a register. Or if it is it should perhaps hold pointers to all 107 * global data for all modules, so that post-reloc we can avoid the massive 108 * literal pool we get on ARM. Or perhaps just encourage each module to use 109 * a structure... 110 */ 111 112 /* 113 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 114 */ 115 116 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 117 static int init_func_watchdog_init(void) 118 { 119 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \ 120 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 121 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 122 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 123 defined(CONFIG_IMX_WATCHDOG)) 124 hw_watchdog_init(); 125 puts(" Watchdog enabled\n"); 126 # endif 127 WATCHDOG_RESET(); 128 129 return 0; 130 } 131 132 int init_func_watchdog_reset(void) 133 { 134 WATCHDOG_RESET(); 135 136 return 0; 137 } 138 #endif /* CONFIG_WATCHDOG */ 139 140 __weak void board_add_ram_info(int use_default) 141 { 142 /* please define platform specific board_add_ram_info() */ 143 } 144 145 static int init_baud_rate(void) 146 { 147 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 148 return 0; 149 } 150 151 static int display_text_info(void) 152 { 153 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 154 ulong bss_start, bss_end, text_base; 155 156 bss_start = (ulong)&__bss_start; 157 bss_end = (ulong)&__bss_end; 158 159 #ifdef CONFIG_SYS_TEXT_BASE 160 text_base = CONFIG_SYS_TEXT_BASE; 161 #else 162 text_base = CONFIG_SYS_MONITOR_BASE; 163 #endif 164 165 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 166 text_base, bss_start, bss_end); 167 #endif 168 169 #ifdef CONFIG_USE_IRQ 170 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 171 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 172 #endif 173 174 return 0; 175 } 176 177 static int announce_dram_init(void) 178 { 179 puts("DRAM: "); 180 return 0; 181 } 182 183 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 184 static int init_func_ram(void) 185 { 186 #ifdef CONFIG_BOARD_TYPES 187 int board_type = gd->board_type; 188 #else 189 int board_type = 0; /* use dummy arg */ 190 #endif 191 192 gd->ram_size = initdram(board_type); 193 194 if (gd->ram_size > 0) 195 return 0; 196 197 puts("*** failed ***\n"); 198 return 1; 199 } 200 #endif 201 202 static int show_dram_config(void) 203 { 204 unsigned long long size; 205 206 #ifdef CONFIG_NR_DRAM_BANKS 207 int i; 208 209 debug("\nRAM Configuration:\n"); 210 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 211 size += gd->bd->bi_dram[i].size; 212 debug("Bank #%d: %llx ", i, 213 (unsigned long long)(gd->bd->bi_dram[i].start)); 214 #ifdef DEBUG 215 print_size(gd->bd->bi_dram[i].size, "\n"); 216 #endif 217 } 218 debug("\nDRAM: "); 219 #else 220 size = gd->ram_size; 221 #endif 222 223 print_size(size, ""); 224 board_add_ram_info(0); 225 putc('\n'); 226 227 return 0; 228 } 229 230 __weak void dram_init_banksize(void) 231 { 232 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 233 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 234 gd->bd->bi_dram[0].size = get_effective_memsize(); 235 #endif 236 } 237 238 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 239 static int init_func_i2c(void) 240 { 241 puts("I2C: "); 242 #ifdef CONFIG_SYS_I2C 243 i2c_init_all(); 244 #else 245 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 246 #endif 247 puts("ready\n"); 248 return 0; 249 } 250 #endif 251 252 #if defined(CONFIG_HARD_SPI) 253 static int init_func_spi(void) 254 { 255 puts("SPI: "); 256 spi_init(); 257 puts("ready\n"); 258 return 0; 259 } 260 #endif 261 262 __maybe_unused 263 static int zero_global_data(void) 264 { 265 memset((void *)gd, '\0', sizeof(gd_t)); 266 267 return 0; 268 } 269 270 static int setup_mon_len(void) 271 { 272 #if defined(__ARM__) || defined(__MICROBLAZE__) 273 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 274 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 275 gd->mon_len = (ulong)&_end - (ulong)_init; 276 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) || \ 277 defined(CONFIG_XTENSA) 278 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 279 #elif defined(CONFIG_NDS32) 280 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 281 #elif defined(CONFIG_SYS_MONITOR_BASE) 282 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 283 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 284 #endif 285 return 0; 286 } 287 288 __weak int arch_cpu_init(void) 289 { 290 return 0; 291 } 292 293 #ifdef CONFIG_SANDBOX 294 static int setup_ram_buf(void) 295 { 296 struct sandbox_state *state = state_get_current(); 297 298 gd->arch.ram_buf = state->ram_buf; 299 gd->ram_size = state->ram_size; 300 301 return 0; 302 } 303 #endif 304 305 /* Get the top of usable RAM */ 306 __weak ulong board_get_usable_ram_top(ulong total_size) 307 { 308 #ifdef CONFIG_SYS_SDRAM_BASE 309 /* 310 * Detect whether we have so much RAM that it goes past the end of our 311 * 32-bit address space. If so, clip the usable RAM so it doesn't. 312 */ 313 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 314 /* 315 * Will wrap back to top of 32-bit space when reservations 316 * are made. 317 */ 318 return 0; 319 #endif 320 return gd->ram_top; 321 } 322 323 __weak phys_size_t board_reserve_ram_top(phys_size_t ram_size) 324 { 325 #ifdef CONFIG_SYS_MEM_TOP_HIDE 326 return ram_size - CONFIG_SYS_MEM_TOP_HIDE; 327 #else 328 return ram_size; 329 #endif 330 } 331 332 static int setup_dest_addr(void) 333 { 334 debug("Monitor len: %08lX\n", gd->mon_len); 335 /* 336 * Ram is setup, size stored in gd !! 337 */ 338 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 339 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 340 /* Reserve memory for secure MMU tables, and/or security monitor */ 341 gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE; 342 /* 343 * Record secure memory location. Need recalcuate if memory splits 344 * into banks, or the ram base is not zero. 345 */ 346 gd->arch.secure_ram = gd->ram_size; 347 #endif 348 /* 349 * Subtract specified amount of memory to hide so that it won't 350 * get "touched" at all by U-Boot. By fixing up gd->ram_size 351 * the Linux kernel should now get passed the now "corrected" 352 * memory size and won't touch it either. This has been used 353 * by arch/powerpc exclusively. Now ARMv8 takes advantage of 354 * thie mechanism. If memory is split into banks, addresses 355 * need to be calculated. 356 */ 357 gd->ram_size = board_reserve_ram_top(gd->ram_size); 358 359 #ifdef CONFIG_SYS_SDRAM_BASE 360 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 361 #endif 362 gd->ram_top += get_effective_memsize(); 363 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 364 gd->relocaddr = gd->ram_top; 365 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 366 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 367 /* 368 * We need to make sure the location we intend to put secondary core 369 * boot code is reserved and not used by any part of u-boot 370 */ 371 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 372 gd->relocaddr = determine_mp_bootpg(NULL); 373 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 374 } 375 #endif 376 return 0; 377 } 378 379 #if defined(CONFIG_SPARC) 380 static int reserve_prom(void) 381 { 382 /* defined in arch/sparc/cpu/leon?/prom.c */ 383 extern void *__prom_start_reloc; 384 int size = 8192; /* page table = 2k, prom = 6k */ 385 gd->relocaddr -= size; 386 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048); 387 debug("Reserving %dk for PROM and page table at %08lx\n", size, 388 gd->relocaddr); 389 return 0; 390 } 391 #endif 392 393 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 394 static int reserve_logbuffer(void) 395 { 396 /* reserve kernel log buffer */ 397 gd->relocaddr -= LOGBUFF_RESERVE; 398 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 399 gd->relocaddr); 400 return 0; 401 } 402 #endif 403 404 #ifdef CONFIG_PRAM 405 /* reserve protected RAM */ 406 static int reserve_pram(void) 407 { 408 ulong reg; 409 410 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 411 gd->relocaddr -= (reg << 10); /* size is in kB */ 412 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 413 gd->relocaddr); 414 return 0; 415 } 416 #endif /* CONFIG_PRAM */ 417 418 /* Round memory pointer down to next 4 kB limit */ 419 static int reserve_round_4k(void) 420 { 421 gd->relocaddr &= ~(4096 - 1); 422 return 0; 423 } 424 425 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 426 defined(CONFIG_ARM) 427 static int reserve_mmu(void) 428 { 429 /* reserve TLB table */ 430 gd->arch.tlb_size = PGTABLE_SIZE; 431 gd->relocaddr -= gd->arch.tlb_size; 432 433 /* round down to next 64 kB limit */ 434 gd->relocaddr &= ~(0x10000 - 1); 435 436 gd->arch.tlb_addr = gd->relocaddr; 437 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 438 gd->arch.tlb_addr + gd->arch.tlb_size); 439 440 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 441 /* 442 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 443 * with location within secure ram. 444 */ 445 gd->arch.tlb_allocated = gd->arch.tlb_addr; 446 #endif 447 448 return 0; 449 } 450 #endif 451 452 #ifdef CONFIG_DM_VIDEO 453 static int reserve_video(void) 454 { 455 ulong addr; 456 int ret; 457 458 addr = gd->relocaddr; 459 ret = video_reserve(&addr); 460 if (ret) 461 return ret; 462 gd->relocaddr = addr; 463 464 return 0; 465 } 466 #else 467 468 # ifdef CONFIG_LCD 469 static int reserve_lcd(void) 470 { 471 # ifdef CONFIG_FB_ADDR 472 gd->fb_base = CONFIG_FB_ADDR; 473 # else 474 /* reserve memory for LCD display (always full pages) */ 475 gd->relocaddr = lcd_setmem(gd->relocaddr); 476 gd->fb_base = gd->relocaddr; 477 # endif /* CONFIG_FB_ADDR */ 478 479 return 0; 480 } 481 # endif /* CONFIG_LCD */ 482 483 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 484 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 485 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) 486 static int reserve_legacy_video(void) 487 { 488 /* reserve memory for video display (always full pages) */ 489 gd->relocaddr = video_setmem(gd->relocaddr); 490 gd->fb_base = gd->relocaddr; 491 492 return 0; 493 } 494 # endif 495 #endif /* !CONFIG_DM_VIDEO */ 496 497 static int reserve_trace(void) 498 { 499 #ifdef CONFIG_TRACE 500 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 501 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 502 debug("Reserving %dk for trace data at: %08lx\n", 503 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 504 #endif 505 506 return 0; 507 } 508 509 static int reserve_uboot(void) 510 { 511 /* 512 * reserve memory for U-Boot code, data & bss 513 * round down to next 4 kB limit 514 */ 515 gd->relocaddr -= gd->mon_len; 516 gd->relocaddr &= ~(4096 - 1); 517 #ifdef CONFIG_E500 518 /* round down to next 64 kB limit so that IVPR stays aligned */ 519 gd->relocaddr &= ~(65536 - 1); 520 #endif 521 522 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 523 gd->relocaddr); 524 525 gd->start_addr_sp = gd->relocaddr; 526 527 return 0; 528 } 529 530 #ifndef CONFIG_SPL_BUILD 531 /* reserve memory for malloc() area */ 532 static int reserve_malloc(void) 533 { 534 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 535 debug("Reserving %dk for malloc() at: %08lx\n", 536 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 537 return 0; 538 } 539 540 /* (permanently) allocate a Board Info struct */ 541 static int reserve_board(void) 542 { 543 if (!gd->bd) { 544 gd->start_addr_sp -= sizeof(bd_t); 545 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 546 memset(gd->bd, '\0', sizeof(bd_t)); 547 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 548 sizeof(bd_t), gd->start_addr_sp); 549 } 550 return 0; 551 } 552 #endif 553 554 static int setup_machine(void) 555 { 556 #ifdef CONFIG_MACH_TYPE 557 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 558 #endif 559 return 0; 560 } 561 562 static int reserve_global_data(void) 563 { 564 gd->start_addr_sp -= sizeof(gd_t); 565 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 566 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 567 sizeof(gd_t), gd->start_addr_sp); 568 return 0; 569 } 570 571 static int reserve_fdt(void) 572 { 573 #ifndef CONFIG_OF_EMBED 574 /* 575 * If the device tree is sitting immediately above our image then we 576 * must relocate it. If it is embedded in the data section, then it 577 * will be relocated with other data. 578 */ 579 if (gd->fdt_blob) { 580 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 581 582 gd->start_addr_sp -= gd->fdt_size; 583 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 584 debug("Reserving %lu Bytes for FDT at: %08lx\n", 585 gd->fdt_size, gd->start_addr_sp); 586 } 587 #endif 588 589 return 0; 590 } 591 592 int arch_reserve_stacks(void) 593 { 594 return 0; 595 } 596 597 static int reserve_stacks(void) 598 { 599 /* make stack pointer 16-byte aligned */ 600 gd->start_addr_sp -= 16; 601 gd->start_addr_sp &= ~0xf; 602 603 /* 604 * let the architecture-specific code tailor gd->start_addr_sp and 605 * gd->irq_sp 606 */ 607 return arch_reserve_stacks(); 608 } 609 610 static int display_new_sp(void) 611 { 612 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 613 614 return 0; 615 } 616 617 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS) 618 static int setup_board_part1(void) 619 { 620 bd_t *bd = gd->bd; 621 622 /* 623 * Save local variables to board info struct 624 */ 625 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 626 bd->bi_memsize = gd->ram_size; /* size in bytes */ 627 628 #ifdef CONFIG_SYS_SRAM_BASE 629 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 630 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 631 #endif 632 633 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 634 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 635 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 636 #endif 637 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 638 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 639 #endif 640 #if defined(CONFIG_MPC83xx) 641 bd->bi_immrbar = CONFIG_SYS_IMMR; 642 #endif 643 644 return 0; 645 } 646 #endif 647 648 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 649 static int setup_board_part2(void) 650 { 651 bd_t *bd = gd->bd; 652 653 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 654 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 655 #if defined(CONFIG_CPM2) 656 bd->bi_cpmfreq = gd->arch.cpm_clk; 657 bd->bi_brgfreq = gd->arch.brg_clk; 658 bd->bi_sccfreq = gd->arch.scc_clk; 659 bd->bi_vco = gd->arch.vco_out; 660 #endif /* CONFIG_CPM2 */ 661 #if defined(CONFIG_MPC512X) 662 bd->bi_ipsfreq = gd->arch.ips_clk; 663 #endif /* CONFIG_MPC512X */ 664 #if defined(CONFIG_MPC5xxx) 665 bd->bi_ipbfreq = gd->arch.ipb_clk; 666 bd->bi_pcifreq = gd->pci_clk; 667 #endif /* CONFIG_MPC5xxx */ 668 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 669 bd->bi_pcifreq = gd->pci_clk; 670 #endif 671 #if defined(CONFIG_EXTRA_CLOCK) 672 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 673 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 674 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 675 #endif 676 677 return 0; 678 } 679 #endif 680 681 #ifdef CONFIG_SYS_EXTBDINFO 682 static int setup_board_extra(void) 683 { 684 bd_t *bd = gd->bd; 685 686 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 687 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 688 sizeof(bd->bi_r_version)); 689 690 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 691 bd->bi_plb_busfreq = gd->bus_clk; 692 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 693 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 694 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 695 bd->bi_pci_busfreq = get_PCI_freq(); 696 bd->bi_opbfreq = get_OPB_freq(); 697 #elif defined(CONFIG_XILINX_405) 698 bd->bi_pci_busfreq = get_PCI_freq(); 699 #endif 700 701 return 0; 702 } 703 #endif 704 705 #ifdef CONFIG_POST 706 static int init_post(void) 707 { 708 post_bootmode_init(); 709 post_run(NULL, POST_ROM | post_bootmode_get(0)); 710 711 return 0; 712 } 713 #endif 714 715 static int setup_dram_config(void) 716 { 717 /* Ram is board specific, so move it to board code ... */ 718 dram_init_banksize(); 719 720 return 0; 721 } 722 723 static int reloc_fdt(void) 724 { 725 #ifndef CONFIG_OF_EMBED 726 if (gd->flags & GD_FLG_SKIP_RELOC) 727 return 0; 728 if (gd->new_fdt) { 729 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 730 gd->fdt_blob = gd->new_fdt; 731 } 732 #endif 733 734 return 0; 735 } 736 737 static int setup_reloc(void) 738 { 739 if (gd->flags & GD_FLG_SKIP_RELOC) { 740 debug("Skipping relocation due to flag\n"); 741 return 0; 742 } 743 744 #ifdef CONFIG_SYS_TEXT_BASE 745 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 746 #ifdef CONFIG_M68K 747 /* 748 * On all ColdFire arch cpu, monitor code starts always 749 * just after the default vector table location, so at 0x400 750 */ 751 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 752 #endif 753 #endif 754 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 755 756 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 757 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 758 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 759 gd->start_addr_sp); 760 761 return 0; 762 } 763 764 /* ARM calls relocate_code from its crt0.S */ 765 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 766 767 static int jump_to_copy(void) 768 { 769 if (gd->flags & GD_FLG_SKIP_RELOC) 770 return 0; 771 /* 772 * x86 is special, but in a nice way. It uses a trampoline which 773 * enables the dcache if possible. 774 * 775 * For now, other archs use relocate_code(), which is implemented 776 * similarly for all archs. When we do generic relocation, hopefully 777 * we can make all archs enable the dcache prior to relocation. 778 */ 779 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 780 /* 781 * SDRAM and console are now initialised. The final stack can now 782 * be setup in SDRAM. Code execution will continue in Flash, but 783 * with the stack in SDRAM and Global Data in temporary memory 784 * (CPU cache) 785 */ 786 arch_setup_gd(gd->new_gd); 787 board_init_f_r_trampoline(gd->start_addr_sp); 788 #else 789 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 790 #endif 791 792 return 0; 793 } 794 #endif 795 796 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 797 static int mark_bootstage(void) 798 { 799 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 800 801 return 0; 802 } 803 804 static int initf_console_record(void) 805 { 806 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 807 return console_record_init(); 808 #else 809 return 0; 810 #endif 811 } 812 813 static int initf_dm(void) 814 { 815 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 816 int ret; 817 818 ret = dm_init_and_scan(true); 819 if (ret) 820 return ret; 821 #endif 822 #ifdef CONFIG_TIMER_EARLY 823 ret = dm_timer_init(); 824 if (ret) 825 return ret; 826 #endif 827 828 return 0; 829 } 830 831 /* Architecture-specific memory reservation */ 832 __weak int reserve_arch(void) 833 { 834 return 0; 835 } 836 837 __weak int arch_cpu_init_dm(void) 838 { 839 return 0; 840 } 841 842 static init_fnc_t init_sequence_f[] = { 843 #ifdef CONFIG_SANDBOX 844 setup_ram_buf, 845 #endif 846 setup_mon_len, 847 #ifdef CONFIG_OF_CONTROL 848 fdtdec_setup, 849 #endif 850 #ifdef CONFIG_TRACE 851 trace_early_init, 852 #endif 853 initf_malloc, 854 initf_console_record, 855 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 856 /* TODO: can this go into arch_cpu_init()? */ 857 probecpu, 858 #endif 859 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) 860 x86_fsp_init, 861 #endif 862 arch_cpu_init, /* basic arch cpu dependent setup */ 863 initf_dm, 864 arch_cpu_init_dm, 865 mark_bootstage, /* need timer, go after init dm */ 866 #if defined(CONFIG_BOARD_EARLY_INIT_F) 867 board_early_init_f, 868 #endif 869 /* TODO: can any of this go into arch_cpu_init()? */ 870 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 871 get_clocks, /* get CPU and bus clocks (etc.) */ 872 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 873 && !defined(CONFIG_TQM885D) 874 adjust_sdram_tbs_8xx, 875 #endif 876 /* TODO: can we rename this to timer_init()? */ 877 init_timebase, 878 #endif 879 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \ 880 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \ 881 defined(CONFIG_SPARC) 882 timer_init, /* initialize timer */ 883 #endif 884 #ifdef CONFIG_SYS_ALLOC_DPRAM 885 #if !defined(CONFIG_CPM2) 886 dpram_init, 887 #endif 888 #endif 889 #if defined(CONFIG_BOARD_POSTCLK_INIT) 890 board_postclk_init, 891 #endif 892 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 893 get_clocks, 894 #endif 895 env_init, /* initialize environment */ 896 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 897 /* get CPU and bus clocks according to the environment variable */ 898 get_clocks_866, 899 /* adjust sdram refresh rate according to the new clock */ 900 sdram_adjust_866, 901 init_timebase, 902 #endif 903 init_baud_rate, /* initialze baudrate settings */ 904 serial_init, /* serial communications setup */ 905 console_init_f, /* stage 1 init of console */ 906 #ifdef CONFIG_SANDBOX 907 sandbox_early_getopt_check, 908 #endif 909 #ifdef CONFIG_OF_CONTROL 910 fdtdec_prepare_fdt, 911 #endif 912 display_options, /* say that we are here */ 913 display_text_info, /* show debugging info if required */ 914 #if defined(CONFIG_MPC8260) 915 prt_8260_rsr, 916 prt_8260_clks, 917 #endif /* CONFIG_MPC8260 */ 918 #if defined(CONFIG_MPC83xx) 919 prt_83xx_rsr, 920 #endif 921 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 922 checkcpu, 923 #endif 924 print_cpuinfo, /* display cpu info (and speed) */ 925 #if defined(CONFIG_MPC5xxx) 926 prt_mpc5xxx_clks, 927 #endif /* CONFIG_MPC5xxx */ 928 #if defined(CONFIG_DISPLAY_BOARDINFO) 929 show_board_info, 930 #endif 931 INIT_FUNC_WATCHDOG_INIT 932 #if defined(CONFIG_MISC_INIT_F) 933 misc_init_f, 934 #endif 935 INIT_FUNC_WATCHDOG_RESET 936 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 937 init_func_i2c, 938 #endif 939 #if defined(CONFIG_HARD_SPI) 940 init_func_spi, 941 #endif 942 announce_dram_init, 943 /* TODO: unify all these dram functions? */ 944 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 945 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) 946 dram_init, /* configure available RAM banks */ 947 #endif 948 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 949 init_func_ram, 950 #endif 951 #ifdef CONFIG_POST 952 post_init_f, 953 #endif 954 INIT_FUNC_WATCHDOG_RESET 955 #if defined(CONFIG_SYS_DRAM_TEST) 956 testdram, 957 #endif /* CONFIG_SYS_DRAM_TEST */ 958 INIT_FUNC_WATCHDOG_RESET 959 960 #ifdef CONFIG_POST 961 init_post, 962 #endif 963 INIT_FUNC_WATCHDOG_RESET 964 /* 965 * Now that we have DRAM mapped and working, we can 966 * relocate the code and continue running from DRAM. 967 * 968 * Reserve memory at end of RAM for (top down in that order): 969 * - area that won't get touched by U-Boot and Linux (optional) 970 * - kernel log buffer 971 * - protected RAM 972 * - LCD framebuffer 973 * - monitor code 974 * - board info struct 975 */ 976 setup_dest_addr, 977 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_XTENSA) 978 /* Blackfin u-boot monitor should be on top of the ram */ 979 reserve_uboot, 980 #endif 981 #if defined(CONFIG_SPARC) 982 reserve_prom, 983 #endif 984 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 985 reserve_logbuffer, 986 #endif 987 #ifdef CONFIG_PRAM 988 reserve_pram, 989 #endif 990 reserve_round_4k, 991 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 992 defined(CONFIG_ARM) 993 reserve_mmu, 994 #endif 995 #ifdef CONFIG_DM_VIDEO 996 reserve_video, 997 #else 998 # ifdef CONFIG_LCD 999 reserve_lcd, 1000 # endif 1001 /* TODO: Why the dependency on CONFIG_8xx? */ 1002 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 1003 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 1004 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) 1005 reserve_legacy_video, 1006 # endif 1007 #endif /* CONFIG_DM_VIDEO */ 1008 reserve_trace, 1009 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_XTENSA) 1010 reserve_uboot, 1011 #endif 1012 #ifndef CONFIG_SPL_BUILD 1013 reserve_malloc, 1014 reserve_board, 1015 #endif 1016 setup_machine, 1017 reserve_global_data, 1018 reserve_fdt, 1019 reserve_arch, 1020 reserve_stacks, 1021 setup_dram_config, 1022 show_dram_config, 1023 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS) 1024 setup_board_part1, 1025 #endif 1026 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 1027 INIT_FUNC_WATCHDOG_RESET 1028 setup_board_part2, 1029 #endif 1030 display_new_sp, 1031 #ifdef CONFIG_SYS_EXTBDINFO 1032 setup_board_extra, 1033 #endif 1034 INIT_FUNC_WATCHDOG_RESET 1035 reloc_fdt, 1036 setup_reloc, 1037 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1038 copy_uboot_to_ram, 1039 clear_bss, 1040 do_elf_reloc_fixups, 1041 #endif 1042 #if defined(CONFIG_XTENSA) 1043 clear_bss, 1044 #endif 1045 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 1046 jump_to_copy, 1047 #endif 1048 NULL, 1049 }; 1050 1051 void board_init_f(ulong boot_flags) 1052 { 1053 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 1054 /* 1055 * For some archtectures, global data is initialized and used before 1056 * calling this function. The data should be preserved. For others, 1057 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 1058 * here to host global data until relocation. 1059 */ 1060 gd_t data; 1061 1062 gd = &data; 1063 1064 /* 1065 * Clear global data before it is accessed at debug print 1066 * in initcall_run_list. Otherwise the debug print probably 1067 * get the wrong vaule of gd->have_console. 1068 */ 1069 zero_global_data(); 1070 #endif 1071 1072 gd->flags = boot_flags; 1073 gd->have_console = 0; 1074 1075 if (initcall_run_list(init_sequence_f)) 1076 hang(); 1077 1078 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 1079 !defined(CONFIG_EFI_APP) 1080 /* NOTREACHED - jump_to_copy() does not return */ 1081 hang(); 1082 #endif 1083 } 1084 1085 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 1086 /* 1087 * For now this code is only used on x86. 1088 * 1089 * init_sequence_f_r is the list of init functions which are run when 1090 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1091 * The following limitations must be considered when implementing an 1092 * '_f_r' function: 1093 * - 'static' variables are read-only 1094 * - Global Data (gd->xxx) is read/write 1095 * 1096 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1097 * supported). It _should_, if possible, copy global data to RAM and 1098 * initialise the CPU caches (to speed up the relocation process) 1099 * 1100 * NOTE: At present only x86 uses this route, but it is intended that 1101 * all archs will move to this when generic relocation is implemented. 1102 */ 1103 static init_fnc_t init_sequence_f_r[] = { 1104 init_cache_f_r, 1105 1106 NULL, 1107 }; 1108 1109 void board_init_f_r(void) 1110 { 1111 if (initcall_run_list(init_sequence_f_r)) 1112 hang(); 1113 1114 /* 1115 * The pre-relocation drivers may be using memory that has now gone 1116 * away. Mark serial as unavailable - this will fall back to the debug 1117 * UART if available. 1118 */ 1119 gd->flags &= ~GD_FLG_SERIAL_READY; 1120 1121 /* 1122 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1123 * Transfer execution from Flash to RAM by calculating the address 1124 * of the in-RAM copy of board_init_r() and calling it 1125 */ 1126 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1127 1128 /* NOTREACHED - board_init_r() does not return */ 1129 hang(); 1130 } 1131 #endif /* CONFIG_X86 */ 1132