1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <environment.h> 17 #include <dm.h> 18 #include <fdtdec.h> 19 #include <fs.h> 20 #if defined(CONFIG_CMD_IDE) 21 #include <ide.h> 22 #endif 23 #include <i2c.h> 24 #include <initcall.h> 25 #include <logbuff.h> 26 #include <malloc.h> 27 #include <mapmem.h> 28 29 /* TODO: Can we move these into arch/ headers? */ 30 #ifdef CONFIG_8xx 31 #include <mpc8xx.h> 32 #endif 33 #ifdef CONFIG_5xx 34 #include <mpc5xx.h> 35 #endif 36 #ifdef CONFIG_MPC5xxx 37 #include <mpc5xxx.h> 38 #endif 39 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 40 #include <asm/mp.h> 41 #endif 42 43 #include <os.h> 44 #include <post.h> 45 #include <spi.h> 46 #include <status_led.h> 47 #include <trace.h> 48 #include <watchdog.h> 49 #include <asm/errno.h> 50 #include <asm/io.h> 51 #include <asm/sections.h> 52 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 53 #include <asm/init_helpers.h> 54 #include <asm/relocate.h> 55 #endif 56 #ifdef CONFIG_SANDBOX 57 #include <asm/state.h> 58 #endif 59 #include <dm/root.h> 60 #include <linux/compiler.h> 61 62 /* 63 * Pointer to initial global data area 64 * 65 * Here we initialize it if needed. 66 */ 67 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 68 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 69 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 70 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 71 #else 72 DECLARE_GLOBAL_DATA_PTR; 73 #endif 74 75 /* 76 * sjg: IMO this code should be 77 * refactored to a single function, something like: 78 * 79 * void led_set_state(enum led_colour_t colour, int on); 80 */ 81 /************************************************************************ 82 * Coloured LED functionality 83 ************************************************************************ 84 * May be supplied by boards if desired 85 */ 86 __weak void coloured_LED_init(void) {} 87 __weak void red_led_on(void) {} 88 __weak void red_led_off(void) {} 89 __weak void green_led_on(void) {} 90 __weak void green_led_off(void) {} 91 __weak void yellow_led_on(void) {} 92 __weak void yellow_led_off(void) {} 93 __weak void blue_led_on(void) {} 94 __weak void blue_led_off(void) {} 95 96 /* 97 * Why is gd allocated a register? Prior to reloc it might be better to 98 * just pass it around to each function in this file? 99 * 100 * After reloc one could argue that it is hardly used and doesn't need 101 * to be in a register. Or if it is it should perhaps hold pointers to all 102 * global data for all modules, so that post-reloc we can avoid the massive 103 * literal pool we get on ARM. Or perhaps just encourage each module to use 104 * a structure... 105 */ 106 107 /* 108 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 109 */ 110 111 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 112 static int init_func_watchdog_init(void) 113 { 114 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \ 115 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 116 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 117 defined(CONFIG_IMX_WATCHDOG)) 118 hw_watchdog_init(); 119 # endif 120 puts(" Watchdog enabled\n"); 121 WATCHDOG_RESET(); 122 123 return 0; 124 } 125 126 int init_func_watchdog_reset(void) 127 { 128 WATCHDOG_RESET(); 129 130 return 0; 131 } 132 #endif /* CONFIG_WATCHDOG */ 133 134 __weak void board_add_ram_info(int use_default) 135 { 136 /* please define platform specific board_add_ram_info() */ 137 } 138 139 static int init_baud_rate(void) 140 { 141 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 142 return 0; 143 } 144 145 static int display_text_info(void) 146 { 147 #ifndef CONFIG_SANDBOX 148 ulong bss_start, bss_end, text_base; 149 150 bss_start = (ulong)&__bss_start; 151 bss_end = (ulong)&__bss_end; 152 153 #ifdef CONFIG_SYS_TEXT_BASE 154 text_base = CONFIG_SYS_TEXT_BASE; 155 #else 156 text_base = CONFIG_SYS_MONITOR_BASE; 157 #endif 158 159 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 160 text_base, bss_start, bss_end); 161 #endif 162 163 #ifdef CONFIG_MODEM_SUPPORT 164 debug("Modem Support enabled\n"); 165 #endif 166 #ifdef CONFIG_USE_IRQ 167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 169 #endif 170 171 return 0; 172 } 173 174 static int announce_dram_init(void) 175 { 176 puts("DRAM: "); 177 return 0; 178 } 179 180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 181 static int init_func_ram(void) 182 { 183 #ifdef CONFIG_BOARD_TYPES 184 int board_type = gd->board_type; 185 #else 186 int board_type = 0; /* use dummy arg */ 187 #endif 188 189 gd->ram_size = initdram(board_type); 190 191 if (gd->ram_size > 0) 192 return 0; 193 194 puts("*** failed ***\n"); 195 return 1; 196 } 197 #endif 198 199 static int show_dram_config(void) 200 { 201 unsigned long long size; 202 203 #ifdef CONFIG_NR_DRAM_BANKS 204 int i; 205 206 debug("\nRAM Configuration:\n"); 207 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 208 size += gd->bd->bi_dram[i].size; 209 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); 210 #ifdef DEBUG 211 print_size(gd->bd->bi_dram[i].size, "\n"); 212 #endif 213 } 214 debug("\nDRAM: "); 215 #else 216 size = gd->ram_size; 217 #endif 218 219 print_size(size, ""); 220 board_add_ram_info(0); 221 putc('\n'); 222 223 return 0; 224 } 225 226 __weak void dram_init_banksize(void) 227 { 228 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 229 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 230 gd->bd->bi_dram[0].size = get_effective_memsize(); 231 #endif 232 } 233 234 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 235 static int init_func_i2c(void) 236 { 237 puts("I2C: "); 238 #ifdef CONFIG_SYS_I2C 239 i2c_init_all(); 240 #else 241 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 242 #endif 243 puts("ready\n"); 244 return 0; 245 } 246 #endif 247 248 #if defined(CONFIG_HARD_SPI) 249 static int init_func_spi(void) 250 { 251 puts("SPI: "); 252 spi_init(); 253 puts("ready\n"); 254 return 0; 255 } 256 #endif 257 258 __maybe_unused 259 static int zero_global_data(void) 260 { 261 memset((void *)gd, '\0', sizeof(gd_t)); 262 263 return 0; 264 } 265 266 static int setup_mon_len(void) 267 { 268 #if defined(__ARM__) || defined(__MICROBLAZE__) 269 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 270 #elif defined(CONFIG_SANDBOX) 271 gd->mon_len = (ulong)&_end - (ulong)_init; 272 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 273 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 274 #else 275 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 276 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 277 #endif 278 return 0; 279 } 280 281 __weak int arch_cpu_init(void) 282 { 283 return 0; 284 } 285 286 #ifdef CONFIG_SANDBOX 287 static int setup_ram_buf(void) 288 { 289 struct sandbox_state *state = state_get_current(); 290 291 gd->arch.ram_buf = state->ram_buf; 292 gd->ram_size = state->ram_size; 293 294 return 0; 295 } 296 #endif 297 298 /* Get the top of usable RAM */ 299 __weak ulong board_get_usable_ram_top(ulong total_size) 300 { 301 #ifdef CONFIG_SYS_SDRAM_BASE 302 /* 303 * Detect whether we have so much RAM it goes past the end of our 304 * 32-bit address space. If so, clip the usable RAM so it doesn't. 305 */ 306 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 307 /* 308 * Will wrap back to top of 32-bit space when reservations 309 * are made. 310 */ 311 return 0; 312 #endif 313 return gd->ram_top; 314 } 315 316 static int setup_dest_addr(void) 317 { 318 debug("Monitor len: %08lX\n", gd->mon_len); 319 /* 320 * Ram is setup, size stored in gd !! 321 */ 322 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 323 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 324 /* 325 * Subtract specified amount of memory to hide so that it won't 326 * get "touched" at all by U-Boot. By fixing up gd->ram_size 327 * the Linux kernel should now get passed the now "corrected" 328 * memory size and won't touch it either. This should work 329 * for arch/ppc and arch/powerpc. Only Linux board ports in 330 * arch/powerpc with bootwrapper support, that recalculate the 331 * memory size from the SDRAM controller setup will have to 332 * get fixed. 333 */ 334 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 335 #endif 336 #ifdef CONFIG_SYS_SDRAM_BASE 337 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 338 #endif 339 gd->ram_top += get_effective_memsize(); 340 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 341 gd->relocaddr = gd->ram_top; 342 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 343 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 344 /* 345 * We need to make sure the location we intend to put secondary core 346 * boot code is reserved and not used by any part of u-boot 347 */ 348 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 349 gd->relocaddr = determine_mp_bootpg(NULL); 350 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 351 } 352 #endif 353 return 0; 354 } 355 356 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 357 static int reserve_logbuffer(void) 358 { 359 /* reserve kernel log buffer */ 360 gd->relocaddr -= LOGBUFF_RESERVE; 361 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 362 gd->relocaddr); 363 return 0; 364 } 365 #endif 366 367 #ifdef CONFIG_PRAM 368 /* reserve protected RAM */ 369 static int reserve_pram(void) 370 { 371 ulong reg; 372 373 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 374 gd->relocaddr -= (reg << 10); /* size is in kB */ 375 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 376 gd->relocaddr); 377 return 0; 378 } 379 #endif /* CONFIG_PRAM */ 380 381 /* Round memory pointer down to next 4 kB limit */ 382 static int reserve_round_4k(void) 383 { 384 gd->relocaddr &= ~(4096 - 1); 385 return 0; 386 } 387 388 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 389 defined(CONFIG_ARM) 390 static int reserve_mmu(void) 391 { 392 /* reserve TLB table */ 393 gd->arch.tlb_size = PGTABLE_SIZE; 394 gd->relocaddr -= gd->arch.tlb_size; 395 396 /* round down to next 64 kB limit */ 397 gd->relocaddr &= ~(0x10000 - 1); 398 399 gd->arch.tlb_addr = gd->relocaddr; 400 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 401 gd->arch.tlb_addr + gd->arch.tlb_size); 402 return 0; 403 } 404 #endif 405 406 #ifdef CONFIG_LCD 407 static int reserve_lcd(void) 408 { 409 #ifdef CONFIG_FB_ADDR 410 gd->fb_base = CONFIG_FB_ADDR; 411 #else 412 /* reserve memory for LCD display (always full pages) */ 413 gd->relocaddr = lcd_setmem(gd->relocaddr); 414 gd->fb_base = gd->relocaddr; 415 #endif /* CONFIG_FB_ADDR */ 416 return 0; 417 } 418 #endif /* CONFIG_LCD */ 419 420 static int reserve_trace(void) 421 { 422 #ifdef CONFIG_TRACE 423 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 424 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 425 debug("Reserving %dk for trace data at: %08lx\n", 426 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 427 #endif 428 429 return 0; 430 } 431 432 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 433 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 434 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) 435 static int reserve_video(void) 436 { 437 /* reserve memory for video display (always full pages) */ 438 gd->relocaddr = video_setmem(gd->relocaddr); 439 gd->fb_base = gd->relocaddr; 440 441 return 0; 442 } 443 #endif 444 445 static int reserve_uboot(void) 446 { 447 /* 448 * reserve memory for U-Boot code, data & bss 449 * round down to next 4 kB limit 450 */ 451 gd->relocaddr -= gd->mon_len; 452 gd->relocaddr &= ~(4096 - 1); 453 #ifdef CONFIG_E500 454 /* round down to next 64 kB limit so that IVPR stays aligned */ 455 gd->relocaddr &= ~(65536 - 1); 456 #endif 457 458 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 459 gd->relocaddr); 460 461 gd->start_addr_sp = gd->relocaddr; 462 463 return 0; 464 } 465 466 #ifndef CONFIG_SPL_BUILD 467 /* reserve memory for malloc() area */ 468 static int reserve_malloc(void) 469 { 470 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 471 debug("Reserving %dk for malloc() at: %08lx\n", 472 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 473 return 0; 474 } 475 476 /* (permanently) allocate a Board Info struct */ 477 static int reserve_board(void) 478 { 479 if (!gd->bd) { 480 gd->start_addr_sp -= sizeof(bd_t); 481 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 482 memset(gd->bd, '\0', sizeof(bd_t)); 483 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 484 sizeof(bd_t), gd->start_addr_sp); 485 } 486 return 0; 487 } 488 #endif 489 490 static int setup_machine(void) 491 { 492 #ifdef CONFIG_MACH_TYPE 493 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 494 #endif 495 return 0; 496 } 497 498 static int reserve_global_data(void) 499 { 500 gd->start_addr_sp -= sizeof(gd_t); 501 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 502 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 503 sizeof(gd_t), gd->start_addr_sp); 504 return 0; 505 } 506 507 static int reserve_fdt(void) 508 { 509 /* 510 * If the device tree is sitting immediate above our image then we 511 * must relocate it. If it is embedded in the data section, then it 512 * will be relocated with other data. 513 */ 514 if (gd->fdt_blob) { 515 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 516 517 gd->start_addr_sp -= gd->fdt_size; 518 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 519 debug("Reserving %lu Bytes for FDT at: %08lx\n", 520 gd->fdt_size, gd->start_addr_sp); 521 } 522 523 return 0; 524 } 525 526 int arch_reserve_stacks(void) 527 { 528 return 0; 529 } 530 531 static int reserve_stacks(void) 532 { 533 /* make stack pointer 16-byte aligned */ 534 gd->start_addr_sp -= 16; 535 gd->start_addr_sp &= ~0xf; 536 537 /* 538 * let the architecture specific code tailor gd->start_addr_sp and 539 * gd->irq_sp 540 */ 541 return arch_reserve_stacks(); 542 } 543 544 static int display_new_sp(void) 545 { 546 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 547 548 return 0; 549 } 550 551 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 552 static int setup_board_part1(void) 553 { 554 bd_t *bd = gd->bd; 555 556 /* 557 * Save local variables to board info struct 558 */ 559 560 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 561 bd->bi_memsize = gd->ram_size; /* size in bytes */ 562 563 #ifdef CONFIG_SYS_SRAM_BASE 564 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 565 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 566 #endif 567 568 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 569 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 570 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 571 #endif 572 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 573 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 574 #endif 575 #if defined(CONFIG_MPC83xx) 576 bd->bi_immrbar = CONFIG_SYS_IMMR; 577 #endif 578 579 return 0; 580 } 581 582 static int setup_board_part2(void) 583 { 584 bd_t *bd = gd->bd; 585 586 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 587 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 588 #if defined(CONFIG_CPM2) 589 bd->bi_cpmfreq = gd->arch.cpm_clk; 590 bd->bi_brgfreq = gd->arch.brg_clk; 591 bd->bi_sccfreq = gd->arch.scc_clk; 592 bd->bi_vco = gd->arch.vco_out; 593 #endif /* CONFIG_CPM2 */ 594 #if defined(CONFIG_MPC512X) 595 bd->bi_ipsfreq = gd->arch.ips_clk; 596 #endif /* CONFIG_MPC512X */ 597 #if defined(CONFIG_MPC5xxx) 598 bd->bi_ipbfreq = gd->arch.ipb_clk; 599 bd->bi_pcifreq = gd->pci_clk; 600 #endif /* CONFIG_MPC5xxx */ 601 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 602 bd->bi_pcifreq = gd->pci_clk; 603 #endif 604 #if defined(CONFIG_EXTRA_CLOCK) 605 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 606 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 607 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 608 #endif 609 610 return 0; 611 } 612 #endif 613 614 #ifdef CONFIG_SYS_EXTBDINFO 615 static int setup_board_extra(void) 616 { 617 bd_t *bd = gd->bd; 618 619 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 620 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 621 sizeof(bd->bi_r_version)); 622 623 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 624 bd->bi_plb_busfreq = gd->bus_clk; 625 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 626 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 627 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 628 bd->bi_pci_busfreq = get_PCI_freq(); 629 bd->bi_opbfreq = get_OPB_freq(); 630 #elif defined(CONFIG_XILINX_405) 631 bd->bi_pci_busfreq = get_PCI_freq(); 632 #endif 633 634 return 0; 635 } 636 #endif 637 638 #ifdef CONFIG_POST 639 static int init_post(void) 640 { 641 post_bootmode_init(); 642 post_run(NULL, POST_ROM | post_bootmode_get(0)); 643 644 return 0; 645 } 646 #endif 647 648 static int setup_dram_config(void) 649 { 650 /* Ram is board specific, so move it to board code ... */ 651 dram_init_banksize(); 652 653 return 0; 654 } 655 656 static int reloc_fdt(void) 657 { 658 if (gd->new_fdt) { 659 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 660 gd->fdt_blob = gd->new_fdt; 661 } 662 663 return 0; 664 } 665 666 static int setup_reloc(void) 667 { 668 #ifdef CONFIG_SYS_TEXT_BASE 669 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 670 #ifdef CONFIG_M68K 671 /* 672 * On all ColdFire arch cpu, monitor code starts always 673 * just after the default vector table location, so at 0x400 674 */ 675 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 676 #endif 677 #endif 678 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 679 680 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 681 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 682 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 683 gd->start_addr_sp); 684 685 return 0; 686 } 687 688 /* ARM calls relocate_code from its crt0.S */ 689 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 690 691 static int jump_to_copy(void) 692 { 693 /* 694 * x86 is special, but in a nice way. It uses a trampoline which 695 * enables the dcache if possible. 696 * 697 * For now, other archs use relocate_code(), which is implemented 698 * similarly for all archs. When we do generic relocation, hopefully 699 * we can make all archs enable the dcache prior to relocation. 700 */ 701 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 702 /* 703 * SDRAM and console are now initialised. The final stack can now 704 * be setup in SDRAM. Code execution will continue in Flash, but 705 * with the stack in SDRAM and Global Data in temporary memory 706 * (CPU cache) 707 */ 708 board_init_f_r_trampoline(gd->start_addr_sp); 709 #else 710 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 711 #endif 712 713 return 0; 714 } 715 #endif 716 717 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 718 static int mark_bootstage(void) 719 { 720 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 721 722 return 0; 723 } 724 725 static int initf_dm(void) 726 { 727 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 728 int ret; 729 730 ret = dm_init_and_scan(true); 731 if (ret) 732 return ret; 733 #endif 734 735 return 0; 736 } 737 738 /* Architecture-specific memory reservation */ 739 __weak int reserve_arch(void) 740 { 741 return 0; 742 } 743 744 __weak int arch_cpu_init_dm(void) 745 { 746 return 0; 747 } 748 749 static init_fnc_t init_sequence_f[] = { 750 #ifdef CONFIG_SANDBOX 751 setup_ram_buf, 752 #endif 753 setup_mon_len, 754 #ifdef CONFIG_OF_CONTROL 755 fdtdec_setup, 756 #endif 757 #ifdef CONFIG_TRACE 758 trace_early_init, 759 #endif 760 initf_malloc, 761 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 762 /* TODO: can this go into arch_cpu_init()? */ 763 probecpu, 764 #endif 765 arch_cpu_init, /* basic arch cpu dependent setup */ 766 mark_bootstage, 767 initf_dm, 768 arch_cpu_init_dm, 769 #if defined(CONFIG_BOARD_EARLY_INIT_F) 770 board_early_init_f, 771 #endif 772 /* TODO: can any of this go into arch_cpu_init()? */ 773 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 774 get_clocks, /* get CPU and bus clocks (etc.) */ 775 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 776 && !defined(CONFIG_TQM885D) 777 adjust_sdram_tbs_8xx, 778 #endif 779 /* TODO: can we rename this to timer_init()? */ 780 init_timebase, 781 #endif 782 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN) 783 timer_init, /* initialize timer */ 784 #endif 785 #ifdef CONFIG_SYS_ALLOC_DPRAM 786 #if !defined(CONFIG_CPM2) 787 dpram_init, 788 #endif 789 #endif 790 #if defined(CONFIG_BOARD_POSTCLK_INIT) 791 board_postclk_init, 792 #endif 793 #ifdef CONFIG_FSL_ESDHC 794 get_clocks, 795 #endif 796 #ifdef CONFIG_M68K 797 get_clocks, 798 #endif 799 env_init, /* initialize environment */ 800 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 801 /* get CPU and bus clocks according to the environment variable */ 802 get_clocks_866, 803 /* adjust sdram refresh rate according to the new clock */ 804 sdram_adjust_866, 805 init_timebase, 806 #endif 807 init_baud_rate, /* initialze baudrate settings */ 808 serial_init, /* serial communications setup */ 809 console_init_f, /* stage 1 init of console */ 810 #ifdef CONFIG_SANDBOX 811 sandbox_early_getopt_check, 812 #endif 813 #ifdef CONFIG_OF_CONTROL 814 fdtdec_prepare_fdt, 815 #endif 816 display_options, /* say that we are here */ 817 display_text_info, /* show debugging info if required */ 818 #if defined(CONFIG_MPC8260) 819 prt_8260_rsr, 820 prt_8260_clks, 821 #endif /* CONFIG_MPC8260 */ 822 #if defined(CONFIG_MPC83xx) 823 prt_83xx_rsr, 824 #endif 825 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 826 checkcpu, 827 #endif 828 print_cpuinfo, /* display cpu info (and speed) */ 829 #if defined(CONFIG_MPC5xxx) 830 prt_mpc5xxx_clks, 831 #endif /* CONFIG_MPC5xxx */ 832 #if defined(CONFIG_DISPLAY_BOARDINFO) 833 show_board_info, 834 #endif 835 INIT_FUNC_WATCHDOG_INIT 836 #if defined(CONFIG_MISC_INIT_F) 837 misc_init_f, 838 #endif 839 INIT_FUNC_WATCHDOG_RESET 840 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 841 init_func_i2c, 842 #endif 843 #if defined(CONFIG_HARD_SPI) 844 init_func_spi, 845 #endif 846 announce_dram_init, 847 /* TODO: unify all these dram functions? */ 848 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) 849 dram_init, /* configure available RAM banks */ 850 #endif 851 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 852 init_func_ram, 853 #endif 854 #ifdef CONFIG_POST 855 post_init_f, 856 #endif 857 INIT_FUNC_WATCHDOG_RESET 858 #if defined(CONFIG_SYS_DRAM_TEST) 859 testdram, 860 #endif /* CONFIG_SYS_DRAM_TEST */ 861 INIT_FUNC_WATCHDOG_RESET 862 863 #ifdef CONFIG_POST 864 init_post, 865 #endif 866 INIT_FUNC_WATCHDOG_RESET 867 /* 868 * Now that we have DRAM mapped and working, we can 869 * relocate the code and continue running from DRAM. 870 * 871 * Reserve memory at end of RAM for (top down in that order): 872 * - area that won't get touched by U-Boot and Linux (optional) 873 * - kernel log buffer 874 * - protected RAM 875 * - LCD framebuffer 876 * - monitor code 877 * - board info struct 878 */ 879 setup_dest_addr, 880 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 881 /* Blackfin u-boot monitor should be on top of the ram */ 882 reserve_uboot, 883 #endif 884 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 885 reserve_logbuffer, 886 #endif 887 #ifdef CONFIG_PRAM 888 reserve_pram, 889 #endif 890 reserve_round_4k, 891 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 892 defined(CONFIG_ARM) 893 reserve_mmu, 894 #endif 895 #ifdef CONFIG_LCD 896 reserve_lcd, 897 #endif 898 reserve_trace, 899 /* TODO: Why the dependency on CONFIG_8xx? */ 900 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 901 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 902 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K) 903 reserve_video, 904 #endif 905 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2) 906 reserve_uboot, 907 #endif 908 #ifndef CONFIG_SPL_BUILD 909 reserve_malloc, 910 reserve_board, 911 #endif 912 setup_machine, 913 reserve_global_data, 914 reserve_fdt, 915 reserve_arch, 916 reserve_stacks, 917 setup_dram_config, 918 show_dram_config, 919 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 920 setup_board_part1, 921 INIT_FUNC_WATCHDOG_RESET 922 setup_board_part2, 923 #endif 924 display_new_sp, 925 #ifdef CONFIG_SYS_EXTBDINFO 926 setup_board_extra, 927 #endif 928 INIT_FUNC_WATCHDOG_RESET 929 reloc_fdt, 930 setup_reloc, 931 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 932 copy_uboot_to_ram, 933 clear_bss, 934 do_elf_reloc_fixups, 935 #endif 936 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 937 jump_to_copy, 938 #endif 939 NULL, 940 }; 941 942 void board_init_f(ulong boot_flags) 943 { 944 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 945 /* 946 * For some archtectures, global data is initialized and used before 947 * calling this function. The data should be preserved. For others, 948 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 949 * here to host global data until relocation. 950 */ 951 gd_t data; 952 953 gd = &data; 954 955 /* 956 * Clear global data before it is accessed at debug print 957 * in initcall_run_list. Otherwise the debug print probably 958 * get the wrong vaule of gd->have_console. 959 */ 960 zero_global_data(); 961 #endif 962 963 gd->flags = boot_flags; 964 gd->have_console = 0; 965 966 if (initcall_run_list(init_sequence_f)) 967 hang(); 968 969 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 970 /* NOTREACHED - jump_to_copy() does not return */ 971 hang(); 972 #endif 973 } 974 975 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 976 /* 977 * For now this code is only used on x86. 978 * 979 * init_sequence_f_r is the list of init functions which are run when 980 * U-Boot is executing from Flash with a semi-limited 'C' environment. 981 * The following limitations must be considered when implementing an 982 * '_f_r' function: 983 * - 'static' variables are read-only 984 * - Global Data (gd->xxx) is read/write 985 * 986 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 987 * supported). It _should_, if possible, copy global data to RAM and 988 * initialise the CPU caches (to speed up the relocation process) 989 * 990 * NOTE: At present only x86 uses this route, but it is intended that 991 * all archs will move to this when generic relocation is implemented. 992 */ 993 static init_fnc_t init_sequence_f_r[] = { 994 init_cache_f_r, 995 996 NULL, 997 }; 998 999 void board_init_f_r(void) 1000 { 1001 if (initcall_run_list(init_sequence_f_r)) 1002 hang(); 1003 1004 /* 1005 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1006 * Transfer execution from Flash to RAM by calculating the address 1007 * of the in-RAM copy of board_init_r() and calling it 1008 */ 1009 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 1010 1011 /* NOTREACHED - board_init_r() does not return */ 1012 hang(); 1013 } 1014 #endif /* CONFIG_X86 */ 1015 1016 #ifndef CONFIG_X86 1017 ulong board_init_f_mem(ulong top) 1018 { 1019 /* Leave space for the stack we are running with now */ 1020 top -= 0x40; 1021 1022 top -= sizeof(struct global_data); 1023 top = ALIGN(top, 16); 1024 gd = (struct global_data *)top; 1025 memset((void *)gd, '\0', sizeof(*gd)); 1026 1027 #ifdef CONFIG_SYS_MALLOC_F_LEN 1028 top -= CONFIG_SYS_MALLOC_F_LEN; 1029 gd->malloc_base = top; 1030 #endif 1031 1032 return top; 1033 } 1034 #endif /* !CONFIG_X86 */ 1035