1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2011 The Chromium OS Authors. 4 * (C) Copyright 2002-2006 5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 6 * 7 * (C) Copyright 2002 8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 9 * Marius Groeger <mgroeger@sysgo.de> 10 */ 11 12 #include <common.h> 13 #include <console.h> 14 #include <environment.h> 15 #include <dm.h> 16 #include <fdtdec.h> 17 #include <fs.h> 18 #include <i2c.h> 19 #include <initcall.h> 20 #include <malloc.h> 21 #include <mapmem.h> 22 #include <os.h> 23 #include <post.h> 24 #include <relocate.h> 25 #include <spi.h> 26 #include <status_led.h> 27 #include <sysreset.h> 28 #include <timer.h> 29 #include <trace.h> 30 #include <video.h> 31 #include <watchdog.h> 32 #ifdef CONFIG_MACH_TYPE 33 #include <asm/mach-types.h> 34 #endif 35 #if defined(CONFIG_MP) && defined(CONFIG_PPC) 36 #include <asm/mp.h> 37 #endif 38 #include <asm/io.h> 39 #include <asm/sections.h> 40 #include <dm/root.h> 41 #include <linux/errno.h> 42 43 /* 44 * Pointer to initial global data area 45 * 46 * Here we initialize it if needed. 47 */ 48 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 49 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 50 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 51 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR); 52 #else 53 DECLARE_GLOBAL_DATA_PTR; 54 #endif 55 56 /* 57 * TODO(sjg@chromium.org): IMO this code should be 58 * refactored to a single function, something like: 59 * 60 * void led_set_state(enum led_colour_t colour, int on); 61 */ 62 /************************************************************************ 63 * Coloured LED functionality 64 ************************************************************************ 65 * May be supplied by boards if desired 66 */ 67 __weak void coloured_LED_init(void) {} 68 __weak void red_led_on(void) {} 69 __weak void red_led_off(void) {} 70 __weak void green_led_on(void) {} 71 __weak void green_led_off(void) {} 72 __weak void yellow_led_on(void) {} 73 __weak void yellow_led_off(void) {} 74 __weak void blue_led_on(void) {} 75 __weak void blue_led_off(void) {} 76 77 /* 78 * Why is gd allocated a register? Prior to reloc it might be better to 79 * just pass it around to each function in this file? 80 * 81 * After reloc one could argue that it is hardly used and doesn't need 82 * to be in a register. Or if it is it should perhaps hold pointers to all 83 * global data for all modules, so that post-reloc we can avoid the massive 84 * literal pool we get on ARM. Or perhaps just encourage each module to use 85 * a structure... 86 */ 87 88 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 89 static int init_func_watchdog_init(void) 90 { 91 # if defined(CONFIG_HW_WATCHDOG) && \ 92 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 93 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 94 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 95 defined(CONFIG_IMX_WATCHDOG)) 96 hw_watchdog_init(); 97 puts(" Watchdog enabled\n"); 98 # endif 99 WATCHDOG_RESET(); 100 101 return 0; 102 } 103 104 int init_func_watchdog_reset(void) 105 { 106 WATCHDOG_RESET(); 107 108 return 0; 109 } 110 #endif /* CONFIG_WATCHDOG */ 111 112 __weak void board_add_ram_info(int use_default) 113 { 114 /* please define platform specific board_add_ram_info() */ 115 } 116 117 static int init_baud_rate(void) 118 { 119 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE); 120 return 0; 121 } 122 123 static int display_text_info(void) 124 { 125 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 126 ulong bss_start, bss_end, text_base; 127 128 bss_start = (ulong)&__bss_start; 129 bss_end = (ulong)&__bss_end; 130 131 #ifdef CONFIG_SYS_TEXT_BASE 132 text_base = CONFIG_SYS_TEXT_BASE; 133 #else 134 text_base = CONFIG_SYS_MONITOR_BASE; 135 #endif 136 137 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 138 text_base, bss_start, bss_end); 139 #endif 140 141 return 0; 142 } 143 144 #ifdef CONFIG_SYSRESET 145 static int print_resetinfo(void) 146 { 147 struct udevice *dev; 148 char status[256]; 149 int ret; 150 151 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev); 152 if (ret) { 153 debug("%s: No sysreset device found (error: %d)\n", 154 __func__, ret); 155 /* Not all boards have sysreset drivers available during early 156 * boot, so don't fail if one can't be found. 157 */ 158 return 0; 159 } 160 161 if (!sysreset_get_status(dev, status, sizeof(status))) 162 printf("%s", status); 163 164 return 0; 165 } 166 #endif 167 168 static int announce_dram_init(void) 169 { 170 puts("DRAM: "); 171 return 0; 172 } 173 174 static int show_dram_config(void) 175 { 176 unsigned long long size; 177 178 #ifdef CONFIG_NR_DRAM_BANKS 179 int i; 180 181 debug("\nRAM Configuration:\n"); 182 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 183 size += gd->bd->bi_dram[i].size; 184 debug("Bank #%d: %llx ", i, 185 (unsigned long long)(gd->bd->bi_dram[i].start)); 186 #ifdef DEBUG 187 print_size(gd->bd->bi_dram[i].size, "\n"); 188 #endif 189 } 190 debug("\nDRAM: "); 191 #else 192 size = gd->ram_size; 193 #endif 194 195 print_size(size, ""); 196 board_add_ram_info(0); 197 putc('\n'); 198 199 return 0; 200 } 201 202 __weak int dram_init_banksize(void) 203 { 204 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 205 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 206 gd->bd->bi_dram[0].size = get_effective_memsize(); 207 #endif 208 209 return 0; 210 } 211 212 #if defined(CONFIG_SYS_I2C) 213 static int init_func_i2c(void) 214 { 215 puts("I2C: "); 216 #ifdef CONFIG_SYS_I2C 217 i2c_init_all(); 218 #else 219 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 220 #endif 221 puts("ready\n"); 222 return 0; 223 } 224 #endif 225 226 #if defined(CONFIG_VID) 227 __weak int init_func_vid(void) 228 { 229 return 0; 230 } 231 #endif 232 233 #if defined(CONFIG_HARD_SPI) 234 static int init_func_spi(void) 235 { 236 puts("SPI: "); 237 spi_init(); 238 puts("ready\n"); 239 return 0; 240 } 241 #endif 242 243 static int setup_mon_len(void) 244 { 245 #if defined(__ARM__) || defined(__MICROBLAZE__) 246 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 247 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 248 gd->mon_len = (ulong)&_end - (ulong)_init; 249 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 250 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 251 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV) 252 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 253 #elif defined(CONFIG_SYS_MONITOR_BASE) 254 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 255 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 256 #endif 257 return 0; 258 } 259 260 __weak int arch_cpu_init(void) 261 { 262 return 0; 263 } 264 265 __weak int mach_cpu_init(void) 266 { 267 return 0; 268 } 269 270 /* Get the top of usable RAM */ 271 __weak ulong board_get_usable_ram_top(ulong total_size) 272 { 273 #ifdef CONFIG_SYS_SDRAM_BASE 274 /* 275 * Detect whether we have so much RAM that it goes past the end of our 276 * 32-bit address space. If so, clip the usable RAM so it doesn't. 277 */ 278 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 279 /* 280 * Will wrap back to top of 32-bit space when reservations 281 * are made. 282 */ 283 return 0; 284 #endif 285 return gd->ram_top; 286 } 287 288 static int setup_dest_addr(void) 289 { 290 debug("Monitor len: %08lX\n", gd->mon_len); 291 /* 292 * Ram is setup, size stored in gd !! 293 */ 294 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 295 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 296 /* 297 * Subtract specified amount of memory to hide so that it won't 298 * get "touched" at all by U-Boot. By fixing up gd->ram_size 299 * the Linux kernel should now get passed the now "corrected" 300 * memory size and won't touch it either. This should work 301 * for arch/ppc and arch/powerpc. Only Linux board ports in 302 * arch/powerpc with bootwrapper support, that recalculate the 303 * memory size from the SDRAM controller setup will have to 304 * get fixed. 305 */ 306 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 307 #endif 308 #ifdef CONFIG_SYS_SDRAM_BASE 309 gd->ram_base = CONFIG_SYS_SDRAM_BASE; 310 #endif 311 gd->ram_top = gd->ram_base + get_effective_memsize(); 312 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 313 gd->relocaddr = gd->ram_top; 314 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 315 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 316 /* 317 * We need to make sure the location we intend to put secondary core 318 * boot code is reserved and not used by any part of u-boot 319 */ 320 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 321 gd->relocaddr = determine_mp_bootpg(NULL); 322 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 323 } 324 #endif 325 return 0; 326 } 327 328 #ifdef CONFIG_PRAM 329 /* reserve protected RAM */ 330 static int reserve_pram(void) 331 { 332 ulong reg; 333 334 reg = env_get_ulong("pram", 10, CONFIG_PRAM); 335 gd->relocaddr -= (reg << 10); /* size is in kB */ 336 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 337 gd->relocaddr); 338 return 0; 339 } 340 #endif /* CONFIG_PRAM */ 341 342 /* Round memory pointer down to next 4 kB limit */ 343 static int reserve_round_4k(void) 344 { 345 gd->relocaddr &= ~(4096 - 1); 346 return 0; 347 } 348 349 #ifdef CONFIG_ARM 350 __weak int reserve_mmu(void) 351 { 352 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 353 /* reserve TLB table */ 354 gd->arch.tlb_size = PGTABLE_SIZE; 355 gd->relocaddr -= gd->arch.tlb_size; 356 357 /* round down to next 64 kB limit */ 358 gd->relocaddr &= ~(0x10000 - 1); 359 360 gd->arch.tlb_addr = gd->relocaddr; 361 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 362 gd->arch.tlb_addr + gd->arch.tlb_size); 363 364 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 365 /* 366 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 367 * with location within secure ram. 368 */ 369 gd->arch.tlb_allocated = gd->arch.tlb_addr; 370 #endif 371 #endif 372 373 return 0; 374 } 375 #endif 376 377 static int reserve_video(void) 378 { 379 #ifdef CONFIG_DM_VIDEO 380 ulong addr; 381 int ret; 382 383 addr = gd->relocaddr; 384 ret = video_reserve(&addr); 385 if (ret) 386 return ret; 387 gd->relocaddr = addr; 388 #elif defined(CONFIG_LCD) 389 # ifdef CONFIG_FB_ADDR 390 gd->fb_base = CONFIG_FB_ADDR; 391 # else 392 /* reserve memory for LCD display (always full pages) */ 393 gd->relocaddr = lcd_setmem(gd->relocaddr); 394 gd->fb_base = gd->relocaddr; 395 # endif /* CONFIG_FB_ADDR */ 396 #elif defined(CONFIG_VIDEO) && \ 397 (!defined(CONFIG_PPC)) && \ 398 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 399 !defined(CONFIG_M68K) 400 /* reserve memory for video display (always full pages) */ 401 gd->relocaddr = video_setmem(gd->relocaddr); 402 gd->fb_base = gd->relocaddr; 403 #endif 404 405 return 0; 406 } 407 408 static int reserve_trace(void) 409 { 410 #ifdef CONFIG_TRACE 411 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 412 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 413 debug("Reserving %dk for trace data at: %08lx\n", 414 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 415 #endif 416 417 return 0; 418 } 419 420 static int reserve_uboot(void) 421 { 422 if (!(gd->flags & GD_FLG_SKIP_RELOC)) { 423 /* 424 * reserve memory for U-Boot code, data & bss 425 * round down to next 4 kB limit 426 */ 427 gd->relocaddr -= gd->mon_len; 428 gd->relocaddr &= ~(4096 - 1); 429 #if defined(CONFIG_E500) || defined(CONFIG_MIPS) 430 /* round down to next 64 kB limit so that IVPR stays aligned */ 431 gd->relocaddr &= ~(65536 - 1); 432 #endif 433 434 debug("Reserving %ldk for U-Boot at: %08lx\n", 435 gd->mon_len >> 10, gd->relocaddr); 436 } 437 438 gd->start_addr_sp = gd->relocaddr; 439 440 return 0; 441 } 442 443 /* reserve memory for malloc() area */ 444 static int reserve_malloc(void) 445 { 446 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 447 debug("Reserving %dk for malloc() at: %08lx\n", 448 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 449 return 0; 450 } 451 452 /* (permanently) allocate a Board Info struct */ 453 static int reserve_board(void) 454 { 455 if (!gd->bd) { 456 gd->start_addr_sp -= sizeof(bd_t); 457 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 458 memset(gd->bd, '\0', sizeof(bd_t)); 459 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 460 sizeof(bd_t), gd->start_addr_sp); 461 } 462 return 0; 463 } 464 465 static int setup_machine(void) 466 { 467 #ifdef CONFIG_MACH_TYPE 468 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 469 #endif 470 return 0; 471 } 472 473 static int reserve_global_data(void) 474 { 475 gd->start_addr_sp -= sizeof(gd_t); 476 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 477 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 478 sizeof(gd_t), gd->start_addr_sp); 479 return 0; 480 } 481 482 static int reserve_fdt(void) 483 { 484 #ifndef CONFIG_OF_EMBED 485 /* 486 * If the device tree is sitting immediately above our image then we 487 * must relocate it. If it is embedded in the data section, then it 488 * will be relocated with other data. 489 */ 490 if (gd->fdt_blob) { 491 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 492 493 gd->start_addr_sp -= gd->fdt_size; 494 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 495 debug("Reserving %lu Bytes for FDT at: %08lx\n", 496 gd->fdt_size, gd->start_addr_sp); 497 } 498 #endif 499 500 return 0; 501 } 502 503 static int reserve_bootstage(void) 504 { 505 #ifdef CONFIG_BOOTSTAGE 506 int size = bootstage_get_size(); 507 508 gd->start_addr_sp -= size; 509 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size); 510 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size, 511 gd->start_addr_sp); 512 #endif 513 514 return 0; 515 } 516 517 __weak int arch_reserve_stacks(void) 518 { 519 return 0; 520 } 521 522 static int reserve_stacks(void) 523 { 524 /* make stack pointer 16-byte aligned */ 525 gd->start_addr_sp -= 16; 526 gd->start_addr_sp &= ~0xf; 527 528 /* 529 * let the architecture-specific code tailor gd->start_addr_sp and 530 * gd->irq_sp 531 */ 532 return arch_reserve_stacks(); 533 } 534 535 static int display_new_sp(void) 536 { 537 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 538 539 return 0; 540 } 541 542 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 543 defined(CONFIG_SH) 544 static int setup_board_part1(void) 545 { 546 bd_t *bd = gd->bd; 547 548 /* 549 * Save local variables to board info struct 550 */ 551 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 552 bd->bi_memsize = gd->ram_size; /* size in bytes */ 553 554 #ifdef CONFIG_SYS_SRAM_BASE 555 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 556 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 557 #endif 558 559 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 560 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 561 #endif 562 #if defined(CONFIG_M68K) 563 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 564 #endif 565 #if defined(CONFIG_MPC83xx) 566 bd->bi_immrbar = CONFIG_SYS_IMMR; 567 #endif 568 569 return 0; 570 } 571 #endif 572 573 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 574 static int setup_board_part2(void) 575 { 576 bd_t *bd = gd->bd; 577 578 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 579 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 580 #if defined(CONFIG_CPM2) 581 bd->bi_cpmfreq = gd->arch.cpm_clk; 582 bd->bi_brgfreq = gd->arch.brg_clk; 583 bd->bi_sccfreq = gd->arch.scc_clk; 584 bd->bi_vco = gd->arch.vco_out; 585 #endif /* CONFIG_CPM2 */ 586 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 587 bd->bi_pcifreq = gd->pci_clk; 588 #endif 589 #if defined(CONFIG_EXTRA_CLOCK) 590 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 591 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 592 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 593 #endif 594 595 return 0; 596 } 597 #endif 598 599 #ifdef CONFIG_POST 600 static int init_post(void) 601 { 602 post_bootmode_init(); 603 post_run(NULL, POST_ROM | post_bootmode_get(0)); 604 605 return 0; 606 } 607 #endif 608 609 static int reloc_fdt(void) 610 { 611 #ifndef CONFIG_OF_EMBED 612 if (gd->flags & GD_FLG_SKIP_RELOC) 613 return 0; 614 if (gd->new_fdt) { 615 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 616 gd->fdt_blob = gd->new_fdt; 617 } 618 #endif 619 620 return 0; 621 } 622 623 static int reloc_bootstage(void) 624 { 625 #ifdef CONFIG_BOOTSTAGE 626 if (gd->flags & GD_FLG_SKIP_RELOC) 627 return 0; 628 if (gd->new_bootstage) { 629 int size = bootstage_get_size(); 630 631 debug("Copying bootstage from %p to %p, size %x\n", 632 gd->bootstage, gd->new_bootstage, size); 633 memcpy(gd->new_bootstage, gd->bootstage, size); 634 gd->bootstage = gd->new_bootstage; 635 } 636 #endif 637 638 return 0; 639 } 640 641 static int setup_reloc(void) 642 { 643 if (gd->flags & GD_FLG_SKIP_RELOC) { 644 debug("Skipping relocation due to flag\n"); 645 return 0; 646 } 647 648 #ifdef CONFIG_SYS_TEXT_BASE 649 #ifdef ARM 650 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start; 651 #elif defined(CONFIG_M68K) 652 /* 653 * On all ColdFire arch cpu, monitor code starts always 654 * just after the default vector table location, so at 0x400 655 */ 656 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 657 #else 658 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 659 #endif 660 #endif 661 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 662 663 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 664 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 665 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 666 gd->start_addr_sp); 667 668 return 0; 669 } 670 671 #ifdef CONFIG_OF_BOARD_FIXUP 672 static int fix_fdt(void) 673 { 674 return board_fix_fdt((void *)gd->fdt_blob); 675 } 676 #endif 677 678 /* ARM calls relocate_code from its crt0.S */ 679 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 680 !CONFIG_IS_ENABLED(X86_64) 681 682 static int jump_to_copy(void) 683 { 684 if (gd->flags & GD_FLG_SKIP_RELOC) 685 return 0; 686 /* 687 * x86 is special, but in a nice way. It uses a trampoline which 688 * enables the dcache if possible. 689 * 690 * For now, other archs use relocate_code(), which is implemented 691 * similarly for all archs. When we do generic relocation, hopefully 692 * we can make all archs enable the dcache prior to relocation. 693 */ 694 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 695 /* 696 * SDRAM and console are now initialised. The final stack can now 697 * be setup in SDRAM. Code execution will continue in Flash, but 698 * with the stack in SDRAM and Global Data in temporary memory 699 * (CPU cache) 700 */ 701 arch_setup_gd(gd->new_gd); 702 board_init_f_r_trampoline(gd->start_addr_sp); 703 #else 704 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 705 #endif 706 707 return 0; 708 } 709 #endif 710 711 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 712 static int initf_bootstage(void) 713 { 714 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) && 715 IS_ENABLED(CONFIG_BOOTSTAGE_STASH); 716 int ret; 717 718 ret = bootstage_init(!from_spl); 719 if (ret) 720 return ret; 721 if (from_spl) { 722 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR, 723 CONFIG_BOOTSTAGE_STASH_SIZE); 724 725 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE); 726 if (ret && ret != -ENOENT) { 727 debug("Failed to unstash bootstage: err=%d\n", ret); 728 return ret; 729 } 730 } 731 732 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 733 734 return 0; 735 } 736 737 static int initf_console_record(void) 738 { 739 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN) 740 return console_record_init(); 741 #else 742 return 0; 743 #endif 744 } 745 746 static int initf_dm(void) 747 { 748 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN) 749 int ret; 750 751 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f"); 752 ret = dm_init_and_scan(true); 753 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F); 754 if (ret) 755 return ret; 756 #endif 757 #ifdef CONFIG_TIMER_EARLY 758 ret = dm_timer_init(); 759 if (ret) 760 return ret; 761 #endif 762 763 return 0; 764 } 765 766 /* Architecture-specific memory reservation */ 767 __weak int reserve_arch(void) 768 { 769 return 0; 770 } 771 772 __weak int arch_cpu_init_dm(void) 773 { 774 return 0; 775 } 776 777 static const init_fnc_t init_sequence_f[] = { 778 setup_mon_len, 779 #ifdef CONFIG_OF_CONTROL 780 fdtdec_setup, 781 #endif 782 #ifdef CONFIG_TRACE 783 trace_early_init, 784 #endif 785 initf_malloc, 786 log_init, 787 initf_bootstage, /* uses its own timer, so does not need DM */ 788 initf_console_record, 789 #if defined(CONFIG_HAVE_FSP) 790 arch_fsp_init, 791 #endif 792 arch_cpu_init, /* basic arch cpu dependent setup */ 793 mach_cpu_init, /* SoC/machine dependent CPU setup */ 794 initf_dm, 795 arch_cpu_init_dm, 796 #if defined(CONFIG_BOARD_EARLY_INIT_F) 797 board_early_init_f, 798 #endif 799 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 800 /* get CPU and bus clocks according to the environment variable */ 801 get_clocks, /* get CPU and bus clocks (etc.) */ 802 #endif 803 #if !defined(CONFIG_M68K) 804 timer_init, /* initialize timer */ 805 #endif 806 #if defined(CONFIG_BOARD_POSTCLK_INIT) 807 board_postclk_init, 808 #endif 809 env_init, /* initialize environment */ 810 init_baud_rate, /* initialze baudrate settings */ 811 serial_init, /* serial communications setup */ 812 console_init_f, /* stage 1 init of console */ 813 display_options, /* say that we are here */ 814 display_text_info, /* show debugging info if required */ 815 #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86) 816 checkcpu, 817 #endif 818 #if defined(CONFIG_SYSRESET) 819 print_resetinfo, 820 #endif 821 #if defined(CONFIG_DISPLAY_CPUINFO) 822 print_cpuinfo, /* display cpu info (and speed) */ 823 #endif 824 #if defined(CONFIG_DTB_RESELECT) 825 embedded_dtb_select, 826 #endif 827 #if defined(CONFIG_DISPLAY_BOARDINFO) 828 show_board_info, 829 #endif 830 INIT_FUNC_WATCHDOG_INIT 831 #if defined(CONFIG_MISC_INIT_F) 832 misc_init_f, 833 #endif 834 INIT_FUNC_WATCHDOG_RESET 835 #if defined(CONFIG_SYS_I2C) 836 init_func_i2c, 837 #endif 838 #if defined(CONFIG_VID) && !defined(CONFIG_SPL) 839 init_func_vid, 840 #endif 841 #if defined(CONFIG_HARD_SPI) 842 init_func_spi, 843 #endif 844 announce_dram_init, 845 dram_init, /* configure available RAM banks */ 846 #ifdef CONFIG_POST 847 post_init_f, 848 #endif 849 INIT_FUNC_WATCHDOG_RESET 850 #if defined(CONFIG_SYS_DRAM_TEST) 851 testdram, 852 #endif /* CONFIG_SYS_DRAM_TEST */ 853 INIT_FUNC_WATCHDOG_RESET 854 855 #ifdef CONFIG_POST 856 init_post, 857 #endif 858 INIT_FUNC_WATCHDOG_RESET 859 /* 860 * Now that we have DRAM mapped and working, we can 861 * relocate the code and continue running from DRAM. 862 * 863 * Reserve memory at end of RAM for (top down in that order): 864 * - area that won't get touched by U-Boot and Linux (optional) 865 * - kernel log buffer 866 * - protected RAM 867 * - LCD framebuffer 868 * - monitor code 869 * - board info struct 870 */ 871 setup_dest_addr, 872 #ifdef CONFIG_PRAM 873 reserve_pram, 874 #endif 875 reserve_round_4k, 876 #ifdef CONFIG_ARM 877 reserve_mmu, 878 #endif 879 reserve_video, 880 reserve_trace, 881 reserve_uboot, 882 reserve_malloc, 883 reserve_board, 884 setup_machine, 885 reserve_global_data, 886 reserve_fdt, 887 reserve_bootstage, 888 reserve_arch, 889 reserve_stacks, 890 dram_init_banksize, 891 show_dram_config, 892 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 893 defined(CONFIG_SH) 894 setup_board_part1, 895 #endif 896 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 897 INIT_FUNC_WATCHDOG_RESET 898 setup_board_part2, 899 #endif 900 display_new_sp, 901 #ifdef CONFIG_OF_BOARD_FIXUP 902 fix_fdt, 903 #endif 904 INIT_FUNC_WATCHDOG_RESET 905 reloc_fdt, 906 reloc_bootstage, 907 setup_reloc, 908 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 909 copy_uboot_to_ram, 910 do_elf_reloc_fixups, 911 clear_bss, 912 #endif 913 #if defined(CONFIG_XTENSA) 914 clear_bss, 915 #endif 916 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 917 !CONFIG_IS_ENABLED(X86_64) 918 jump_to_copy, 919 #endif 920 NULL, 921 }; 922 923 void board_init_f(ulong boot_flags) 924 { 925 gd->flags = boot_flags; 926 gd->have_console = 0; 927 928 if (initcall_run_list(init_sequence_f)) 929 hang(); 930 931 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 932 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \ 933 !defined(CONFIG_ARC) 934 /* NOTREACHED - jump_to_copy() does not return */ 935 hang(); 936 #endif 937 } 938 939 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 940 /* 941 * For now this code is only used on x86. 942 * 943 * init_sequence_f_r is the list of init functions which are run when 944 * U-Boot is executing from Flash with a semi-limited 'C' environment. 945 * The following limitations must be considered when implementing an 946 * '_f_r' function: 947 * - 'static' variables are read-only 948 * - Global Data (gd->xxx) is read/write 949 * 950 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 951 * supported). It _should_, if possible, copy global data to RAM and 952 * initialise the CPU caches (to speed up the relocation process) 953 * 954 * NOTE: At present only x86 uses this route, but it is intended that 955 * all archs will move to this when generic relocation is implemented. 956 */ 957 static const init_fnc_t init_sequence_f_r[] = { 958 #if !CONFIG_IS_ENABLED(X86_64) 959 init_cache_f_r, 960 #endif 961 962 NULL, 963 }; 964 965 void board_init_f_r(void) 966 { 967 if (initcall_run_list(init_sequence_f_r)) 968 hang(); 969 970 /* 971 * The pre-relocation drivers may be using memory that has now gone 972 * away. Mark serial as unavailable - this will fall back to the debug 973 * UART if available. 974 * 975 * Do the same with log drivers since the memory may not be available. 976 */ 977 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY); 978 #ifdef CONFIG_TIMER 979 gd->timer = NULL; 980 #endif 981 982 /* 983 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 984 * Transfer execution from Flash to RAM by calculating the address 985 * of the in-RAM copy of board_init_r() and calling it 986 */ 987 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 988 989 /* NOTREACHED - board_init_r() does not return */ 990 hang(); 991 } 992 #endif /* CONFIG_X86 */ 993