1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <linux/compiler.h> 15 #include <version.h> 16 #include <environment.h> 17 #include <dm.h> 18 #include <fdtdec.h> 19 #include <fs.h> 20 #if defined(CONFIG_CMD_IDE) 21 #include <ide.h> 22 #endif 23 #include <i2c.h> 24 #include <initcall.h> 25 #include <logbuff.h> 26 27 /* TODO: Can we move these into arch/ headers? */ 28 #ifdef CONFIG_8xx 29 #include <mpc8xx.h> 30 #endif 31 #ifdef CONFIG_5xx 32 #include <mpc5xx.h> 33 #endif 34 #ifdef CONFIG_MPC5xxx 35 #include <mpc5xxx.h> 36 #endif 37 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 38 #include <asm/mp.h> 39 #endif 40 41 #include <os.h> 42 #include <post.h> 43 #include <spi.h> 44 #include <status_led.h> 45 #include <trace.h> 46 #include <watchdog.h> 47 #include <asm/errno.h> 48 #include <asm/io.h> 49 #include <asm/sections.h> 50 #ifdef CONFIG_X86 51 #include <asm/init_helpers.h> 52 #include <asm/relocate.h> 53 #endif 54 #ifdef CONFIG_SANDBOX 55 #include <asm/state.h> 56 #endif 57 #include <dm/root.h> 58 #include <linux/compiler.h> 59 60 /* 61 * Pointer to initial global data area 62 * 63 * Here we initialize it if needed. 64 */ 65 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 66 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 67 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 68 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 69 #else 70 DECLARE_GLOBAL_DATA_PTR; 71 #endif 72 73 /* 74 * sjg: IMO this code should be 75 * refactored to a single function, something like: 76 * 77 * void led_set_state(enum led_colour_t colour, int on); 78 */ 79 /************************************************************************ 80 * Coloured LED functionality 81 ************************************************************************ 82 * May be supplied by boards if desired 83 */ 84 __weak void coloured_LED_init(void) {} 85 __weak void red_led_on(void) {} 86 __weak void red_led_off(void) {} 87 __weak void green_led_on(void) {} 88 __weak void green_led_off(void) {} 89 __weak void yellow_led_on(void) {} 90 __weak void yellow_led_off(void) {} 91 __weak void blue_led_on(void) {} 92 __weak void blue_led_off(void) {} 93 94 /* 95 * Why is gd allocated a register? Prior to reloc it might be better to 96 * just pass it around to each function in this file? 97 * 98 * After reloc one could argue that it is hardly used and doesn't need 99 * to be in a register. Or if it is it should perhaps hold pointers to all 100 * global data for all modules, so that post-reloc we can avoid the massive 101 * literal pool we get on ARM. Or perhaps just encourage each module to use 102 * a structure... 103 */ 104 105 /* 106 * Could the CONFIG_SPL_BUILD infection become a flag in gd? 107 */ 108 109 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 110 static int init_func_watchdog_init(void) 111 { 112 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \ 113 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 114 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG)) 115 hw_watchdog_init(); 116 # endif 117 puts(" Watchdog enabled\n"); 118 WATCHDOG_RESET(); 119 120 return 0; 121 } 122 123 int init_func_watchdog_reset(void) 124 { 125 WATCHDOG_RESET(); 126 127 return 0; 128 } 129 #endif /* CONFIG_WATCHDOG */ 130 131 __weak void board_add_ram_info(int use_default) 132 { 133 /* please define platform specific board_add_ram_info() */ 134 } 135 136 static int init_baud_rate(void) 137 { 138 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 139 return 0; 140 } 141 142 static int display_text_info(void) 143 { 144 #ifndef CONFIG_SANDBOX 145 ulong bss_start, bss_end, text_base; 146 147 bss_start = (ulong)&__bss_start; 148 bss_end = (ulong)&__bss_end; 149 150 #ifdef CONFIG_SYS_TEXT_BASE 151 text_base = CONFIG_SYS_TEXT_BASE; 152 #else 153 text_base = CONFIG_SYS_MONITOR_BASE; 154 #endif 155 156 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 157 text_base, bss_start, bss_end); 158 #endif 159 160 #ifdef CONFIG_MODEM_SUPPORT 161 debug("Modem Support enabled\n"); 162 #endif 163 #ifdef CONFIG_USE_IRQ 164 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 165 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 166 #endif 167 168 return 0; 169 } 170 171 static int announce_dram_init(void) 172 { 173 puts("DRAM: "); 174 return 0; 175 } 176 177 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) 178 static int init_func_ram(void) 179 { 180 #ifdef CONFIG_BOARD_TYPES 181 int board_type = gd->board_type; 182 #else 183 int board_type = 0; /* use dummy arg */ 184 #endif 185 186 gd->ram_size = initdram(board_type); 187 188 if (gd->ram_size > 0) 189 return 0; 190 191 puts("*** failed ***\n"); 192 return 1; 193 } 194 #endif 195 196 static int show_dram_config(void) 197 { 198 unsigned long long size; 199 200 #ifdef CONFIG_NR_DRAM_BANKS 201 int i; 202 203 debug("\nRAM Configuration:\n"); 204 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 205 size += gd->bd->bi_dram[i].size; 206 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); 207 #ifdef DEBUG 208 print_size(gd->bd->bi_dram[i].size, "\n"); 209 #endif 210 } 211 debug("\nDRAM: "); 212 #else 213 size = gd->ram_size; 214 #endif 215 216 print_size(size, ""); 217 board_add_ram_info(0); 218 putc('\n'); 219 220 return 0; 221 } 222 223 __weak void dram_init_banksize(void) 224 { 225 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 226 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 227 gd->bd->bi_dram[0].size = get_effective_memsize(); 228 #endif 229 } 230 231 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 232 static int init_func_i2c(void) 233 { 234 puts("I2C: "); 235 #ifdef CONFIG_SYS_I2C 236 i2c_init_all(); 237 #else 238 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 239 #endif 240 puts("ready\n"); 241 return 0; 242 } 243 #endif 244 245 #if defined(CONFIG_HARD_SPI) 246 static int init_func_spi(void) 247 { 248 puts("SPI: "); 249 spi_init(); 250 puts("ready\n"); 251 return 0; 252 } 253 #endif 254 255 __maybe_unused 256 static int zero_global_data(void) 257 { 258 memset((void *)gd, '\0', sizeof(gd_t)); 259 260 return 0; 261 } 262 263 static int setup_mon_len(void) 264 { 265 #if defined(__ARM__) || defined(__MICROBLAZE__) 266 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 267 #elif defined(CONFIG_SANDBOX) 268 gd->mon_len = (ulong)&_end - (ulong)_init; 269 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 270 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 271 #else 272 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 273 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 274 #endif 275 return 0; 276 } 277 278 __weak int arch_cpu_init(void) 279 { 280 return 0; 281 } 282 283 #ifdef CONFIG_OF_HOSTFILE 284 285 static int read_fdt_from_file(void) 286 { 287 struct sandbox_state *state = state_get_current(); 288 const char *fname = state->fdt_fname; 289 void *blob; 290 loff_t size; 291 int err; 292 int fd; 293 294 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); 295 if (!state->fdt_fname) { 296 err = fdt_create_empty_tree(blob, 256); 297 if (!err) 298 goto done; 299 printf("Unable to create empty FDT: %s\n", fdt_strerror(err)); 300 return -EINVAL; 301 } 302 303 err = os_get_filesize(fname, &size); 304 if (err < 0) { 305 printf("Failed to file FDT file '%s'\n", fname); 306 return err; 307 } 308 fd = os_open(fname, OS_O_RDONLY); 309 if (fd < 0) { 310 printf("Failed to open FDT file '%s'\n", fname); 311 return -EACCES; 312 } 313 if (os_read(fd, blob, size) != size) { 314 os_close(fd); 315 return -EIO; 316 } 317 os_close(fd); 318 319 done: 320 gd->fdt_blob = blob; 321 322 return 0; 323 } 324 #endif 325 326 #ifdef CONFIG_SANDBOX 327 static int setup_ram_buf(void) 328 { 329 struct sandbox_state *state = state_get_current(); 330 331 gd->arch.ram_buf = state->ram_buf; 332 gd->ram_size = state->ram_size; 333 334 return 0; 335 } 336 #endif 337 338 static int setup_fdt(void) 339 { 340 #ifdef CONFIG_OF_CONTROL 341 # ifdef CONFIG_OF_EMBED 342 /* Get a pointer to the FDT */ 343 gd->fdt_blob = __dtb_dt_begin; 344 # elif defined CONFIG_OF_SEPARATE 345 /* FDT is at end of image */ 346 gd->fdt_blob = (ulong *)&_end; 347 # elif defined(CONFIG_OF_HOSTFILE) 348 if (read_fdt_from_file()) { 349 puts("Failed to read control FDT\n"); 350 return -1; 351 } 352 # endif 353 /* Allow the early environment to override the fdt address */ 354 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, 355 (uintptr_t)gd->fdt_blob); 356 #endif 357 return 0; 358 } 359 360 /* Get the top of usable RAM */ 361 __weak ulong board_get_usable_ram_top(ulong total_size) 362 { 363 return gd->ram_top; 364 } 365 366 static int setup_dest_addr(void) 367 { 368 debug("Monitor len: %08lX\n", gd->mon_len); 369 /* 370 * Ram is setup, size stored in gd !! 371 */ 372 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 373 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 374 /* 375 * Subtract specified amount of memory to hide so that it won't 376 * get "touched" at all by U-Boot. By fixing up gd->ram_size 377 * the Linux kernel should now get passed the now "corrected" 378 * memory size and won't touch it either. This should work 379 * for arch/ppc and arch/powerpc. Only Linux board ports in 380 * arch/powerpc with bootwrapper support, that recalculate the 381 * memory size from the SDRAM controller setup will have to 382 * get fixed. 383 */ 384 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 385 #endif 386 #ifdef CONFIG_SYS_SDRAM_BASE 387 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 388 #endif 389 gd->ram_top += get_effective_memsize(); 390 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 391 gd->relocaddr = gd->ram_top; 392 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 393 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 394 /* 395 * We need to make sure the location we intend to put secondary core 396 * boot code is reserved and not used by any part of u-boot 397 */ 398 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 399 gd->relocaddr = determine_mp_bootpg(NULL); 400 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 401 } 402 #endif 403 return 0; 404 } 405 406 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 407 static int reserve_logbuffer(void) 408 { 409 /* reserve kernel log buffer */ 410 gd->relocaddr -= LOGBUFF_RESERVE; 411 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 412 gd->relocaddr); 413 return 0; 414 } 415 #endif 416 417 #ifdef CONFIG_PRAM 418 /* reserve protected RAM */ 419 static int reserve_pram(void) 420 { 421 ulong reg; 422 423 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 424 gd->relocaddr -= (reg << 10); /* size is in kB */ 425 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 426 gd->relocaddr); 427 return 0; 428 } 429 #endif /* CONFIG_PRAM */ 430 431 /* Round memory pointer down to next 4 kB limit */ 432 static int reserve_round_4k(void) 433 { 434 gd->relocaddr &= ~(4096 - 1); 435 return 0; 436 } 437 438 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 439 defined(CONFIG_ARM) 440 static int reserve_mmu(void) 441 { 442 /* reserve TLB table */ 443 gd->arch.tlb_size = PGTABLE_SIZE; 444 gd->relocaddr -= gd->arch.tlb_size; 445 446 /* round down to next 64 kB limit */ 447 gd->relocaddr &= ~(0x10000 - 1); 448 449 gd->arch.tlb_addr = gd->relocaddr; 450 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 451 gd->arch.tlb_addr + gd->arch.tlb_size); 452 return 0; 453 } 454 #endif 455 456 #ifdef CONFIG_LCD 457 static int reserve_lcd(void) 458 { 459 #ifdef CONFIG_FB_ADDR 460 gd->fb_base = CONFIG_FB_ADDR; 461 #else 462 /* reserve memory for LCD display (always full pages) */ 463 gd->relocaddr = lcd_setmem(gd->relocaddr); 464 gd->fb_base = gd->relocaddr; 465 #endif /* CONFIG_FB_ADDR */ 466 return 0; 467 } 468 #endif /* CONFIG_LCD */ 469 470 static int reserve_trace(void) 471 { 472 #ifdef CONFIG_TRACE 473 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 474 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 475 debug("Reserving %dk for trace data at: %08lx\n", 476 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 477 #endif 478 479 return 0; 480 } 481 482 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 483 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 484 !defined(CONFIG_BLACKFIN) 485 static int reserve_video(void) 486 { 487 /* reserve memory for video display (always full pages) */ 488 gd->relocaddr = video_setmem(gd->relocaddr); 489 gd->fb_base = gd->relocaddr; 490 491 return 0; 492 } 493 #endif 494 495 static int reserve_uboot(void) 496 { 497 /* 498 * reserve memory for U-Boot code, data & bss 499 * round down to next 4 kB limit 500 */ 501 gd->relocaddr -= gd->mon_len; 502 gd->relocaddr &= ~(4096 - 1); 503 #ifdef CONFIG_E500 504 /* round down to next 64 kB limit so that IVPR stays aligned */ 505 gd->relocaddr &= ~(65536 - 1); 506 #endif 507 508 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 509 gd->relocaddr); 510 511 gd->start_addr_sp = gd->relocaddr; 512 513 return 0; 514 } 515 516 #ifndef CONFIG_SPL_BUILD 517 /* reserve memory for malloc() area */ 518 static int reserve_malloc(void) 519 { 520 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 521 debug("Reserving %dk for malloc() at: %08lx\n", 522 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 523 return 0; 524 } 525 526 /* (permanently) allocate a Board Info struct */ 527 static int reserve_board(void) 528 { 529 if (!gd->bd) { 530 gd->start_addr_sp -= sizeof(bd_t); 531 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 532 memset(gd->bd, '\0', sizeof(bd_t)); 533 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 534 sizeof(bd_t), gd->start_addr_sp); 535 } 536 return 0; 537 } 538 #endif 539 540 static int setup_machine(void) 541 { 542 #ifdef CONFIG_MACH_TYPE 543 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 544 #endif 545 return 0; 546 } 547 548 static int reserve_global_data(void) 549 { 550 gd->start_addr_sp -= sizeof(gd_t); 551 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 552 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 553 sizeof(gd_t), gd->start_addr_sp); 554 return 0; 555 } 556 557 static int reserve_fdt(void) 558 { 559 /* 560 * If the device tree is sitting immediate above our image then we 561 * must relocate it. If it is embedded in the data section, then it 562 * will be relocated with other data. 563 */ 564 if (gd->fdt_blob) { 565 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 566 567 gd->start_addr_sp -= gd->fdt_size; 568 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 569 debug("Reserving %lu Bytes for FDT at: %08lx\n", 570 gd->fdt_size, gd->start_addr_sp); 571 } 572 573 return 0; 574 } 575 576 int arch_reserve_stacks(void) 577 { 578 return 0; 579 } 580 581 static int reserve_stacks(void) 582 { 583 /* make stack pointer 16-byte aligned */ 584 gd->start_addr_sp -= 16; 585 gd->start_addr_sp &= ~0xf; 586 587 /* 588 * let the architecture specific code tailor gd->start_addr_sp and 589 * gd->irq_sp 590 */ 591 return arch_reserve_stacks(); 592 } 593 594 static int display_new_sp(void) 595 { 596 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 597 598 return 0; 599 } 600 601 #ifdef CONFIG_PPC 602 static int setup_board_part1(void) 603 { 604 bd_t *bd = gd->bd; 605 606 /* 607 * Save local variables to board info struct 608 */ 609 610 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 611 bd->bi_memsize = gd->ram_size; /* size in bytes */ 612 613 #ifdef CONFIG_SYS_SRAM_BASE 614 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 615 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 616 #endif 617 618 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 619 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 620 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 621 #endif 622 #if defined(CONFIG_MPC5xxx) 623 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 624 #endif 625 #if defined(CONFIG_MPC83xx) 626 bd->bi_immrbar = CONFIG_SYS_IMMR; 627 #endif 628 629 return 0; 630 } 631 632 static int setup_board_part2(void) 633 { 634 bd_t *bd = gd->bd; 635 636 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 637 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 638 #if defined(CONFIG_CPM2) 639 bd->bi_cpmfreq = gd->arch.cpm_clk; 640 bd->bi_brgfreq = gd->arch.brg_clk; 641 bd->bi_sccfreq = gd->arch.scc_clk; 642 bd->bi_vco = gd->arch.vco_out; 643 #endif /* CONFIG_CPM2 */ 644 #if defined(CONFIG_MPC512X) 645 bd->bi_ipsfreq = gd->arch.ips_clk; 646 #endif /* CONFIG_MPC512X */ 647 #if defined(CONFIG_MPC5xxx) 648 bd->bi_ipbfreq = gd->arch.ipb_clk; 649 bd->bi_pcifreq = gd->pci_clk; 650 #endif /* CONFIG_MPC5xxx */ 651 652 return 0; 653 } 654 #endif 655 656 #ifdef CONFIG_SYS_EXTBDINFO 657 static int setup_board_extra(void) 658 { 659 bd_t *bd = gd->bd; 660 661 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); 662 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, 663 sizeof(bd->bi_r_version)); 664 665 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ 666 bd->bi_plb_busfreq = gd->bus_clk; 667 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ 668 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ 669 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) 670 bd->bi_pci_busfreq = get_PCI_freq(); 671 bd->bi_opbfreq = get_OPB_freq(); 672 #elif defined(CONFIG_XILINX_405) 673 bd->bi_pci_busfreq = get_PCI_freq(); 674 #endif 675 676 return 0; 677 } 678 #endif 679 680 #ifdef CONFIG_POST 681 static int init_post(void) 682 { 683 post_bootmode_init(); 684 post_run(NULL, POST_ROM | post_bootmode_get(0)); 685 686 return 0; 687 } 688 #endif 689 690 static int setup_dram_config(void) 691 { 692 /* Ram is board specific, so move it to board code ... */ 693 dram_init_banksize(); 694 695 return 0; 696 } 697 698 static int reloc_fdt(void) 699 { 700 if (gd->new_fdt) { 701 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 702 gd->fdt_blob = gd->new_fdt; 703 } 704 705 return 0; 706 } 707 708 static int setup_reloc(void) 709 { 710 #ifdef CONFIG_SYS_TEXT_BASE 711 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 712 #endif 713 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 714 715 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 716 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 717 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 718 gd->start_addr_sp); 719 720 return 0; 721 } 722 723 /* ARM calls relocate_code from its crt0.S */ 724 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 725 726 static int jump_to_copy(void) 727 { 728 /* 729 * x86 is special, but in a nice way. It uses a trampoline which 730 * enables the dcache if possible. 731 * 732 * For now, other archs use relocate_code(), which is implemented 733 * similarly for all archs. When we do generic relocation, hopefully 734 * we can make all archs enable the dcache prior to relocation. 735 */ 736 #ifdef CONFIG_X86 737 /* 738 * SDRAM and console are now initialised. The final stack can now 739 * be setup in SDRAM. Code execution will continue in Flash, but 740 * with the stack in SDRAM and Global Data in temporary memory 741 * (CPU cache) 742 */ 743 board_init_f_r_trampoline(gd->start_addr_sp); 744 #else 745 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 746 #endif 747 748 return 0; 749 } 750 #endif 751 752 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 753 static int mark_bootstage(void) 754 { 755 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 756 757 return 0; 758 } 759 760 static int initf_malloc(void) 761 { 762 #ifdef CONFIG_SYS_MALLOC_F_LEN 763 assert(gd->malloc_base); /* Set up by crt0.S */ 764 gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN; 765 gd->malloc_ptr = 0; 766 #endif 767 768 return 0; 769 } 770 771 static int initf_dm(void) 772 { 773 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 774 int ret; 775 776 ret = dm_init_and_scan(true); 777 if (ret) 778 return ret; 779 #endif 780 781 return 0; 782 } 783 784 /* Architecture-specific memory reservation */ 785 __weak int reserve_arch(void) 786 { 787 return 0; 788 } 789 790 static init_fnc_t init_sequence_f[] = { 791 #ifdef CONFIG_SANDBOX 792 setup_ram_buf, 793 #endif 794 setup_mon_len, 795 setup_fdt, 796 #ifdef CONFIG_TRACE 797 trace_early_init, 798 #endif 799 initf_malloc, 800 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) 801 /* TODO: can this go into arch_cpu_init()? */ 802 probecpu, 803 #endif 804 arch_cpu_init, /* basic arch cpu dependent setup */ 805 mark_bootstage, 806 #ifdef CONFIG_OF_CONTROL 807 fdtdec_check_fdt, 808 #endif 809 initf_dm, 810 #if defined(CONFIG_BOARD_EARLY_INIT_F) 811 board_early_init_f, 812 #endif 813 /* TODO: can any of this go into arch_cpu_init()? */ 814 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT) 815 get_clocks, /* get CPU and bus clocks (etc.) */ 816 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ 817 && !defined(CONFIG_TQM885D) 818 adjust_sdram_tbs_8xx, 819 #endif 820 /* TODO: can we rename this to timer_init()? */ 821 init_timebase, 822 #endif 823 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN) 824 timer_init, /* initialize timer */ 825 #endif 826 #ifdef CONFIG_SYS_ALLOC_DPRAM 827 #if !defined(CONFIG_CPM2) 828 dpram_init, 829 #endif 830 #endif 831 #if defined(CONFIG_BOARD_POSTCLK_INIT) 832 board_postclk_init, 833 #endif 834 #ifdef CONFIG_FSL_ESDHC 835 get_clocks, 836 #endif 837 env_init, /* initialize environment */ 838 #if defined(CONFIG_8xx_CPUCLK_DEFAULT) 839 /* get CPU and bus clocks according to the environment variable */ 840 get_clocks_866, 841 /* adjust sdram refresh rate according to the new clock */ 842 sdram_adjust_866, 843 init_timebase, 844 #endif 845 init_baud_rate, /* initialze baudrate settings */ 846 serial_init, /* serial communications setup */ 847 console_init_f, /* stage 1 init of console */ 848 #ifdef CONFIG_SANDBOX 849 sandbox_early_getopt_check, 850 #endif 851 #ifdef CONFIG_OF_CONTROL 852 fdtdec_prepare_fdt, 853 #endif 854 display_options, /* say that we are here */ 855 display_text_info, /* show debugging info if required */ 856 #if defined(CONFIG_MPC8260) 857 prt_8260_rsr, 858 prt_8260_clks, 859 #endif /* CONFIG_MPC8260 */ 860 #if defined(CONFIG_MPC83xx) 861 prt_83xx_rsr, 862 #endif 863 #ifdef CONFIG_PPC 864 checkcpu, 865 #endif 866 print_cpuinfo, /* display cpu info (and speed) */ 867 #if defined(CONFIG_MPC5xxx) 868 prt_mpc5xxx_clks, 869 #endif /* CONFIG_MPC5xxx */ 870 #if defined(CONFIG_DISPLAY_BOARDINFO) 871 show_board_info, 872 #endif 873 INIT_FUNC_WATCHDOG_INIT 874 #if defined(CONFIG_MISC_INIT_F) 875 misc_init_f, 876 #endif 877 INIT_FUNC_WATCHDOG_RESET 878 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 879 init_func_i2c, 880 #endif 881 #if defined(CONFIG_HARD_SPI) 882 init_func_spi, 883 #endif 884 announce_dram_init, 885 /* TODO: unify all these dram functions? */ 886 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) 887 dram_init, /* configure available RAM banks */ 888 #endif 889 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) 890 init_func_ram, 891 #endif 892 #ifdef CONFIG_POST 893 post_init_f, 894 #endif 895 INIT_FUNC_WATCHDOG_RESET 896 #if defined(CONFIG_SYS_DRAM_TEST) 897 testdram, 898 #endif /* CONFIG_SYS_DRAM_TEST */ 899 INIT_FUNC_WATCHDOG_RESET 900 901 #ifdef CONFIG_POST 902 init_post, 903 #endif 904 INIT_FUNC_WATCHDOG_RESET 905 /* 906 * Now that we have DRAM mapped and working, we can 907 * relocate the code and continue running from DRAM. 908 * 909 * Reserve memory at end of RAM for (top down in that order): 910 * - area that won't get touched by U-Boot and Linux (optional) 911 * - kernel log buffer 912 * - protected RAM 913 * - LCD framebuffer 914 * - monitor code 915 * - board info struct 916 */ 917 setup_dest_addr, 918 #if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2) 919 /* Blackfin u-boot monitor should be on top of the ram */ 920 reserve_uboot, 921 #endif 922 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR) 923 reserve_logbuffer, 924 #endif 925 #ifdef CONFIG_PRAM 926 reserve_pram, 927 #endif 928 reserve_round_4k, 929 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \ 930 defined(CONFIG_ARM) 931 reserve_mmu, 932 #endif 933 #ifdef CONFIG_LCD 934 reserve_lcd, 935 #endif 936 reserve_trace, 937 /* TODO: Why the dependency on CONFIG_8xx? */ 938 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 939 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 940 !defined(CONFIG_BLACKFIN) 941 reserve_video, 942 #endif 943 #if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2) 944 reserve_uboot, 945 #endif 946 #ifndef CONFIG_SPL_BUILD 947 reserve_malloc, 948 reserve_board, 949 #endif 950 setup_machine, 951 reserve_global_data, 952 reserve_fdt, 953 reserve_arch, 954 reserve_stacks, 955 setup_dram_config, 956 show_dram_config, 957 #ifdef CONFIG_PPC 958 setup_board_part1, 959 INIT_FUNC_WATCHDOG_RESET 960 setup_board_part2, 961 #endif 962 display_new_sp, 963 #ifdef CONFIG_SYS_EXTBDINFO 964 setup_board_extra, 965 #endif 966 INIT_FUNC_WATCHDOG_RESET 967 reloc_fdt, 968 setup_reloc, 969 #ifdef CONFIG_X86 970 copy_uboot_to_ram, 971 clear_bss, 972 do_elf_reloc_fixups, 973 #endif 974 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 975 jump_to_copy, 976 #endif 977 NULL, 978 }; 979 980 void board_init_f(ulong boot_flags) 981 { 982 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 983 /* 984 * For some archtectures, global data is initialized and used before 985 * calling this function. The data should be preserved. For others, 986 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 987 * here to host global data until relocation. 988 */ 989 gd_t data; 990 991 gd = &data; 992 993 /* 994 * Clear global data before it is accessed at debug print 995 * in initcall_run_list. Otherwise the debug print probably 996 * get the wrong vaule of gd->have_console. 997 */ 998 zero_global_data(); 999 #endif 1000 1001 gd->flags = boot_flags; 1002 gd->have_console = 0; 1003 1004 if (initcall_run_list(init_sequence_f)) 1005 hang(); 1006 1007 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) 1008 /* NOTREACHED - jump_to_copy() does not return */ 1009 hang(); 1010 #endif 1011 } 1012 1013 #ifdef CONFIG_X86 1014 /* 1015 * For now this code is only used on x86. 1016 * 1017 * init_sequence_f_r is the list of init functions which are run when 1018 * U-Boot is executing from Flash with a semi-limited 'C' environment. 1019 * The following limitations must be considered when implementing an 1020 * '_f_r' function: 1021 * - 'static' variables are read-only 1022 * - Global Data (gd->xxx) is read/write 1023 * 1024 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 1025 * supported). It _should_, if possible, copy global data to RAM and 1026 * initialise the CPU caches (to speed up the relocation process) 1027 * 1028 * NOTE: At present only x86 uses this route, but it is intended that 1029 * all archs will move to this when generic relocation is implemented. 1030 */ 1031 static init_fnc_t init_sequence_f_r[] = { 1032 init_cache_f_r, 1033 1034 NULL, 1035 }; 1036 1037 void board_init_f_r(void) 1038 { 1039 if (initcall_run_list(init_sequence_f_r)) 1040 hang(); 1041 1042 /* 1043 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 1044 * Transfer execution from Flash to RAM by calculating the address 1045 * of the in-RAM copy of board_init_r() and calling it 1046 */ 1047 (board_init_r + gd->reloc_off)(gd, gd->relocaddr); 1048 1049 /* NOTREACHED - board_init_r() does not return */ 1050 hang(); 1051 } 1052 #else 1053 ulong board_init_f_mem(ulong top) 1054 { 1055 /* Leave space for the stack we are running with now */ 1056 top -= 0x40; 1057 1058 top -= sizeof(struct global_data); 1059 top = ALIGN(top, 16); 1060 gd = (struct global_data *)top; 1061 memset((void *)gd, '\0', sizeof(*gd)); 1062 1063 #ifdef CONFIG_SYS_MALLOC_F_LEN 1064 top -= CONFIG_SYS_MALLOC_F_LEN; 1065 gd->malloc_base = top; 1066 #endif 1067 1068 return top; 1069 } 1070 #endif /* CONFIG_X86 */ 1071