1 /* 2 * This program is distributed in the hope that it will be useful, 3 * but WITHOUT ANY WARRANTY; without even the implied warranty of 4 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 5 * GNU General Public License for more details. 6 * 7 * You should have received a copy of the GNU General Public License 8 * along with this program; if not, write to the Free Software 9 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 10 */ 11 #include <stdlib.h> 12 #include <common.h> 13 #include <console.h> 14 #include <bootretry.h> 15 #include <cli.h> 16 #include <command.h> 17 #include <console.h> 18 #include <malloc.h> 19 #include <inttypes.h> 20 #include <mapmem.h> 21 #include <asm/io.h> 22 #include <linux/compiler.h> 23 24 DECLARE_GLOBAL_DATA_PTR; 25 26 #define OTP_PASSWD 0x349fe38a 27 #define RETRY 3 28 #define OTP_REGION_STRAP BIT(0) 29 #define OTP_REGION_CONF BIT(1) 30 #define OTP_REGION_DATA BIT(2) 31 32 #define OTP_USAGE -1 33 #define OTP_FAILURE -2 34 #define OTP_SUCCESS 0 35 36 #define OTP_PROG_SKIP 1 37 38 #define OTP_KEY_TYPE_RSA 1 39 #define OTP_KEY_TYPE_AES 2 40 #define OTP_KEY_TYPE_VAULT 3 41 #define OTP_KEY_TYPE_HMAC 4 42 43 44 #define OTP_REG_RESERVED -1 45 #define OTP_REG_VALUE -2 46 #define OTP_REG_VALID_BIT -3 47 48 #define PBSTR "||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||" 49 #define PBWIDTH 60 50 51 #define OTP_BASE 0x1e6f2000 52 #define OTP_PROTECT_KEY OTP_BASE 53 #define OTP_COMMAND OTP_BASE + 0x4 54 #define OTP_TIMING OTP_BASE + 0x8 55 #define OTP_ADDR OTP_BASE + 0x10 56 #define OTP_STATUS OTP_BASE + 0x14 57 #define OTP_COMPARE_1 OTP_BASE + 0x20 58 #define OTP_COMPARE_2 OTP_BASE + 0x24 59 #define OTP_COMPARE_3 OTP_BASE + 0x28 60 #define OTP_COMPARE_4 OTP_BASE + 0x2c 61 62 struct otpstrap_status { 63 int value; 64 int option_array[7]; 65 int remain_times; 66 int writeable_option; 67 int protected; 68 }; 69 70 struct otpconf_parse { 71 int dw_offset; 72 int bit; 73 int length; 74 int value; 75 int keep; 76 char status[80]; 77 }; 78 79 struct otpstrap_info { 80 int8_t bit_offset; 81 int8_t length; 82 int8_t value; 83 char *information; 84 }; 85 86 struct otpconf_info { 87 int8_t dw_offset; 88 int8_t bit_offset; 89 int8_t length; 90 int8_t value; 91 char *information; 92 }; 93 94 struct otpkey_type { 95 int value; 96 int key_type; 97 int need_id; 98 char information[110]; 99 }; 100 101 struct otp_info_cb { 102 int version; 103 const struct otpstrap_info *strap_info; 104 int strap_info_len; 105 const struct otpconf_info *conf_info; 106 int conf_info_len; 107 const struct otpkey_type *key_info; 108 int key_info_len; 109 }; 110 111 static struct otp_info_cb info_cb; 112 113 static const struct otpstrap_info a0_strap_info[] = { 114 { 0, 1, 0, "Disable secure boot" }, 115 { 0, 1, 1, "Enable secure boot" }, 116 { 1, 1, 0, "Disable boot from eMMC" }, 117 { 1, 1, 1, "Enable boot from eMMC" }, 118 { 2, 1, 0, "Disable Boot from debug SPI" }, 119 { 2, 1, 1, "Enable Boot from debug SPI" }, 120 { 3, 1, 0, "Enable ARM CM3" }, 121 { 3, 1, 1, "Disable ARM CM3" }, 122 { 4, 1, 0, "No VGA BIOS ROM, VGA BIOS is merged in the system BIOS" }, 123 { 4, 1, 1, "Enable dedicated VGA BIOS ROM" }, 124 { 5, 1, 0, "MAC 1 : RMII/NCSI" }, 125 { 5, 1, 1, "MAC 1 : RGMII" }, 126 { 6, 1, 0, "MAC 2 : RMII/NCSI" }, 127 { 6, 1, 1, "MAC 2 : RGMII" }, 128 { 7, 3, 0, "CPU Frequency : 1GHz" }, 129 { 7, 3, 1, "CPU Frequency : 800MHz" }, 130 { 7, 3, 2, "CPU Frequency : 1.2GHz" }, 131 { 7, 3, 3, "CPU Frequency : 1.4GHz" }, 132 { 10, 2, 0, "HCLK ratio AXI:AHB = 2:1" }, 133 { 10, 2, 1, "HCLK ratio AXI:AHB = 2:1" }, 134 { 10, 2, 2, "HCLK ratio AXI:AHB = 3:1" }, 135 { 10, 2, 3, "HCLK ratio AXI:AHB = 4:1" }, 136 { 12, 2, 0, "VGA memory size : 8MB" }, 137 { 12, 2, 1, "VGA memory size : 16MB" }, 138 { 12, 2, 2, "VGA memory size : 32MB" }, 139 { 12, 2, 3, "VGA memory size : 64MB" }, 140 { 14, 3, OTP_REG_RESERVED, "" }, 141 { 17, 1, 0, "VGA class code : Class Code for video device" }, 142 { 17, 1, 1, "VGA class code : Class Code for VGA device" }, 143 { 18, 1, 0, "Enable debug interfaces 0" }, 144 { 18, 1, 1, "Disable debug interfaces 0" }, 145 { 19, 1, 0, "Boot from emmc mode : High eMMC speed" }, 146 { 19, 1, 1, "Boot from emmc mode : Normal eMMC speed" }, 147 { 20, 1, 0, "Enable Pcie EHCI device" }, 148 { 20, 1, 1, "Disable Pcie EHCI device" }, 149 { 21, 1, 0, "Enable VGA XDMA function" }, 150 { 21, 1, 1, "Disable VGA XDMA function" }, 151 { 22, 1, 0, "Normal BMC mode" }, 152 { 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" }, 153 { 23, 1, 0, "SSPRST# pin is for secondary processor dedicated reset pin" }, 154 { 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" }, 155 { 24, 1, 0, "DRAM types : DDR4" }, 156 { 24, 1, 1, "DRAM types : DDR3" }, 157 { 25, 5, OTP_REG_RESERVED, "" }, 158 { 30, 2, OTP_REG_RESERVED, "" }, 159 { 32, 1, 0, "MAC 3 : RMII/NCSI" }, 160 { 32, 1, 1, "MAC 3 : RGMII" }, 161 { 33, 1, 0, "MAC 4 : RMII/NCSI" }, 162 { 33, 1, 1, "MAC 4 : RGMII" }, 163 { 34, 1, 0, "SuperIO configuration address : 0x2E" }, 164 { 34, 1, 1, "SuperIO configuration address : 0x4E" }, 165 { 35, 1, 0, "Enable LPC to decode SuperIO" }, 166 { 35, 1, 1, "Disable LPC to decode SuperIO" }, 167 { 36, 1, 0, "Enable debug interfaces 1" }, 168 { 36, 1, 1, "Disable debug interfaces 1" }, 169 { 37, 1, 0, "Disable ACPI function" }, 170 { 37, 1, 1, "Enable ACPI function" }, 171 { 38, 1, 0, "Enable eSPI mode" }, 172 { 38, 1, 1, "Enable LPC mode" }, 173 { 39, 1, 0, "Enable SAFS mode" }, 174 { 39, 1, 1, "Enable SAFS mode" }, 175 { 40, 2, OTP_REG_RESERVED, "" }, 176 { 42, 1, 0, "Disable boot SPI 3B/4B address mode auto detection" }, 177 { 42, 1, 1, "Enable boot SPI 3B/4B address mode auto detection" }, 178 { 43, 1, 0, "Disable boot SPI ABR" }, 179 { 43, 1, 1, "Enable boot SPI ABR" }, 180 { 44, 1, 0, "Boot SPI ABR mode : dual SPI flash" }, 181 { 44, 1, 1, "Boot SPI ABR mode : single SPI flash" }, 182 { 45, 3, 0, "Boot SPI flash size : no define size" }, 183 { 45, 3, 1, "Boot SPI flash size : 2MB" }, 184 { 45, 3, 2, "Boot SPI flash size : 4MB" }, 185 { 45, 3, 3, "Boot SPI flash size : 8MB" }, 186 { 45, 3, 4, "Boot SPI flash size : 16MB" }, 187 { 45, 3, 5, "Boot SPI flash size : 32MB" }, 188 { 45, 3, 6, "Boot SPI flash size : 64MB" }, 189 { 45, 3, 7, "Boot SPI flash size : 128MB" }, 190 { 48, 1, 0, "Disable host SPI ABR" }, 191 { 48, 1, 1, "Enable host SPI ABR" }, 192 { 49, 1, 0, "Disable host SPI ABR mode select pin" }, 193 { 49, 1, 1, "Enable host SPI ABR mode select pin" }, 194 { 50, 1, 0, "Host SPI ABR mode : dual SPI flash" }, 195 { 50, 1, 1, "Host SPI ABR mode : single SPI flash" }, 196 { 51, 3, 0, "Host SPI flash size : no define size" }, 197 { 51, 3, 1, "Host SPI flash size : 2MB" }, 198 { 51, 3, 2, "Host SPI flash size : 4MB" }, 199 { 51, 3, 3, "Host SPI flash size : 8MB" }, 200 { 51, 3, 4, "Host SPI flash size : 16MB" }, 201 { 51, 3, 5, "Host SPI flash size : 32MB" }, 202 { 51, 3, 6, "Host SPI flash size : 64MB" }, 203 { 51, 3, 7, "Host SPI flash size : 128MB" }, 204 { 54, 1, 0, "Disable boot SPI auxiliary control pins" }, 205 { 54, 1, 1, "Enable boot SPI auxiliary control pins" }, 206 { 55, 2, 0, "Boot SPI CRTM size : disable CRTM" }, 207 { 55, 2, 1, "Boot SPI CRTM size : 256KB" }, 208 { 55, 2, 2, "Boot SPI CRTM size : 512KB" }, 209 { 55, 2, 3, "Boot SPI CRTM size : 1MB" }, 210 { 57, 2, 0, "Host SPI CRTM size : disable CRTM" }, 211 { 57, 2, 1, "Host SPI CRTM size : 256KB" }, 212 { 57, 2, 2, "Host SPI CRTM size : 512KB" }, 213 { 57, 2, 3, "Host SPI CRTM size : 1MB" }, 214 { 59, 1, 0, "Disable host SPI auxiliary control pins" }, 215 { 59, 1, 1, "Enable host SPI auxiliary control pins" }, 216 { 60, 1, 0, "Disable GPIO pass through" }, 217 { 60, 1, 1, "Enable GPIO pass through" }, 218 { 61, 1, 0, "Enable low security secure boot key" }, 219 { 61, 1, 1, "Disable low security secure boot key" }, 220 { 62, 1, 0, "Disable dedicate GPIO strap pins" }, 221 { 62, 1, 1, "Enable dedicate GPIO strap pins" }, 222 { 63, 1, OTP_REG_RESERVED, "" } 223 }; 224 225 static const struct otpstrap_info a1_strap_info[] = { 226 { 0, 1, 0, "Disable secure boot" }, 227 { 0, 1, 1, "Enable secure boot" }, 228 { 1, 1, 0, "Disable boot from eMMC" }, 229 { 1, 1, 1, "Enable boot from eMMC" }, 230 { 2, 1, 0, "Disable Boot from debug SPI" }, 231 { 2, 1, 1, "Enable Boot from debug SPI" }, 232 { 3, 1, 0, "Enable ARM CM3" }, 233 { 3, 1, 1, "Disable ARM CM3" }, 234 { 4, 1, 0, "No VGA BIOS ROM, VGA BIOS is merged in the system BIOS" }, 235 { 4, 1, 1, "Enable dedicated VGA BIOS ROM" }, 236 { 5, 1, 0, "MAC 1 : RMII/NCSI" }, 237 { 5, 1, 1, "MAC 1 : RGMII" }, 238 { 6, 1, 0, "MAC 2 : RMII/NCSI" }, 239 { 6, 1, 1, "MAC 2 : RGMII" }, 240 { 7, 3, 0, "CPU Frequency : 1GHz" }, 241 { 7, 3, 1, "CPU Frequency : 800MHz" }, 242 { 7, 3, 2, "CPU Frequency : 1.2GHz" }, 243 { 7, 3, 3, "CPU Frequency : 1.4GHz" }, 244 { 10, 2, 0, "HCLK ratio AXI:AHB = 2:1" }, 245 { 10, 2, 1, "HCLK ratio AXI:AHB = 2:1" }, 246 { 10, 2, 2, "HCLK ratio AXI:AHB = 3:1" }, 247 { 10, 2, 3, "HCLK ratio AXI:AHB = 4:1" }, 248 { 12, 2, 0, "VGA memory size : 8MB" }, 249 { 12, 2, 1, "VGA memory size : 16MB" }, 250 { 12, 2, 2, "VGA memory size : 32MB" }, 251 { 12, 2, 3, "VGA memory size : 64MB" }, 252 { 14, 3, OTP_REG_RESERVED, "" }, 253 { 17, 1, 0, "VGA class code : Class Code for video device" }, 254 { 17, 1, 1, "VGA class code : Class Code for VGA device" }, 255 { 18, 1, 0, "Enable debug interfaces 0" }, 256 { 18, 1, 1, "Disable debug interfaces 0" }, 257 { 19, 1, 0, "Boot from emmc mode : High eMMC speed" }, 258 { 19, 1, 1, "Boot from emmc mode : Normal eMMC speed" }, 259 { 20, 1, 0, "Disable Pcie EHCI device" }, 260 { 20, 1, 1, "Enable Pcie EHCI device" }, 261 { 21, 1, 0, "Enable VGA XDMA function" }, 262 { 21, 1, 1, "Disable VGA XDMA function" }, 263 { 22, 1, 0, "Normal BMC mode" }, 264 { 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" }, 265 { 23, 1, 0, "SSPRST# pin is for secondary processor dedicated reset pin" }, 266 { 23, 1, 1, "SSPRST# pin is for PCIE root complex dedicated reset pin" }, 267 { 24, 1, 0, "Enable watchdog to reset full chip" }, 268 { 24, 1, 1, "Disable watchdog to reset full chip" }, 269 { 25, 5, OTP_REG_RESERVED, "" }, 270 { 30, 2, OTP_REG_RESERVED, "" }, 271 { 32, 1, 0, "MAC 3 : RMII/NCSI" }, 272 { 32, 1, 1, "MAC 3 : RGMII" }, 273 { 33, 1, 0, "MAC 4 : RMII/NCSI" }, 274 { 33, 1, 1, "MAC 4 : RGMII" }, 275 { 34, 1, 0, "SuperIO configuration address : 0x2E" }, 276 { 34, 1, 1, "SuperIO configuration address : 0x4E" }, 277 { 35, 1, 0, "Enable LPC to decode SuperIO" }, 278 { 35, 1, 1, "Disable LPC to decode SuperIO" }, 279 { 36, 1, 0, "Enable debug interfaces 1" }, 280 { 36, 1, 1, "Disable debug interfaces 1" }, 281 { 37, 1, 0, "Disable ACPI function" }, 282 { 37, 1, 1, "Enable ACPI function" }, 283 { 38, 1, 0, "Enable eSPI mode" }, 284 { 38, 1, 1, "Enable LPC mode" }, 285 { 39, 1, 0, "Enable SAFS mode" }, 286 { 39, 1, 1, "Enable SAFS mode" }, 287 { 40, 2, OTP_REG_RESERVED, "" }, 288 { 42, 1, 0, "Disable boot SPI 3B/4B address mode auto detection" }, 289 { 42, 1, 1, "Enable boot SPI 3B/4B address mode auto detection" }, 290 { 43, 1, 0, "Disable boot SPI ABR" }, 291 { 43, 1, 1, "Enable boot SPI ABR" }, 292 { 44, 1, 0, "Boot SPI ABR mode : dual SPI flash" }, 293 { 44, 1, 1, "Boot SPI ABR mode : single SPI flash" }, 294 { 45, 3, 0, "Boot SPI flash size : no define size" }, 295 { 45, 3, 1, "Boot SPI flash size : 2MB" }, 296 { 45, 3, 2, "Boot SPI flash size : 4MB" }, 297 { 45, 3, 3, "Boot SPI flash size : 8MB" }, 298 { 45, 3, 4, "Boot SPI flash size : 16MB" }, 299 { 45, 3, 5, "Boot SPI flash size : 32MB" }, 300 { 45, 3, 6, "Boot SPI flash size : 64MB" }, 301 { 45, 3, 7, "Boot SPI flash size : 128MB" }, 302 { 48, 1, 0, "Disable host SPI ABR" }, 303 { 48, 1, 1, "Enable host SPI ABR" }, 304 { 49, 1, 0, "Disable host SPI ABR mode select pin" }, 305 { 49, 1, 1, "Enable host SPI ABR mode select pin" }, 306 { 50, 1, 0, "Host SPI ABR mode : dual SPI flash" }, 307 { 50, 1, 1, "Host SPI ABR mode : single SPI flash" }, 308 { 51, 3, 0, "Host SPI flash size : no define size" }, 309 { 51, 3, 1, "Host SPI flash size : 2MB" }, 310 { 51, 3, 2, "Host SPI flash size : 4MB" }, 311 { 51, 3, 3, "Host SPI flash size : 8MB" }, 312 { 51, 3, 4, "Host SPI flash size : 16MB" }, 313 { 51, 3, 5, "Host SPI flash size : 32MB" }, 314 { 51, 3, 6, "Host SPI flash size : 64MB" }, 315 { 51, 3, 7, "Host SPI flash size : 128MB" }, 316 { 54, 1, 0, "Disable boot SPI auxiliary control pins" }, 317 { 54, 1, 1, "Enable boot SPI auxiliary control pins" }, 318 { 55, 2, 0, "Boot SPI CRTM size : disable CRTM" }, 319 { 55, 2, 1, "Boot SPI CRTM size : 256KB" }, 320 { 55, 2, 2, "Boot SPI CRTM size : 512KB" }, 321 { 55, 2, 3, "Boot SPI CRTM size : 1MB" }, 322 { 57, 2, 0, "Host SPI CRTM size : disable CRTM" }, 323 { 57, 2, 1, "Host SPI CRTM size : 256KB" }, 324 { 57, 2, 2, "Host SPI CRTM size : 512KB" }, 325 { 57, 2, 3, "Host SPI CRTM size : 1MB" }, 326 { 59, 1, 0, "Disable host SPI auxiliary control pins" }, 327 { 59, 1, 1, "Enable host SPI auxiliary control pins" }, 328 { 60, 1, 0, "Disable GPIO pass through" }, 329 { 60, 1, 1, "Enable GPIO pass through" }, 330 { 61, 1, 0, "Enable low security secure boot key" }, 331 { 61, 1, 1, "Disable low security secure boot key" }, 332 { 62, 1, 0, "Disable dedicate GPIO strap pins" }, 333 { 62, 1, 1, "Enable dedicate GPIO strap pins" }, 334 { 63, 1, OTP_REG_RESERVED, "" } 335 }; 336 337 static const struct otpconf_info a0_conf_info[] = { 338 { 0, 0, 1, 0, "Enable Secure Region programming" }, 339 { 0, 0, 1, 1, "Disable Secure Region programming" }, 340 { 0, 1, 1, 0, "Disable Secure Boot" }, 341 { 0, 1, 1, 1, "Enable Secure Boot" }, 342 { 0, 2, 1, 0, "Initialization programming not done" }, 343 { 0, 2, 1, 1, "Initialization programming done" }, 344 { 0, 3, 1, 0, "User region ECC disable" }, 345 { 0, 3, 1, 1, "User region ECC enable" }, 346 { 0, 4, 1, 0, "Secure Region ECC disable" }, 347 { 0, 4, 1, 1, "Secure Region ECC enable" }, 348 { 0, 5, 1, 0, "Enable low security key" }, 349 { 0, 5, 1, 1, "Disable low security key" }, 350 { 0, 6, 1, 0, "Do not ignore Secure Boot hardware strap" }, 351 { 0, 6, 1, 1, "Ignore Secure Boot hardware strap" }, 352 { 0, 7, 1, 0, "Secure Boot Mode: 1" }, 353 { 0, 7, 1, 1, "Secure Boot Mode: 2" }, 354 { 0, 8, 2, 0, "Single cell mode (recommended)" }, 355 { 0, 8, 2, 1, "Differential mode" }, 356 { 0, 8, 2, 2, "Differential-redundant mode" }, 357 { 0, 10, 2, 0, "RSA mode : RSA1024" }, 358 { 0, 10, 2, 1, "RSA mode : RSA2048" }, 359 { 0, 10, 2, 2, "RSA mode : RSA3072" }, 360 { 0, 10, 2, 3, "RSA mode : RSA4096" }, 361 { 0, 12, 2, 0, "SHA mode : SHA224" }, 362 { 0, 12, 2, 1, "SHA mode : SHA256" }, 363 { 0, 12, 2, 2, "SHA mode : SHA384" }, 364 { 0, 12, 2, 3, "SHA mode : SHA512" }, 365 { 0, 14, 2, OTP_REG_RESERVED, "" }, 366 { 0, 16, 6, OTP_REG_VALUE, "Secure Region size (DW): 0x%x" }, 367 { 0, 22, 1, 0, "Secure Region : Writable" }, 368 { 0, 22, 1, 1, "Secure Region : Write Protect" }, 369 { 0, 23, 1, 0, "User Region : Writable" }, 370 { 0, 23, 1, 1, "User Region : Write Protect" }, 371 { 0, 24, 1, 0, "Configure Region : Writable" }, 372 { 0, 24, 1, 1, "Configure Region : Write Protect" }, 373 { 0, 25, 1, 0, "OTP strap Region : Writable" }, 374 { 0, 25, 1, 1, "OTP strap Region : Write Protect" }, 375 { 0, 26, 1, 0, "Disable Copy Boot Image to Internal SRAM" }, 376 { 0, 26, 1, 1, "Copy Boot Image to Internal SRAM" }, 377 { 0, 27, 1, 0, "Disable image encryption" }, 378 { 0, 27, 1, 1, "Enable image encryption" }, 379 { 0, 28, 1, OTP_REG_RESERVED, "" }, 380 { 0, 29, 1, 0, "OTP key retire Region : Writable" }, 381 { 0, 29, 1, 1, "OTP key retire Region : Write Protect" }, 382 { 0, 30, 1, 0, "Data region redundancy repair disable" }, 383 { 0, 30, 1, 1, "Data region redundancy repair enable" }, 384 { 0, 31, 1, 0, "OTP memory lock disable" }, 385 { 0, 31, 1, 1, "OTP memory lock enable" }, 386 { 2, 0, 16, OTP_REG_VALUE, "Vender ID : 0x%x" }, 387 { 2, 16, 16, OTP_REG_VALUE, "Key Revision : 0x%x" }, 388 { 3, 0, 16, OTP_REG_VALUE, "Secure boot header offset : 0x%x" }, 389 { 4, 0, 8, OTP_REG_VALID_BIT, "Keys valid : %s" }, 390 { 4, 16, 8, OTP_REG_VALID_BIT, "Keys retire : %s" }, 391 { 5, 0, 32, OTP_REG_VALUE, "User define data, random number low : 0x%x" }, 392 { 6, 0, 32, OTP_REG_VALUE, "User define data, random number high : 0x%x" }, 393 { 7, 0, 1, 0, "Force enable PCI bus to AHB bus bridge" }, 394 { 7, 0, 1, 1, "Force disable PCI bus to AHB bus bridge" }, 395 { 7, 1, 1, 0, "Force enable UART5 debug port function" }, 396 { 7, 1, 1, 1, "Force disable UART5 debug port function" }, 397 { 7, 2, 1, 0, "Force enable XDMA function" }, 398 { 7, 2, 1, 1, "Force disable XDMA function" }, 399 { 7, 3, 1, 0, "Force enable APB to PCIE device bridge" }, 400 { 7, 3, 1, 1, "Force disable APB to PCIE device bridge" }, 401 { 7, 4, 1, 0, "Force enable APB to PCIE bridge config access" }, 402 { 7, 4, 1, 1, "Force disable APB to PCIE bridge config access" }, 403 { 7, 5, 1, 0, "Force enable PCIE bus trace buffer" }, 404 { 7, 5, 1, 1, "Force disable PCIE bus trace buffer" }, 405 { 7, 6, 1, 0, "Force enable the capability for PCIE device port as a Root Complex" }, 406 { 7, 6, 1, 1, "Force disable the capability for PCIE device port as a Root Complex" }, 407 { 7, 16, 1, 0, "Force enable ESPI bus to AHB bus bridge" }, 408 { 7, 16, 1, 1, "Force disable ESPI bus to AHB bus bridge" }, 409 { 7, 17, 1, 0, "Force enable LPC bus to AHB bus bridge1" }, 410 { 7, 17, 1, 1, "Force disable LPC bus to AHB bus bridge1" }, 411 { 7, 18, 1, 0, "Force enable LPC bus to AHB bus bridge2" }, 412 { 7, 18, 1, 1, "Force disable LPC bus to AHB bus bridge2" }, 413 { 7, 19, 1, 0, "Force enable UART1 debug port function" }, 414 { 7, 19, 1, 1, "Force disable UART1 debug port function" }, 415 { 7, 31, 1, 0, "Disable chip security setting" }, 416 { 7, 31, 1, 1, "Enable chip security setting" }, 417 { 8, 0, 32, OTP_REG_VALUE, "Redundancy Repair : 0x%x" }, 418 { 10, 0, 32, OTP_REG_VALUE, "Manifest ID low : 0x%x" }, 419 { 11, 0, 32, OTP_REG_VALUE, "Manifest ID high : 0x%x" } 420 }; 421 422 static const struct otpconf_info a1_conf_info[] = { 423 { 0, 0, 1, OTP_REG_RESERVED, "" }, 424 { 0, 1, 1, 0, "Disable Secure Boot" }, 425 { 0, 1, 1, 1, "Enable Secure Boot" }, 426 { 0, 2, 1, 0, "Initialization programming not done" }, 427 { 0, 2, 1, 1, "Initialization programming done" }, 428 { 0, 3, 1, 0, "User region ECC disable" }, 429 { 0, 3, 1, 1, "User region ECC enable" }, 430 { 0, 4, 1, 0, "Secure Region ECC disable" }, 431 { 0, 4, 1, 1, "Secure Region ECC enable" }, 432 { 0, 5, 1, 0, "Enable low security key" }, 433 { 0, 5, 1, 1, "Disable low security key" }, 434 { 0, 6, 1, 0, "Do not ignore Secure Boot hardware strap" }, 435 { 0, 6, 1, 1, "Ignore Secure Boot hardware strap" }, 436 { 0, 7, 1, 0, "Secure Boot Mode: GCM" }, 437 { 0, 7, 1, 1, "Secure Boot Mode: 2" }, 438 { 0, 8, 2, 0, "Single cell mode (recommended)" }, 439 { 0, 8, 2, 1, "Differential mode" }, 440 { 0, 8, 2, 2, "Differential-redundant mode" }, 441 { 0, 10, 2, 0, "RSA mode : RSA1024" }, 442 { 0, 10, 2, 1, "RSA mode : RSA2048" }, 443 { 0, 10, 2, 2, "RSA mode : RSA3072" }, 444 { 0, 10, 2, 3, "RSA mode : RSA4096" }, 445 { 0, 12, 2, 0, "SHA mode : SHA224" }, 446 { 0, 12, 2, 1, "SHA mode : SHA256" }, 447 { 0, 12, 2, 2, "SHA mode : SHA384" }, 448 { 0, 12, 2, 3, "SHA mode : SHA512" }, 449 { 0, 14, 2, OTP_REG_RESERVED, "" }, 450 { 0, 16, 6, OTP_REG_VALUE, "Secure Region size (DW): 0x%x" }, 451 { 0, 22, 1, 0, "Secure Region : Writable" }, 452 { 0, 22, 1, 1, "Secure Region : Write Protect" }, 453 { 0, 23, 1, 0, "User Region : Writable" }, 454 { 0, 23, 1, 1, "User Region : Write Protect" }, 455 { 0, 24, 1, 0, "Configure Region : Writable" }, 456 { 0, 24, 1, 1, "Configure Region : Write Protect" }, 457 { 0, 25, 1, 0, "OTP strap Region : Writable" }, 458 { 0, 25, 1, 1, "OTP strap Region : Write Protect" }, 459 { 0, 26, 1, 0, "Disable Copy Boot Image to Internal SRAM" }, 460 { 0, 26, 1, 1, "Copy Boot Image to Internal SRAM" }, 461 { 0, 27, 1, 0, "Disable image encryption" }, 462 { 0, 27, 1, 1, "Enable image encryption" }, 463 { 0, 28, 1, OTP_REG_RESERVED, "" }, 464 { 0, 29, 1, 0, "OTP key retire Region : Writable" }, 465 { 0, 29, 1, 1, "OTP key retire Region : Write Protect" }, 466 { 0, 30, 1, 0, "Data region redundancy repair disable" }, 467 { 0, 30, 1, 1, "Data region redundancy repair enable" }, 468 { 0, 31, 1, 0, "OTP memory lock disable" }, 469 { 0, 31, 1, 1, "OTP memory lock enable" }, 470 { 2, 0, 16, OTP_REG_VALUE, "Vender ID : 0x%x" }, 471 { 2, 16, 16, OTP_REG_VALUE, "Key Revision : 0x%x" }, 472 { 3, 0, 16, OTP_REG_VALUE, "Secure boot header offset : 0x%x" }, 473 { 4, 0, 8, OTP_REG_VALID_BIT, "Keys valid : %s" }, 474 { 4, 16, 8, OTP_REG_VALID_BIT, "Keys retire : %s" }, 475 { 5, 0, 32, OTP_REG_VALUE, "User define data, random number low : 0x%x" }, 476 { 6, 0, 32, OTP_REG_VALUE, "User define data, random number high : 0x%x" }, 477 { 7, 0, 1, 0, "Force enable PCI bus to AHB bus bridge" }, 478 { 7, 0, 1, 1, "Force disable PCI bus to AHB bus bridge" }, 479 { 7, 1, 1, 0, "Force enable UART5 debug port function" }, 480 { 7, 1, 1, 1, "Force disable UART5 debug port function" }, 481 { 7, 2, 1, 0, "Force enable XDMA function" }, 482 { 7, 2, 1, 1, "Force disable XDMA function" }, 483 { 7, 3, 1, 0, "Force enable APB to PCIE device bridge" }, 484 { 7, 3, 1, 1, "Force disable APB to PCIE device bridge" }, 485 { 7, 4, 1, 0, "Force enable APB to PCIE bridge config access" }, 486 { 7, 4, 1, 1, "Force disable APB to PCIE bridge config access" }, 487 { 7, 5, 1, 0, "Force enable PCIE bus trace buffer" }, 488 { 7, 5, 1, 1, "Force disable PCIE bus trace buffer" }, 489 { 7, 6, 1, 0, "Force enable the capability for PCIE device port as a Root Complex" }, 490 { 7, 6, 1, 1, "Force disable the capability for PCIE device port as a Root Complex" }, 491 { 7, 16, 1, 0, "Force enable ESPI bus to AHB bus bridge" }, 492 { 7, 16, 1, 1, "Force disable ESPI bus to AHB bus bridge" }, 493 { 7, 17, 1, 0, "Force enable LPC bus to AHB bus bridge1" }, 494 { 7, 17, 1, 1, "Force disable LPC bus to AHB bus bridge1" }, 495 { 7, 18, 1, 0, "Force enable LPC bus to AHB bus bridge2" }, 496 { 7, 18, 1, 1, "Force disable LPC bus to AHB bus bridge2" }, 497 { 7, 19, 1, 0, "Force enable UART1 debug port function" }, 498 { 7, 19, 1, 1, "Force disable UART1 debug port function" }, 499 { 7, 31, 1, 0, "Disable chip security setting" }, 500 { 7, 31, 1, 1, "Enable chip security setting" }, 501 { 8, 0, 32, OTP_REG_VALUE, "Redundancy Repair : 0x%x" }, 502 { 10, 0, 32, OTP_REG_VALUE, "Manifest ID low : 0x%x" }, 503 { 11, 0, 32, OTP_REG_VALUE, "Manifest ID high : 0x%x" } 504 }; 505 506 static const struct otpkey_type a0_key_type[] = { 507 {0, OTP_KEY_TYPE_AES, 0, "AES-256 as OEM platform key for image encryption/decryption"}, 508 {1, OTP_KEY_TYPE_VAULT, 0, "AES-256 as secret vault key"}, 509 {4, OTP_KEY_TYPE_HMAC, 1, "HMAC as encrypted OEM HMAC keys in Mode 1"}, 510 {8, OTP_KEY_TYPE_RSA, 1, "RSA-public as OEM DSS public keys in Mode 2"}, 511 {9, OTP_KEY_TYPE_RSA, 0, "RSA-public as SOC public key"}, 512 {10, OTP_KEY_TYPE_RSA, 0, "RSA-public as AES key decryption key"}, 513 {13, OTP_KEY_TYPE_RSA, 0, "RSA-private as SOC private key"}, 514 {14, OTP_KEY_TYPE_RSA, 0, "RSA-private as AES key decryption key"}, 515 }; 516 517 static const struct otpkey_type a1_key_type[] = { 518 {1, OTP_KEY_TYPE_VAULT, 0, "AES-256 as secret vault key"}, 519 {2, OTP_KEY_TYPE_AES, 1, "AES-256 as OEM platform key for image encryption/decryption in Mode 2 or AES-256 as OEM DSS keys for Mode GCM"}, 520 {8, OTP_KEY_TYPE_RSA, 1, "RSA-public as OEM DSS public keys in Mode 2"}, 521 {10, OTP_KEY_TYPE_RSA, 0, "RSA-public as AES key decryption key"}, 522 {14, OTP_KEY_TYPE_RSA, 0, "RSA-private as AES key decryption key"}, 523 }; 524 525 static uint32_t chip_version(void) 526 { 527 uint32_t rev_id; 528 529 rev_id = (readl(0x1e6e2004) >> 16) & 0xff ; 530 531 return rev_id; 532 } 533 534 static void wait_complete(void) 535 { 536 int reg; 537 538 do { 539 reg = readl(OTP_STATUS); 540 } while ((reg & 0x6) != 0x6); 541 } 542 543 static void otp_read_data(uint32_t offset, uint32_t *data) 544 { 545 writel(offset, OTP_ADDR); //Read address 546 writel(0x23b1e361, OTP_COMMAND); //trigger read 547 wait_complete(); 548 data[0] = readl(OTP_COMPARE_1); 549 data[1] = readl(OTP_COMPARE_2); 550 } 551 552 static void otp_read_config(uint32_t offset, uint32_t *data) 553 { 554 int config_offset; 555 556 config_offset = 0x800; 557 config_offset |= (offset / 8) * 0x200; 558 config_offset |= (offset % 8) * 0x2; 559 560 writel(config_offset, OTP_ADDR); //Read address 561 writel(0x23b1e361, OTP_COMMAND); //trigger read 562 wait_complete(); 563 data[0] = readl(OTP_COMPARE_1); 564 } 565 566 static int otp_print_config(uint32_t offset, int dw_count) 567 { 568 int i; 569 uint32_t ret[1]; 570 571 if (offset + dw_count > 32) 572 return OTP_USAGE; 573 for (i = offset; i < offset + dw_count; i ++) { 574 otp_read_config(i, ret); 575 printf("OTPCFG%X: %08X\n", i, ret[0]); 576 } 577 printf("\n"); 578 return OTP_SUCCESS; 579 } 580 581 static int otp_print_data(uint32_t offset, int dw_count) 582 { 583 int i; 584 uint32_t ret[2]; 585 586 if (offset + dw_count > 2048 || offset % 4 != 0) 587 return OTP_USAGE; 588 for (i = offset; i < offset + dw_count; i += 2) { 589 otp_read_data(i, ret); 590 if (i % 4 == 0) 591 printf("%03X: %08X %08X ", i * 4, ret[0], ret[1]); 592 else 593 printf("%08X %08X\n", ret[0], ret[1]); 594 595 } 596 printf("\n"); 597 return OTP_SUCCESS; 598 } 599 600 static int otp_compare(uint32_t otp_addr, uint32_t addr) 601 { 602 uint32_t ret; 603 uint32_t *buf; 604 605 buf = map_physmem(addr, 16, MAP_WRBACK); 606 printf("%08X\n", buf[0]); 607 printf("%08X\n", buf[1]); 608 printf("%08X\n", buf[2]); 609 printf("%08X\n", buf[3]); 610 writel(otp_addr, OTP_ADDR); //Compare address 611 writel(buf[0], OTP_COMPARE_1); //Compare data 1 612 writel(buf[1], OTP_COMPARE_2); //Compare data 2 613 writel(buf[2], OTP_COMPARE_3); //Compare data 3 614 writel(buf[3], OTP_COMPARE_4); //Compare data 4 615 writel(0x23b1e363, OTP_COMMAND); //Compare command 616 wait_complete(); 617 ret = readl(OTP_STATUS); //Compare command 618 if (ret & 0x1) 619 return 0; 620 else 621 return -1; 622 } 623 624 static void otp_write(uint32_t otp_addr, uint32_t data) 625 { 626 writel(otp_addr, OTP_ADDR); //write address 627 writel(data, OTP_COMPARE_1); //write data 628 writel(0x23b1e362, OTP_COMMAND); //write command 629 wait_complete(); 630 } 631 632 static void otp_prog(uint32_t otp_addr, uint32_t prog_bit) 633 { 634 writel(otp_addr, OTP_ADDR); //write address 635 writel(prog_bit, OTP_COMPARE_1); //write data 636 writel(0x23b1e364, OTP_COMMAND); //write command 637 wait_complete(); 638 } 639 640 static int verify_bit(uint32_t otp_addr, int bit_offset, int value) 641 { 642 uint32_t ret[2]; 643 644 if (otp_addr % 2 == 0) 645 writel(otp_addr, OTP_ADDR); //Read address 646 else 647 writel(otp_addr - 1, OTP_ADDR); //Read address 648 649 writel(0x23b1e361, OTP_COMMAND); //trigger read 650 wait_complete(); 651 ret[0] = readl(OTP_COMPARE_1); 652 ret[1] = readl(OTP_COMPARE_2); 653 // printf("verify_bit = %x\n", ret); 654 if (otp_addr % 2 == 0) { 655 if (((ret[0] >> bit_offset) & 1) == value) 656 return 0; 657 else 658 return -1; 659 } else { 660 if (((ret[1] >> bit_offset) & 1) == value) 661 return 0; 662 else 663 return -1; 664 } 665 666 } 667 668 static uint32_t verify_dw(uint32_t otp_addr, uint32_t *value, uint32_t *keep, uint32_t *compare, int size) 669 { 670 uint32_t ret[2]; 671 672 otp_addr &= ~(1 << 15); 673 674 if (otp_addr % 2 == 0) 675 writel(otp_addr, OTP_ADDR); //Read address 676 else 677 writel(otp_addr - 1, OTP_ADDR); //Read address 678 writel(0x23b1e361, OTP_COMMAND); //trigger read 679 wait_complete(); 680 ret[0] = readl(OTP_COMPARE_1); 681 ret[1] = readl(OTP_COMPARE_2); 682 if (size == 1) { 683 if (otp_addr % 2 == 0) { 684 // printf("check %x : %x = %x\n", otp_addr, ret[0], value[0]); 685 if ((value[0] & ~keep[0]) == (ret[0] & ~keep[0])) { 686 compare[0] = 0; 687 return 0; 688 } else { 689 compare[0] = value[0] ^ ret[0]; 690 return -1; 691 } 692 693 } else { 694 // printf("check %x : %x = %x\n", otp_addr, ret[1], value[0]); 695 if ((value[0] & ~keep[0]) == (ret[1] & ~keep[0])) { 696 compare[0] = ~0; 697 return 0; 698 } else { 699 compare[0] = ~(value[0] ^ ret[1]); 700 return -1; 701 } 702 } 703 } else if (size == 2) { 704 // otp_addr should be even 705 if ((value[0] & ~keep[0]) == (ret[0] & ~keep[0]) && (value[1] & ~keep[1]) == (ret[1] & ~keep[1])) { 706 // printf("check[0] %x : %x = %x\n", otp_addr, ret[0], value[0]); 707 // printf("check[1] %x : %x = %x\n", otp_addr, ret[1], value[1]); 708 compare[0] = 0; 709 compare[1] = ~0; 710 return 0; 711 } else { 712 // printf("check[0] %x : %x = %x\n", otp_addr, ret[0], value[0]); 713 // printf("check[1] %x : %x = %x\n", otp_addr, ret[1], value[1]); 714 compare[0] = value[0] ^ ret[0]; 715 compare[1] = ~(value[1] ^ ret[1]); 716 return -1; 717 } 718 } else { 719 return -1; 720 } 721 } 722 723 static void otp_soak(int soak) 724 { 725 switch (soak) { 726 case 0: //default 727 otp_write(0x3000, 0x0); // Write MRA 728 otp_write(0x5000, 0x0); // Write MRB 729 otp_write(0x1000, 0x0); // Write MR 730 break; 731 case 1: //normal program 732 otp_write(0x3000, 0x4021); // Write MRA 733 otp_write(0x5000, 0x302f); // Write MRB 734 otp_write(0x1000, 0x4020); // Write MR 735 writel(0x04190760, OTP_TIMING); 736 break; 737 case 2: //soak program 738 otp_write(0x3000, 0x4021); // Write MRA 739 otp_write(0x5000, 0x1027); // Write MRB 740 otp_write(0x1000, 0x4820); // Write MR 741 writel(0x041930d4, OTP_TIMING); 742 break; 743 } 744 745 wait_complete(); 746 } 747 748 static void otp_prog_dw(uint32_t value, uint32_t keep, uint32_t prog_address) 749 { 750 int j, bit_value, prog_bit; 751 752 for (j = 0; j < 32; j++) { 753 if ((keep >> j) & 0x1) 754 continue; 755 bit_value = (value >> j) & 0x1; 756 if (prog_address % 2 == 0) { 757 if (bit_value) 758 prog_bit = ~(0x1 << j); 759 else 760 continue; 761 } else { 762 prog_address |= 1 << 15; 763 if (bit_value) 764 continue; 765 else 766 prog_bit = 0x1 << j; 767 } 768 otp_prog(prog_address, prog_bit); 769 } 770 } 771 772 773 static void otp_strap_status(struct otpstrap_status *otpstrap) 774 { 775 uint32_t OTPSTRAP_RAW[2]; 776 int i, j; 777 778 for (j = 0; j < 64; j++) { 779 otpstrap[j].value = 0; 780 otpstrap[j].remain_times = 7; 781 otpstrap[j].writeable_option = -1; 782 otpstrap[j].protected = 0; 783 } 784 785 for (i = 16; i < 30; i += 2) { 786 int option = (i - 16) / 2; 787 otp_read_config(i, &OTPSTRAP_RAW[0]); 788 otp_read_config(i + 1, &OTPSTRAP_RAW[1]); 789 for (j = 0; j < 32; j++) { 790 char bit_value = ((OTPSTRAP_RAW[0] >> j) & 0x1); 791 if ((bit_value == 0) && (otpstrap[j].writeable_option == -1)) { 792 otpstrap[j].writeable_option = option; 793 } 794 if (bit_value == 1) 795 otpstrap[j].remain_times --; 796 otpstrap[j].value ^= bit_value; 797 otpstrap[j].option_array[option] = bit_value; 798 } 799 for (j = 32; j < 64; j++) { 800 char bit_value = ((OTPSTRAP_RAW[1] >> (j - 32)) & 0x1); 801 if ((bit_value == 0) && (otpstrap[j].writeable_option == -1)) { 802 otpstrap[j].writeable_option = option; 803 } 804 if (bit_value == 1) 805 otpstrap[j].remain_times --; 806 otpstrap[j].value ^= bit_value; 807 otpstrap[j].option_array[option] = bit_value; 808 } 809 } 810 otp_read_config(30, &OTPSTRAP_RAW[0]); 811 otp_read_config(31, &OTPSTRAP_RAW[1]); 812 for (j = 0; j < 32; j++) { 813 if (((OTPSTRAP_RAW[0] >> j) & 0x1) == 1) 814 otpstrap[j].protected = 1; 815 } 816 for (j = 32; j < 64; j++) { 817 if (((OTPSTRAP_RAW[1] >> (j - 32)) & 0x1) == 1) 818 otpstrap[j].protected = 1; 819 } 820 } 821 822 static int otp_print_conf_image(uint32_t *OTPCFG) 823 { 824 const struct otpconf_info *conf_info = info_cb.conf_info; 825 uint32_t *OTPCFG_KEEP = &OTPCFG[12]; 826 uint32_t mask; 827 uint32_t dw_offset; 828 uint32_t bit_offset; 829 uint32_t otp_value; 830 uint32_t otp_keep; 831 int fail = 0; 832 char valid_bit[20]; 833 int i; 834 int j; 835 836 printf("DW BIT Value Description\n"); 837 printf("__________________________________________________________________________\n"); 838 for (i = 0; i < info_cb.conf_info_len; i++) { 839 dw_offset = conf_info[i].dw_offset; 840 bit_offset = conf_info[i].bit_offset; 841 mask = BIT(conf_info[i].length) - 1; 842 otp_value = (OTPCFG[dw_offset] >> bit_offset) & mask; 843 otp_keep = (OTPCFG_KEEP[dw_offset] >> bit_offset) & mask; 844 845 if (otp_keep == mask) { 846 continue; 847 } else if (otp_keep != 0) { 848 fail = 1; 849 } 850 851 if ((otp_value != conf_info[i].value) && 852 conf_info[i].value != OTP_REG_RESERVED && 853 conf_info[i].value != OTP_REG_VALUE && 854 conf_info[i].value != OTP_REG_VALID_BIT) 855 continue; 856 printf("0x%-4X", dw_offset); 857 858 if (conf_info[i].length == 1) { 859 printf("0x%-9X", conf_info[i].bit_offset); 860 } else { 861 printf("0x%-2X:0x%-4X", 862 conf_info[i].bit_offset + conf_info[i].length - 1, 863 conf_info[i].bit_offset); 864 } 865 printf("0x%-10x", otp_value); 866 867 if (fail) { 868 printf("Keep mask error\n"); 869 } else { 870 if (conf_info[i].value == OTP_REG_RESERVED) { 871 printf("Reserved\n"); 872 } else if (conf_info[i].value == OTP_REG_VALUE) { 873 printf(conf_info[i].information, otp_value); 874 printf("\n"); 875 } else if (conf_info[i].value == OTP_REG_VALID_BIT) { 876 if (otp_value != 0) { 877 for (j = 0; j < 7; j++) { 878 if (otp_value == (1 << j)) { 879 valid_bit[j * 2] = '1'; 880 } else { 881 valid_bit[j * 2] = '0'; 882 } 883 valid_bit[j * 2 + 1] = ' '; 884 } 885 valid_bit[15] = 0; 886 } else { 887 strcpy(valid_bit, "0 0 0 0 0 0 0 0\0"); 888 } 889 printf(conf_info[i].information, valid_bit); 890 printf("\n"); 891 } else { 892 printf("%s\n", conf_info[i].information); 893 } 894 } 895 } 896 897 if (fail) 898 return OTP_FAILURE; 899 900 return OTP_SUCCESS; 901 } 902 903 static int otp_print_conf_info(int input_offset) 904 { 905 const struct otpconf_info *conf_info = info_cb.conf_info; 906 uint32_t OTPCFG[12]; 907 uint32_t mask; 908 uint32_t dw_offset; 909 uint32_t bit_offset; 910 uint32_t otp_value; 911 char valid_bit[20]; 912 int i; 913 int j; 914 915 for (i = 0; i < 12; i++) 916 otp_read_config(i, &OTPCFG[i]); 917 918 919 printf("DW BIT Value Description\n"); 920 printf("__________________________________________________________________________\n"); 921 for (i = 0; i < info_cb.conf_info_len; i++) { 922 if (input_offset != -1 && input_offset != conf_info[i].dw_offset) 923 continue; 924 dw_offset = conf_info[i].dw_offset; 925 bit_offset = conf_info[i].bit_offset; 926 mask = BIT(conf_info[i].length) - 1; 927 otp_value = (OTPCFG[dw_offset] >> bit_offset) & mask; 928 929 if ((otp_value != conf_info[i].value) && 930 conf_info[i].value != OTP_REG_RESERVED && 931 conf_info[i].value != OTP_REG_VALUE && 932 conf_info[i].value != OTP_REG_VALID_BIT) 933 continue; 934 printf("0x%-4X", dw_offset); 935 936 if (conf_info[i].length == 1) { 937 printf("0x%-9X", conf_info[i].bit_offset); 938 } else { 939 printf("0x%-2X:0x%-4X", 940 conf_info[i].bit_offset + conf_info[i].length - 1, 941 conf_info[i].bit_offset); 942 } 943 printf("0x%-10x", otp_value); 944 945 if (conf_info[i].value == OTP_REG_RESERVED) { 946 printf("Reserved\n"); 947 } else if (conf_info[i].value == OTP_REG_VALUE) { 948 printf(conf_info[i].information, otp_value); 949 printf("\n"); 950 } else if (conf_info[i].value == OTP_REG_VALID_BIT) { 951 if (otp_value != 0) { 952 for (j = 0; j < 7; j++) { 953 if (otp_value == (1 << j)) { 954 valid_bit[j * 2] = '1'; 955 } else { 956 valid_bit[j * 2] = '0'; 957 } 958 valid_bit[j * 2 + 1] = ' '; 959 } 960 valid_bit[15] = 0; 961 } else { 962 strcpy(valid_bit, "0 0 0 0 0 0 0 0\0"); 963 } 964 printf(conf_info[i].information, valid_bit); 965 printf("\n"); 966 } else { 967 printf("%s\n", conf_info[i].information); 968 } 969 } 970 return OTP_SUCCESS; 971 } 972 973 static int otp_print_strap_image(uint32_t *OTPSTRAP) 974 { 975 const struct otpstrap_info *strap_info = info_cb.strap_info; 976 uint32_t *OTPSTRAP_PRO = &OTPSTRAP[4]; 977 uint32_t *OTPSTRAP_KEEP = &OTPSTRAP[2]; 978 int i; 979 int fail = 0; 980 uint32_t bit_offset; 981 uint32_t dw_offset; 982 uint32_t mask; 983 uint32_t otp_value; 984 uint32_t otp_protect; 985 uint32_t otp_keep; 986 987 printf("BIT(hex) Value Protect Description\n"); 988 printf("__________________________________________________________________________________________\n"); 989 990 for (i = 0; i < info_cb.strap_info_len; i++) { 991 if (strap_info[i].bit_offset > 32) { 992 dw_offset = 1; 993 bit_offset = strap_info[i].bit_offset - 32; 994 } else { 995 dw_offset = 0; 996 bit_offset = strap_info[i].bit_offset; 997 } 998 999 mask = BIT(strap_info[i].length) - 1; 1000 otp_value = (OTPSTRAP[dw_offset] >> bit_offset) & mask; 1001 otp_protect = (OTPSTRAP_PRO[dw_offset] >> bit_offset) & mask; 1002 otp_keep = (OTPSTRAP_KEEP[dw_offset] >> bit_offset) & mask; 1003 1004 if (otp_keep == mask) { 1005 continue; 1006 } else if (otp_keep != 0) { 1007 fail = 1; 1008 } 1009 1010 if ((otp_value != strap_info[i].value) && 1011 strap_info[i].value != OTP_REG_RESERVED) 1012 continue; 1013 1014 if (strap_info[i].length == 1) { 1015 printf("0x%-9X", strap_info[i].bit_offset); 1016 } else { 1017 printf("0x%-2X:0x%-4X", 1018 strap_info[i].bit_offset + strap_info[i].length - 1, 1019 strap_info[i].bit_offset); 1020 } 1021 printf("0x%-10x", otp_value); 1022 printf("0x%-10x", otp_protect); 1023 1024 if (fail) { 1025 printf("Keep mask error\n"); 1026 } else { 1027 if (strap_info[i].value != OTP_REG_RESERVED) 1028 printf("%s\n", strap_info[i].information); 1029 else 1030 printf("Reserved\n"); 1031 } 1032 } 1033 1034 if (fail) 1035 return OTP_FAILURE; 1036 1037 return OTP_SUCCESS; 1038 } 1039 1040 static int otp_print_strap_info(int view) 1041 { 1042 const struct otpstrap_info *strap_info = info_cb.strap_info; 1043 struct otpstrap_status strap_status[64]; 1044 int i, j; 1045 int fail = 0; 1046 uint32_t bit_offset; 1047 uint32_t length; 1048 uint32_t otp_value; 1049 uint32_t otp_protect; 1050 1051 otp_strap_status(strap_status); 1052 1053 if (view) { 1054 // printf("BIT(hex) Value Option Protect Description\n"); 1055 // printf(" 0 1 2 3 4 5 6\n"); 1056 printf("BIT(hex) Value Remains Protect Description\n"); 1057 printf("___________________________________________________________________________________________________\n"); 1058 } else { 1059 printf("BIT(hex) Value Description\n"); 1060 printf("________________________________________________________________________________\n"); 1061 } 1062 for (i = 0; i < info_cb.strap_info_len; i++) { 1063 otp_value = 0; 1064 bit_offset = strap_info[i].bit_offset; 1065 length = strap_info[i].length; 1066 for (j = 0; j < length; j++) { 1067 otp_value |= strap_status[bit_offset + j].value << j; 1068 otp_protect |= strap_status[bit_offset + j].protected << j; 1069 } 1070 if ((otp_value != strap_info[i].value) && 1071 strap_info[i].value != OTP_REG_RESERVED) 1072 continue; 1073 if (view) { 1074 for (j = 0; j < length; j++) { 1075 printf("0x%-7X", strap_info[i].bit_offset + j); 1076 printf("0x%-5X", strap_status[bit_offset + j].value); 1077 printf("%-9d", strap_status[bit_offset + j].remain_times); 1078 printf("0x%-7X", strap_status[bit_offset].protected); 1079 if (strap_info[i].value == OTP_REG_RESERVED) { 1080 printf(" Reserved\n"); 1081 continue; 1082 } 1083 if (length == 1) { 1084 printf(" %s\n", strap_info[i].information); 1085 continue; 1086 } 1087 1088 if (j == 0) 1089 printf("/%s\n", strap_info[i].information); 1090 else if (j == length - 1) 1091 printf("\\ \"\n"); 1092 else 1093 printf("| \"\n"); 1094 } 1095 } else { 1096 if (length == 1) { 1097 printf("0x%-9X", strap_info[i].bit_offset); 1098 } else { 1099 printf("0x%-2X:0x%-4X", 1100 bit_offset + length - 1, bit_offset); 1101 } 1102 1103 printf("0x%-10X", otp_value); 1104 1105 if (strap_info[i].value != OTP_REG_RESERVED) 1106 printf("%s\n", strap_info[i].information); 1107 else 1108 printf("Reserved\n"); 1109 } 1110 } 1111 1112 if (fail) 1113 return OTP_FAILURE; 1114 1115 return OTP_SUCCESS; 1116 } 1117 1118 static void buf_print(char *buf, int len) 1119 { 1120 int i; 1121 printf(" 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F\n"); 1122 for (i = 0; i < len; i++) { 1123 if (i % 16 == 0) { 1124 printf("%04X: ", i); 1125 } 1126 printf("%02X ", buf[i]); 1127 if ((i + 1) % 16 == 0) { 1128 printf("\n"); 1129 } 1130 } 1131 } 1132 1133 static int otp_print_data_info(uint32_t *buf) 1134 { 1135 int key_id, key_offset, last, key_type, key_length, exp_length; 1136 const struct otpkey_type *key_info_array = info_cb.key_info; 1137 struct otpkey_type key_info; 1138 char *byte_buf; 1139 int i = 0, len = 0; 1140 int j; 1141 byte_buf = (char *)buf; 1142 while (1) { 1143 key_id = buf[i] & 0x7; 1144 key_offset = buf[i] & 0x1ff8; 1145 last = (buf[i] >> 13) & 1; 1146 key_type = (buf[i] >> 14) & 0xf; 1147 key_length = (buf[i] >> 18) & 0x3; 1148 exp_length = (buf[i] >> 20) & 0xfff; 1149 1150 for (j = 0; j < info_cb.key_info_len; j++) { 1151 if (key_type == key_info_array[j].value) { 1152 key_info = key_info_array[j]; 1153 break; 1154 } 1155 } 1156 1157 printf("\nKey[%d]:\n", i); 1158 printf("Key Type: "); 1159 printf("%s\n", key_info.information); 1160 1161 if (key_info.key_type == OTP_KEY_TYPE_HMAC) { 1162 printf("HMAC SHA Type: "); 1163 switch (key_length) { 1164 case 0: 1165 printf("HMAC(SHA224)\n"); 1166 break; 1167 case 1: 1168 printf("HMAC(SHA256)\n"); 1169 break; 1170 case 2: 1171 printf("HMAC(SHA384)\n"); 1172 break; 1173 case 3: 1174 printf("HMAC(SHA512)\n"); 1175 break; 1176 } 1177 } else if (key_info.key_type == OTP_KEY_TYPE_RSA) { 1178 printf("RSA SHA Type: "); 1179 switch (key_length) { 1180 case 0: 1181 printf("RSA1024\n"); 1182 len = 0x100; 1183 break; 1184 case 1: 1185 printf("RSA2048\n"); 1186 len = 0x200; 1187 break; 1188 case 2: 1189 printf("RSA3072\n"); 1190 len = 0x300; 1191 break; 1192 case 3: 1193 printf("RSA4096\n"); 1194 len = 0x400; 1195 break; 1196 } 1197 printf("RSA exponent bit length: %d\n", exp_length); 1198 } 1199 if (key_info.need_id) 1200 printf("Key Number ID: %d\n", key_id); 1201 printf("Key Value:\n"); 1202 if (key_info.key_type == OTP_KEY_TYPE_HMAC) { 1203 buf_print(&byte_buf[key_offset], 0x40); 1204 } else if (key_info.key_type == OTP_KEY_TYPE_AES) { 1205 printf("AES Key:\n"); 1206 buf_print(&byte_buf[key_offset], 0x20); 1207 if (info_cb.version == 0) { 1208 printf("AES IV:\n"); 1209 buf_print(&byte_buf[key_offset + 0x20], 0x10); 1210 } 1211 1212 } else if (key_info.key_type == OTP_KEY_TYPE_VAULT) { 1213 if (info_cb.version == 0) { 1214 printf("AES Key:\n"); 1215 buf_print(&byte_buf[key_offset], 0x20); 1216 printf("AES IV:\n"); 1217 buf_print(&byte_buf[key_offset + 0x20], 0x10); 1218 } else if (info_cb.version == 1) { 1219 printf("AES Key 1:\n"); 1220 buf_print(&byte_buf[key_offset], 0x20); 1221 printf("AES Key 2:\n"); 1222 buf_print(&byte_buf[key_offset + 0x20], 0x20); 1223 } 1224 1225 } else if (key_info.key_type == OTP_KEY_TYPE_RSA) { 1226 printf("RSA mod:\n"); 1227 buf_print(&byte_buf[key_offset], len / 2); 1228 printf("RSA exp:\n"); 1229 buf_print(&byte_buf[key_offset + (len / 2)], len / 2); 1230 } 1231 if (last) 1232 break; 1233 i++; 1234 } 1235 return 0; 1236 } 1237 1238 static int otp_prog_conf(uint32_t *buf) 1239 { 1240 int i, k; 1241 int pass = 0; 1242 uint32_t prog_address; 1243 uint32_t data[12]; 1244 uint32_t compare[2]; 1245 uint32_t *buf_keep = &buf[12]; 1246 uint32_t data_masked; 1247 uint32_t buf_masked; 1248 1249 printf("Read OTP Config Region:\n"); 1250 1251 for (i = 0; i < 12 ; i ++) { 1252 prog_address = 0x800; 1253 prog_address |= (i / 8) * 0x200; 1254 prog_address |= (i % 8) * 0x2; 1255 otp_read_data(prog_address, &data[i]); 1256 } 1257 1258 printf("Check writable...\n"); 1259 for (i = 0; i < 12; i++) { 1260 data_masked = data[i] & ~buf_keep[i]; 1261 buf_masked = buf[i] & ~buf_keep[i]; 1262 if (data_masked == buf_masked) 1263 continue; 1264 if ((data_masked | buf_masked) == buf_masked) { 1265 continue; 1266 } else { 1267 printf("Input image can't program into OTP, please check.\n"); 1268 printf("OTPCFG[%X] = %x\n", i, data[i]); 1269 printf("Input [%X] = %x\n", i, buf[i]); 1270 printf("Mask [%X] = %x\n", i, ~buf_keep[i]); 1271 return OTP_FAILURE; 1272 } 1273 } 1274 1275 printf("Start Programing...\n"); 1276 otp_soak(0); 1277 for (i = 0; i < 12; i++) { 1278 data_masked = data[i] & ~buf_keep[i]; 1279 buf_masked = buf[i] & ~buf_keep[i]; 1280 prog_address = 0x800; 1281 prog_address |= (i / 8) * 0x200; 1282 prog_address |= (i % 8) * 0x2; 1283 if (data_masked == buf_masked) 1284 continue; 1285 1286 1287 otp_soak(1); 1288 otp_prog_dw(buf[i], buf_keep[i], prog_address); 1289 1290 pass = 0; 1291 for (k = 0; k < RETRY; k++) { 1292 if (verify_dw(prog_address, &buf[i], &buf_keep[i], compare, 1) != 0) { 1293 otp_soak(2); 1294 otp_prog_dw(compare[0], prog_address, 1); 1295 if (verify_dw(prog_address, &buf[i], &buf_keep[i], compare, 1) != 0) { 1296 otp_soak(1); 1297 } else { 1298 pass = 1; 1299 break; 1300 } 1301 } else { 1302 pass = 1; 1303 break; 1304 } 1305 } 1306 } 1307 1308 otp_soak(0); 1309 if (!pass) 1310 return OTP_FAILURE; 1311 1312 return OTP_SUCCESS; 1313 1314 } 1315 1316 1317 static int otp_strap_image_confirm(uint32_t *buf) 1318 { 1319 int i; 1320 uint32_t *strap_keep = buf + 2; 1321 uint32_t *strap_protect = buf + 4; 1322 int bit, pbit, kbit; 1323 int fail = 0; 1324 int skip = -1; 1325 struct otpstrap_status otpstrap[64]; 1326 1327 otp_strap_status(otpstrap); 1328 for (i = 0; i < 64; i++) { 1329 if (i < 32) { 1330 bit = (buf[0] >> i) & 0x1; 1331 kbit = (strap_keep[0] >> i) & 0x1; 1332 pbit = (strap_protect[0] >> i) & 0x1; 1333 } else { 1334 bit = (buf[1] >> (i - 32)) & 0x1; 1335 kbit = (strap_keep[1] >> (i - 32)) & 0x1; 1336 pbit = (strap_protect[1] >> (i - 32)) & 0x1; 1337 } 1338 1339 if (kbit == 1) { 1340 continue; 1341 } else { 1342 printf("OTPSTRAP[%X]:\n", i); 1343 } 1344 if (bit == otpstrap[i].value) { 1345 printf(" The value is same as before, skip it.\n"); 1346 if (skip == -1) 1347 skip = 1; 1348 continue; 1349 } else { 1350 skip = 0; 1351 } 1352 if (otpstrap[i].protected == 1) { 1353 printf(" This bit is protected and is not writable\n"); 1354 fail = 1; 1355 continue; 1356 } 1357 if (otpstrap[i].remain_times == 0) { 1358 printf(" This bit is no remaining times to write.\n"); 1359 fail = 1; 1360 continue; 1361 } 1362 if (pbit == 1) { 1363 printf(" This bit will be protected and become non-writable.\n"); 1364 } 1365 printf(" Write 1 to OTPSTRAP[%X] OPTION[%X], that value becomes from %d to %d.\n", i, otpstrap[i].writeable_option + 1, otpstrap[i].value, otpstrap[i].value ^ 1); 1366 } 1367 if (fail == 1) 1368 return OTP_FAILURE; 1369 else if (skip == 1) 1370 return OTP_PROG_SKIP; 1371 1372 return 0; 1373 } 1374 1375 static int otp_print_strap(int start, int count) 1376 { 1377 int i, j; 1378 struct otpstrap_status otpstrap[64]; 1379 1380 if (start < 0 || start > 64) 1381 return OTP_USAGE; 1382 1383 if ((start + count) < 0 || (start + count) > 64) 1384 return OTP_USAGE; 1385 1386 otp_strap_status(otpstrap); 1387 1388 printf("BIT(hex) Value Option Status\n"); 1389 printf("___________________________________________________________________________\n"); 1390 1391 for (i = start; i < start + count; i++) { 1392 printf("0x%-8X", i); 1393 printf("%-7d", otpstrap[i].value); 1394 for (j = 0; j < 7; j++) 1395 printf("%d ", otpstrap[i].option_array[j]); 1396 printf(" "); 1397 if (otpstrap[i].protected == 1) { 1398 printf("protected and not writable"); 1399 } else { 1400 printf("not protected "); 1401 if (otpstrap[i].remain_times == 0) { 1402 printf("and no remaining times to write."); 1403 } else { 1404 printf("and still can write %d times", otpstrap[i].remain_times); 1405 } 1406 } 1407 printf("\n"); 1408 } 1409 1410 return OTP_SUCCESS; 1411 } 1412 1413 static int otp_prog_strap(uint32_t *buf) 1414 { 1415 int i, j; 1416 uint32_t *strap_keep = buf + 2; 1417 uint32_t *strap_protect = buf + 4; 1418 uint32_t prog_bit, prog_address; 1419 int bit, pbit, kbit, offset; 1420 int fail = 0; 1421 int pass = 0; 1422 struct otpstrap_status otpstrap[64]; 1423 1424 printf("Read OTP Strap Region:\n"); 1425 otp_strap_status(otpstrap); 1426 1427 printf("Check writable...\n"); 1428 if (otp_strap_image_confirm(buf) == OTP_FAILURE) { 1429 printf("Input image can't program into OTP, please check.\n"); 1430 return OTP_FAILURE; 1431 } 1432 1433 for (i = 0; i < 64; i++) { 1434 prog_address = 0x800; 1435 if (i < 32) { 1436 offset = i; 1437 bit = (buf[0] >> offset) & 0x1; 1438 kbit = (strap_keep[0] >> offset) & 0x1; 1439 pbit = (strap_protect[0] >> offset) & 0x1; 1440 prog_address |= ((otpstrap[i].writeable_option * 2 + 16) / 8) * 0x200; 1441 prog_address |= ((otpstrap[i].writeable_option * 2 + 16) % 8) * 0x2; 1442 1443 } else { 1444 offset = (i - 32); 1445 bit = (buf[1] >> offset) & 0x1; 1446 kbit = (strap_keep[1] >> offset) & 0x1; 1447 pbit = (strap_protect[1] >> offset) & 0x1; 1448 prog_address |= ((otpstrap[i].writeable_option * 2 + 17) / 8) * 0x200; 1449 prog_address |= ((otpstrap[i].writeable_option * 2 + 17) % 8) * 0x2; 1450 } 1451 prog_bit = ~(0x1 << offset); 1452 1453 if (kbit == 1) { 1454 continue; 1455 } 1456 if (bit == otpstrap[i].value) { 1457 continue; 1458 } 1459 if (otpstrap[i].protected == 1) { 1460 fail = 1; 1461 continue; 1462 } 1463 if (otpstrap[i].remain_times == 0) { 1464 fail = 1; 1465 continue; 1466 } 1467 1468 1469 otp_soak(1); 1470 otp_prog(prog_address, prog_bit); 1471 1472 pass = 0; 1473 for (j = 0; j < RETRY; j++) { 1474 if (verify_bit(prog_address, offset, 1) != 0) { 1475 otp_soak(2); 1476 otp_prog(prog_address, prog_bit); 1477 if (verify_bit(prog_address, offset, 1) != 0) { 1478 otp_soak(1); 1479 } else { 1480 pass = 1; 1481 break; 1482 } 1483 } else { 1484 pass = 1; 1485 break; 1486 } 1487 } 1488 if (!pass) 1489 return OTP_FAILURE; 1490 1491 if (pbit == 0) 1492 continue; 1493 prog_address = 0x800; 1494 if (i < 32) 1495 prog_address |= 0x60c; 1496 else 1497 prog_address |= 0x60e; 1498 1499 1500 otp_soak(1); 1501 otp_prog(prog_address, prog_bit); 1502 1503 pass = 0; 1504 for (j = 0; j < RETRY; j++) { 1505 if (verify_bit(prog_address, offset, 1) != 0) { 1506 otp_soak(2); 1507 otp_prog(prog_address, prog_bit); 1508 if (verify_bit(prog_address, offset, 1) != 0) { 1509 otp_soak(1); 1510 } else { 1511 pass = 1; 1512 break; 1513 } 1514 } else { 1515 pass = 1; 1516 break; 1517 } 1518 } 1519 if (!pass) 1520 return OTP_FAILURE; 1521 1522 } 1523 otp_soak(0); 1524 if (fail == 1) 1525 return OTP_FAILURE; 1526 else 1527 return OTP_SUCCESS; 1528 1529 } 1530 1531 static void otp_prog_bit(uint32_t value, uint32_t prog_address, uint32_t bit_offset) 1532 { 1533 int prog_bit; 1534 1535 if (prog_address % 2 == 0) { 1536 if (value) 1537 prog_bit = ~(0x1 << bit_offset); 1538 else 1539 return; 1540 } else { 1541 prog_address |= 1 << 15; 1542 if (!value) 1543 prog_bit = 0x1 << bit_offset; 1544 else 1545 return; 1546 } 1547 otp_prog(prog_address, prog_bit); 1548 } 1549 1550 static int otp_prog_data(uint32_t *buf) 1551 { 1552 int i, k; 1553 int pass; 1554 uint32_t prog_address; 1555 uint32_t data[2048]; 1556 uint32_t compare[2]; 1557 uint32_t *buf_keep = &buf[2048]; 1558 1559 uint32_t data0_masked; 1560 uint32_t data1_masked; 1561 uint32_t buf0_masked; 1562 uint32_t buf1_masked; 1563 1564 printf("Read OTP Data:\n"); 1565 1566 for (i = 0; i < 2046 ; i += 2) { 1567 otp_read_data(i, &data[i]); 1568 } 1569 1570 1571 printf("Check writable...\n"); 1572 for (i = 0; i < 2046; i++) { 1573 data0_masked = data[i] & ~buf_keep[i]; 1574 buf0_masked = buf[i] & ~buf_keep[i]; 1575 if (data0_masked == buf0_masked) 1576 continue; 1577 if (i % 2 == 0) { 1578 if ((data0_masked | buf0_masked) == buf0_masked) { 1579 continue; 1580 } else { 1581 printf("Input image can't program into OTP, please check.\n"); 1582 printf("OTP_ADDR[%x] = %x\n", i, data[i]); 1583 printf("Input [%x] = %x\n", i, buf[i]); 1584 printf("Mask [%x] = %x\n", i, ~buf_keep[i]); 1585 return OTP_FAILURE; 1586 } 1587 } else { 1588 if ((data0_masked & buf0_masked) == buf0_masked) { 1589 continue; 1590 } else { 1591 printf("Input image can't program into OTP, please check.\n"); 1592 printf("OTP_ADDR[%x] = %x\n", i, data[i]); 1593 printf("Input [%x] = %x\n", i, buf[i]); 1594 printf("Mask [%x] = %x\n", i, ~buf_keep[i]); 1595 return OTP_FAILURE; 1596 } 1597 } 1598 } 1599 1600 printf("Start Programing...\n"); 1601 1602 for (i = 0; i < 2046; i += 2) { 1603 prog_address = i; 1604 data0_masked = data[i] & ~buf_keep[i]; 1605 buf0_masked = buf[i] & ~buf_keep[i]; 1606 data1_masked = data[i + 1] & ~buf_keep[i + 1]; 1607 buf1_masked = buf[i + 1] & ~buf_keep[i + 1]; 1608 if ((data0_masked == buf0_masked) && (data1_masked == buf1_masked)) { 1609 continue; 1610 } 1611 1612 otp_soak(1); 1613 if (data1_masked == buf1_masked) { 1614 otp_prog_dw(buf[i], buf_keep[i], prog_address); 1615 } else if (data0_masked == buf0_masked) { 1616 otp_prog_dw(buf[i + 1], buf_keep[i + 1], prog_address + 1); 1617 } else { 1618 otp_prog_dw(buf[i], buf_keep[i], prog_address); 1619 otp_prog_dw(buf[i + 1], buf_keep[i + 1], prog_address + 1); 1620 } 1621 1622 pass = 0; 1623 for (k = 0; k < RETRY; k++) { 1624 if (verify_dw(prog_address, &buf[i], &buf_keep[i], compare, 2) != 0) { 1625 otp_soak(2); 1626 if (compare[0] != 0) { 1627 otp_prog_dw(compare[0], buf_keep[i], prog_address); 1628 } 1629 if (compare[1] != ~0) { 1630 otp_prog_dw(compare[1], buf_keep[i], prog_address + 1); 1631 } 1632 if (verify_dw(prog_address, &buf[i], &buf_keep[i], compare, 2) != 0) { 1633 otp_soak(1); 1634 } else { 1635 pass = 1; 1636 break; 1637 } 1638 } else { 1639 pass = 1; 1640 break; 1641 } 1642 } 1643 1644 if (!pass) { 1645 otp_soak(0); 1646 return OTP_FAILURE; 1647 } 1648 } 1649 otp_soak(0); 1650 return OTP_SUCCESS; 1651 1652 } 1653 1654 static int do_otp_prog(int addr, int byte_size, int nconfirm) 1655 { 1656 int ret; 1657 int mode = 0; 1658 int image_version = 0; 1659 uint32_t *buf; 1660 uint32_t *data_region = NULL; 1661 uint32_t *conf_region = NULL; 1662 uint32_t *strap_region = NULL; 1663 1664 buf = map_physmem(addr, byte_size, MAP_WRBACK); 1665 if (!buf) { 1666 puts("Failed to map physical memory\n"); 1667 return OTP_FAILURE; 1668 } 1669 1670 image_version = buf[0] & 0x3; 1671 if (image_version != info_cb.version) { 1672 puts("Version is not match\n"); 1673 return OTP_FAILURE; 1674 } 1675 1676 if (buf[0] & BIT(29)) { 1677 mode |= OTP_REGION_DATA; 1678 data_region = &buf[36]; 1679 } 1680 if (buf[0] & BIT(30)) { 1681 mode |= OTP_REGION_CONF; 1682 conf_region = &buf[12]; 1683 } 1684 if (buf[0] & BIT(31)) { 1685 mode |= OTP_REGION_STRAP; 1686 strap_region = &buf[4]; 1687 } 1688 1689 if (!nconfirm) { 1690 if (mode & OTP_REGION_DATA) { 1691 printf("\nOTP data region :\n"); 1692 if (otp_print_data_info(data_region) < 0) { 1693 printf("OTP data error, please check.\n"); 1694 return OTP_FAILURE; 1695 } 1696 } 1697 if (mode & OTP_REGION_STRAP) { 1698 printf("\nOTP strap region :\n"); 1699 if (otp_print_strap_image(strap_region) < 0) { 1700 printf("OTP strap error, please check.\n"); 1701 return OTP_FAILURE; 1702 } 1703 } 1704 if (mode & OTP_REGION_CONF) { 1705 printf("\nOTP configuration region :\n"); 1706 if (otp_print_conf_image(conf_region) < 0) { 1707 printf("OTP config error, please check.\n"); 1708 return OTP_FAILURE; 1709 } 1710 } 1711 1712 printf("type \"YES\" (no quotes) to continue:\n"); 1713 if (!confirm_yesno()) { 1714 printf(" Aborting\n"); 1715 return OTP_FAILURE; 1716 } 1717 } 1718 1719 if (mode & OTP_REGION_DATA) { 1720 printf("programing data region ...\n"); 1721 ret = otp_prog_data(data_region); 1722 if (ret != 0) { 1723 printf("Error\n"); 1724 return ret; 1725 } else { 1726 printf("Done\n"); 1727 } 1728 } 1729 if (mode & OTP_REGION_STRAP) { 1730 printf("programing strap region ...\n"); 1731 ret = otp_prog_strap(strap_region); 1732 if (ret != 0) { 1733 printf("Error\n"); 1734 return ret; 1735 } else { 1736 printf("Done\n"); 1737 } 1738 } 1739 if (mode & OTP_REGION_CONF) { 1740 printf("programing configuration region ...\n"); 1741 ret = otp_prog_conf(conf_region); 1742 if (ret != 0) { 1743 printf("Error\n"); 1744 return ret; 1745 } 1746 printf("Done\n"); 1747 } 1748 1749 return OTP_SUCCESS; 1750 } 1751 1752 static int do_otp_prog_bit(int mode, int otp_dw_offset, int bit_offset, int value, int nconfirm) 1753 { 1754 uint32_t read[2]; 1755 uint32_t strap_buf[6]; 1756 uint32_t prog_address = 0; 1757 struct otpstrap_status otpstrap[64]; 1758 int otp_bit; 1759 int i; 1760 int pass; 1761 int ret; 1762 1763 switch (mode) { 1764 case OTP_REGION_CONF: 1765 otp_read_config(otp_dw_offset, read); 1766 prog_address = 0x800; 1767 prog_address |= (otp_dw_offset / 8) * 0x200; 1768 prog_address |= (otp_dw_offset % 8) * 0x2; 1769 otp_bit = (read[0] >> bit_offset) & 0x1; 1770 if (otp_bit == value) { 1771 printf("OTPCFG%X[%X] = %d\n", otp_dw_offset, bit_offset, value); 1772 printf("No need to program\n"); 1773 return OTP_SUCCESS; 1774 } 1775 if (otp_bit == 1 && value == 0) { 1776 printf("OTPCFG%X[%X] = 1\n", otp_dw_offset, bit_offset); 1777 printf("OTP is programed, which can't be clean\n"); 1778 return OTP_FAILURE; 1779 } 1780 printf("Program OTPCFG%X[%X] to 1\n", otp_dw_offset, bit_offset); 1781 break; 1782 case OTP_REGION_DATA: 1783 prog_address = otp_dw_offset; 1784 1785 if (otp_dw_offset % 2 == 0) { 1786 otp_read_data(otp_dw_offset, read); 1787 otp_bit = (read[0] >> bit_offset) & 0x1; 1788 1789 if (otp_bit == 1 && value == 0) { 1790 printf("OTPDATA%X[%X] = 1\n", otp_dw_offset, bit_offset); 1791 printf("OTP is programed, which can't be cleaned\n"); 1792 return OTP_FAILURE; 1793 } 1794 } else { 1795 otp_read_data(otp_dw_offset - 1, read); 1796 otp_bit = (read[1] >> bit_offset) & 0x1; 1797 1798 if (otp_bit == 0 && value == 1) { 1799 printf("OTPDATA%X[%X] = 1\n", otp_dw_offset, bit_offset); 1800 printf("OTP is programed, which can't be writen\n"); 1801 return OTP_FAILURE; 1802 } 1803 } 1804 if (otp_bit == value) { 1805 printf("OTPDATA%X[%X] = %d\n", otp_dw_offset, bit_offset, value); 1806 printf("No need to program\n"); 1807 return OTP_SUCCESS; 1808 } 1809 1810 printf("Program OTPDATA%X[%X] to 1\n", otp_dw_offset, bit_offset); 1811 break; 1812 case OTP_REGION_STRAP: 1813 otp_strap_status(otpstrap); 1814 otp_print_strap(bit_offset, 1); 1815 if (bit_offset < 32) { 1816 strap_buf[0] = value << bit_offset; 1817 strap_buf[2] = ~BIT(bit_offset); 1818 strap_buf[3] = ~0; 1819 strap_buf[5] = 0; 1820 // if (protect) 1821 // strap_buf[4] = BIT(bit_offset); 1822 // else 1823 // strap_buf[4] = 0; 1824 } else { 1825 strap_buf[1] = value << (bit_offset - 32); 1826 strap_buf[2] = ~0; 1827 strap_buf[3] = ~BIT(bit_offset - 32); 1828 strap_buf[4] = 0; 1829 // if (protect) 1830 // strap_buf[5] = BIT(bit_offset - 32); 1831 // else 1832 // strap_buf[5] = 0; 1833 } 1834 ret = otp_strap_image_confirm(strap_buf); 1835 if (ret == OTP_FAILURE) 1836 return OTP_FAILURE; 1837 else if (ret == OTP_PROG_SKIP) 1838 return OTP_SUCCESS; 1839 1840 break; 1841 } 1842 1843 if (!nconfirm) { 1844 printf("type \"YES\" (no quotes) to continue:\n"); 1845 if (!confirm_yesno()) { 1846 printf(" Aborting\n"); 1847 return OTP_FAILURE; 1848 } 1849 } 1850 1851 switch (mode) { 1852 case OTP_REGION_STRAP: 1853 return otp_prog_strap(strap_buf); 1854 case OTP_REGION_CONF: 1855 case OTP_REGION_DATA: 1856 otp_soak(1); 1857 otp_prog_bit(value, prog_address, bit_offset); 1858 pass = 0; 1859 1860 for (i = 0; i < RETRY; i++) { 1861 if (verify_bit(prog_address, bit_offset, value) != 0) { 1862 otp_soak(2); 1863 otp_prog_bit(value, prog_address, bit_offset); 1864 if (verify_bit(prog_address, bit_offset, value) != 0) { 1865 otp_soak(1); 1866 } else { 1867 pass = 1; 1868 break; 1869 } 1870 } else { 1871 pass = 1; 1872 break; 1873 } 1874 } 1875 1876 otp_soak(0); 1877 if (pass) { 1878 printf("SUCCESS\n"); 1879 return OTP_SUCCESS; 1880 } else { 1881 printf("OTP cannot be programed\n"); 1882 printf("FAILED\n"); 1883 return OTP_FAILURE; 1884 } 1885 } 1886 1887 return OTP_USAGE; 1888 } 1889 1890 static int do_otpread(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1891 { 1892 uint32_t offset, count; 1893 int ret; 1894 1895 if (argc == 4) { 1896 offset = simple_strtoul(argv[2], NULL, 16); 1897 count = simple_strtoul(argv[3], NULL, 16); 1898 } else if (argc == 3) { 1899 offset = simple_strtoul(argv[2], NULL, 16); 1900 count = 1; 1901 } else { 1902 return CMD_RET_USAGE; 1903 } 1904 1905 1906 if (!strcmp(argv[1], "conf")) { 1907 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1908 ret = otp_print_config(offset, count); 1909 } else if (!strcmp(argv[1], "data")) { 1910 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1911 ret = otp_print_data(offset, count); 1912 } else if (!strcmp(argv[1], "strap")) { 1913 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1914 ret = otp_print_strap(offset, count); 1915 } else { 1916 return CMD_RET_USAGE; 1917 } 1918 1919 if (ret == OTP_SUCCESS) 1920 return CMD_RET_SUCCESS; 1921 else 1922 return CMD_RET_USAGE; 1923 1924 } 1925 1926 static int do_otpprog(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1927 { 1928 phys_addr_t addr; 1929 uint32_t byte_size; 1930 int ret; 1931 1932 if (argc == 4) { 1933 if (strcmp(argv[1], "o")) 1934 return CMD_RET_USAGE; 1935 addr = simple_strtoul(argv[2], NULL, 16); 1936 byte_size = simple_strtoul(argv[3], NULL, 16); 1937 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1938 ret = do_otp_prog(addr, byte_size, 1); 1939 } else if (argc == 3) { 1940 addr = simple_strtoul(argv[1], NULL, 16); 1941 byte_size = simple_strtoul(argv[2], NULL, 16); 1942 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 1943 ret = do_otp_prog(addr, byte_size, 0); 1944 } else { 1945 return CMD_RET_USAGE; 1946 } 1947 1948 if (ret == OTP_SUCCESS) 1949 return CMD_RET_SUCCESS; 1950 else if (ret == OTP_FAILURE) 1951 return CMD_RET_FAILURE; 1952 else 1953 return CMD_RET_USAGE; 1954 } 1955 1956 static int do_otppb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1957 { 1958 int mode = 0; 1959 int nconfirm = 0; 1960 int otp_addr = 0; 1961 int bit_offset; 1962 int value; 1963 int ret; 1964 1965 if (argc != 4 && argc != 5 && argc != 6) 1966 return CMD_RET_USAGE; 1967 1968 /* Drop the pb cmd */ 1969 argc--; 1970 argv++; 1971 1972 if (!strcmp(argv[0], "conf")) 1973 mode = OTP_REGION_CONF; 1974 else if (!strcmp(argv[0], "strap")) 1975 mode = OTP_REGION_STRAP; 1976 else if (!strcmp(argv[0], "data")) 1977 mode = OTP_REGION_DATA; 1978 else 1979 return CMD_RET_USAGE; 1980 1981 /* Drop the region cmd */ 1982 argc--; 1983 argv++; 1984 1985 if (!strcmp(argv[0], "o")) { 1986 nconfirm = 1; 1987 /* Drop the force option */ 1988 argc--; 1989 argv++; 1990 } 1991 1992 if (mode == OTP_REGION_STRAP) { 1993 bit_offset = simple_strtoul(argv[0], NULL, 16); 1994 value = simple_strtoul(argv[1], NULL, 16); 1995 if (bit_offset >= 64 || (value != 0 && value != 1)) 1996 return CMD_RET_USAGE; 1997 } else { 1998 otp_addr = simple_strtoul(argv[0], NULL, 16); 1999 bit_offset = simple_strtoul(argv[1], NULL, 16); 2000 value = simple_strtoul(argv[2], NULL, 16); 2001 if (bit_offset >= 32 || (value != 0 && value != 1)) 2002 return CMD_RET_USAGE; 2003 if (mode == OTP_REGION_DATA) { 2004 if (otp_addr >= 0x800) 2005 return CMD_RET_USAGE; 2006 } else { 2007 if (otp_addr >= 0x20) 2008 return CMD_RET_USAGE; 2009 } 2010 } 2011 if (value != 0 && value != 1) 2012 return CMD_RET_USAGE; 2013 2014 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2015 ret = do_otp_prog_bit(mode, otp_addr, bit_offset, value, nconfirm); 2016 2017 if (ret == OTP_SUCCESS) 2018 return CMD_RET_SUCCESS; 2019 else if (ret == OTP_FAILURE) 2020 return CMD_RET_FAILURE; 2021 else 2022 return CMD_RET_USAGE; 2023 } 2024 2025 static int do_otpcmp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2026 { 2027 phys_addr_t addr; 2028 int otp_addr = 0; 2029 2030 if (argc != 3) 2031 return CMD_RET_USAGE; 2032 2033 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2034 addr = simple_strtoul(argv[1], NULL, 16); 2035 otp_addr = simple_strtoul(argv[2], NULL, 16); 2036 if (otp_compare(otp_addr, addr) == 0) { 2037 printf("Compare pass\n"); 2038 return CMD_RET_SUCCESS; 2039 } else { 2040 printf("Compare fail\n"); 2041 return CMD_RET_FAILURE; 2042 } 2043 } 2044 2045 static int do_otpinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2046 { 2047 int view = 0; 2048 int input; 2049 2050 if (argc != 2 && argc != 3) 2051 return CMD_RET_USAGE; 2052 2053 if (!strcmp(argv[1], "conf")) { 2054 2055 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2056 if (argc == 3) { 2057 input = simple_strtoul(argv[2], NULL, 16); 2058 otp_print_conf_info(input); 2059 } else { 2060 otp_print_conf_info(-1); 2061 } 2062 } else if (!strcmp(argv[1], "strap")) { 2063 if (!strcmp(argv[2], "v")) { 2064 view = 1; 2065 /* Drop the view option */ 2066 argc--; 2067 argv++; 2068 } 2069 writel(OTP_PASSWD, OTP_PROTECT_KEY); //password 2070 otp_print_strap_info(view); 2071 } else { 2072 return CMD_RET_USAGE; 2073 } 2074 2075 return CMD_RET_SUCCESS; 2076 } 2077 2078 static int do_otpprotect(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2079 { 2080 int input; 2081 int bit_offset; 2082 int prog_address; 2083 int pass; 2084 int i; 2085 if (argc != 3 && argc != 2) 2086 return CMD_RET_USAGE; 2087 2088 if (!strcmp(argv[0], "o")) { 2089 input = simple_strtoul(argv[2], NULL, 16); 2090 } else { 2091 input = simple_strtoul(argv[1], NULL, 16); 2092 printf("OTPSTRAP[%d] will be protected\n", input); 2093 printf("type \"YES\" (no quotes) to continue:\n"); 2094 if (!confirm_yesno()) { 2095 printf(" Aborting\n"); 2096 return CMD_RET_FAILURE; 2097 } 2098 } 2099 2100 prog_address = 0x800; 2101 if (input < 32) { 2102 bit_offset = input; 2103 prog_address |= 0x60c; 2104 } else if (input < 64) { 2105 bit_offset = input - 32; 2106 prog_address |= 0x60e; 2107 } else { 2108 return CMD_RET_USAGE; 2109 } 2110 2111 if (verify_bit(prog_address, bit_offset, 1) == 0) { 2112 printf("OTPSTRAP[%d] already protected\n", input); 2113 } 2114 2115 otp_soak(1); 2116 otp_prog_bit(1, prog_address, bit_offset); 2117 pass = 0; 2118 2119 for (i = 0; i < RETRY; i++) { 2120 if (verify_bit(prog_address, bit_offset, 1) != 0) { 2121 otp_soak(2); 2122 otp_prog_bit(1, prog_address, bit_offset); 2123 if (verify_bit(prog_address, bit_offset, 1) != 0) { 2124 otp_soak(1); 2125 } else { 2126 pass = 1; 2127 break; 2128 } 2129 } else { 2130 pass = 1; 2131 break; 2132 } 2133 } 2134 otp_soak(0); 2135 if (pass) { 2136 printf("OTPSTRAP[%d] is protected\n", input); 2137 return CMD_RET_SUCCESS; 2138 } 2139 2140 printf("Protect OTPSTRAP[%d] fail\n", input); 2141 return CMD_RET_FAILURE; 2142 2143 } 2144 2145 static cmd_tbl_t cmd_otp[] = { 2146 U_BOOT_CMD_MKENT(read, 4, 0, do_otpread, "", ""), 2147 U_BOOT_CMD_MKENT(info, 3, 0, do_otpinfo, "", ""), 2148 U_BOOT_CMD_MKENT(prog, 4, 0, do_otpprog, "", ""), 2149 U_BOOT_CMD_MKENT(pb, 6, 0, do_otppb, "", ""), 2150 U_BOOT_CMD_MKENT(protect, 3, 0, do_otpprotect, "", ""), 2151 U_BOOT_CMD_MKENT(cmp, 3, 0, do_otpcmp, "", ""), 2152 }; 2153 2154 static int do_ast_otp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 2155 { 2156 cmd_tbl_t *cp; 2157 2158 cp = find_cmd_tbl(argv[1], cmd_otp, ARRAY_SIZE(cmd_otp)); 2159 2160 /* Drop the otp command */ 2161 argc--; 2162 argv++; 2163 2164 if (cp == NULL || argc > cp->maxargs) 2165 return CMD_RET_USAGE; 2166 if (flag == CMD_FLAG_REPEAT && !cmd_is_repeatable(cp)) 2167 return CMD_RET_SUCCESS; 2168 2169 if (chip_version() == 0) { 2170 info_cb.version = 0; 2171 info_cb.conf_info = a0_conf_info; 2172 info_cb.conf_info_len = ARRAY_SIZE(a0_conf_info); 2173 info_cb.strap_info = a0_strap_info; 2174 info_cb.strap_info_len = ARRAY_SIZE(a0_strap_info); 2175 info_cb.key_info = a0_key_type; 2176 info_cb.key_info_len = ARRAY_SIZE(a0_key_type); 2177 } else if (chip_version() == 1) { 2178 info_cb.version = 1; 2179 info_cb.conf_info = a1_conf_info; 2180 info_cb.conf_info_len = ARRAY_SIZE(a1_conf_info); 2181 info_cb.strap_info = a1_strap_info; 2182 info_cb.strap_info_len = ARRAY_SIZE(a1_strap_info); 2183 info_cb.key_info = a1_key_type; 2184 info_cb.key_info_len = ARRAY_SIZE(a1_key_type); 2185 } 2186 2187 return cp->cmd(cmdtp, flag, argc, argv); 2188 } 2189 2190 U_BOOT_CMD( 2191 otp, 7, 0, do_ast_otp, 2192 "ASPEED One-Time-Programmable sub-system", 2193 "read conf|data <otp_dw_offset> <dw_count>\n" 2194 "otp read strap <strap_bit_offset> <bit_count>\n" 2195 "otp info strap [v]\n" 2196 "otp info conf [otp_dw_offset]\n" 2197 "otp prog [o] <addr> <byte_size>\n" 2198 "otp pb conf|data [o] <otp_dw_offset> <bit_offset> <value>\n" 2199 "otp pb strap [o] <bit_offset> <value>\n" 2200 "otp protect [o] <bit_offset>\n" 2201 "otp cmp <addr> <otp_dw_offset>\n" 2202 ); 2203