1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
22e192b24SSimon Glass /*
32e192b24SSimon Glass * Copyright 2008-2009 Freescale Semiconductor, Inc.
42e192b24SSimon Glass */
52e192b24SSimon Glass
62e192b24SSimon Glass #include <common.h>
72e192b24SSimon Glass #include <command.h>
82e192b24SSimon Glass
cpu_status_all(void)92e192b24SSimon Glass static int cpu_status_all(void)
102e192b24SSimon Glass {
112e192b24SSimon Glass unsigned long cpuid;
122e192b24SSimon Glass
132e192b24SSimon Glass for (cpuid = 0; ; cpuid++) {
142e192b24SSimon Glass if (!is_core_valid(cpuid)) {
152e192b24SSimon Glass if (cpuid == 0) {
162e192b24SSimon Glass printf("Core num: %lu is not valid\n", cpuid);
172e192b24SSimon Glass return 1;
182e192b24SSimon Glass }
192e192b24SSimon Glass break;
202e192b24SSimon Glass }
212e192b24SSimon Glass cpu_status(cpuid);
222e192b24SSimon Glass }
232e192b24SSimon Glass
242e192b24SSimon Glass return 0;
252e192b24SSimon Glass }
262e192b24SSimon Glass
272e192b24SSimon Glass static int
cpu_cmd(cmd_tbl_t * cmdtp,int flag,int argc,char * const argv[])282e192b24SSimon Glass cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
292e192b24SSimon Glass {
302e192b24SSimon Glass unsigned long cpuid;
312e192b24SSimon Glass
322e192b24SSimon Glass if (argc == 2 && strncmp(argv[1], "status", 6) == 0)
332e192b24SSimon Glass return cpu_status_all();
342e192b24SSimon Glass
352e192b24SSimon Glass if (argc < 3)
362e192b24SSimon Glass return CMD_RET_USAGE;
372e192b24SSimon Glass
382e192b24SSimon Glass cpuid = simple_strtoul(argv[1], NULL, 10);
392e192b24SSimon Glass if (!is_core_valid(cpuid)) {
402e192b24SSimon Glass printf ("Core num: %lu is not valid\n", cpuid);
412e192b24SSimon Glass return 1;
422e192b24SSimon Glass }
432e192b24SSimon Glass
442e192b24SSimon Glass
452e192b24SSimon Glass if (argc == 3) {
462e192b24SSimon Glass if (strncmp(argv[2], "reset", 5) == 0)
472e192b24SSimon Glass cpu_reset(cpuid);
482e192b24SSimon Glass else if (strncmp(argv[2], "status", 6) == 0)
492e192b24SSimon Glass cpu_status(cpuid);
502e192b24SSimon Glass else if (strncmp(argv[2], "disable", 7) == 0)
512e192b24SSimon Glass return cpu_disable(cpuid);
522e192b24SSimon Glass else
532e192b24SSimon Glass return CMD_RET_USAGE;
542e192b24SSimon Glass
552e192b24SSimon Glass return 0;
562e192b24SSimon Glass }
572e192b24SSimon Glass
582e192b24SSimon Glass /* 4 or greater, make sure its release */
592e192b24SSimon Glass if (strncmp(argv[2], "release", 7) != 0)
602e192b24SSimon Glass return CMD_RET_USAGE;
612e192b24SSimon Glass
622e192b24SSimon Glass if (cpu_release(cpuid, argc - 3, argv + 3))
632e192b24SSimon Glass return CMD_RET_USAGE;
642e192b24SSimon Glass
652e192b24SSimon Glass return 0;
662e192b24SSimon Glass }
672e192b24SSimon Glass
682e192b24SSimon Glass #ifdef CONFIG_SYS_LONGHELP
692e192b24SSimon Glass static char cpu_help_text[] =
702e192b24SSimon Glass "<num> reset - Reset cpu <num>\n"
712e192b24SSimon Glass "cpu status - Status of all cpus\n"
722e192b24SSimon Glass "cpu <num> status - Status of cpu <num>\n"
732e192b24SSimon Glass "cpu <num> disable - Disable cpu <num>\n"
742e192b24SSimon Glass "cpu <num> release <addr> [args] - Release cpu <num> at <addr> with [args]"
752e192b24SSimon Glass #ifdef CONFIG_PPC
762e192b24SSimon Glass "\n"
772e192b24SSimon Glass " [args] : <pir> <r3> <r6>\n" \
782e192b24SSimon Glass " pir - processor id (if writeable)\n" \
792e192b24SSimon Glass " r3 - value for gpr 3\n" \
802e192b24SSimon Glass " r6 - value for gpr 6\n" \
812e192b24SSimon Glass "\n" \
822e192b24SSimon Glass " Use '-' for any arg if you want the default value.\n" \
832e192b24SSimon Glass " Default for r3 is <num> and r6 is 0\n" \
842e192b24SSimon Glass "\n" \
852e192b24SSimon Glass " When cpu <num> is released r4 and r5 = 0.\n" \
862e192b24SSimon Glass " r7 will contain the size of the initial mapped area"
872e192b24SSimon Glass #endif
882e192b24SSimon Glass "";
892e192b24SSimon Glass #endif
902e192b24SSimon Glass
912e192b24SSimon Glass U_BOOT_CMD(
922e192b24SSimon Glass cpu, CONFIG_SYS_MAXARGS, 1, cpu_cmd,
932e192b24SSimon Glass "Multiprocessor CPU boot manipulation and release", cpu_help_text
942e192b24SSimon Glass );
95