1 /* 2 * (C) Copyright 2009 3 * Sergey Kubushyn, himself, ksi@koi8.net 4 * 5 * Changes for unified multibus/multiadapter I2C support. 6 * 7 * (C) Copyright 2001 8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 /* 14 * I2C Functions similar to the standard memory functions. 15 * 16 * There are several parameters in many of the commands that bear further 17 * explanations: 18 * 19 * {i2c_chip} is the I2C chip address (the first byte sent on the bus). 20 * Each I2C chip on the bus has a unique address. On the I2C data bus, 21 * the address is the upper seven bits and the LSB is the "read/write" 22 * bit. Note that the {i2c_chip} address specified on the command 23 * line is not shifted up: e.g. a typical EEPROM memory chip may have 24 * an I2C address of 0x50, but the data put on the bus will be 0xA0 25 * for write and 0xA1 for read. This "non shifted" address notation 26 * matches at least half of the data sheets :-/. 27 * 28 * {addr} is the address (or offset) within the chip. Small memory 29 * chips have 8 bit addresses. Large memory chips have 16 bit 30 * addresses. Other memory chips have 9, 10, or 11 bit addresses. 31 * Many non-memory chips have multiple registers and {addr} is used 32 * as the register index. Some non-memory chips have only one register 33 * and therefore don't need any {addr} parameter. 34 * 35 * The default {addr} parameter is one byte (.1) which works well for 36 * memories and registers with 8 bits of address space. 37 * 38 * You can specify the length of the {addr} field with the optional .0, 39 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are 40 * manipulating a single register device which doesn't use an address 41 * field, use "0.0" for the address and the ".0" length field will 42 * suppress the address in the I2C data stream. This also works for 43 * successive reads using the I2C auto-incrementing memory pointer. 44 * 45 * If you are manipulating a large memory with 2-byte addresses, use 46 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal). 47 * 48 * Then there are the unfortunate memory chips that spill the most 49 * significant 1, 2, or 3 bits of address into the chip address byte. 50 * This effectively makes one chip (logically) look like 2, 4, or 51 * 8 chips. This is handled (awkwardly) by #defining 52 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the 53 * {addr} field (since .1 is the default, it doesn't actually have to 54 * be specified). Examples: given a memory chip at I2C chip address 55 * 0x50, the following would happen... 56 * i2c md 50 0 10 display 16 bytes starting at 0x000 57 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd> 58 * i2c md 50 100 10 display 16 bytes starting at 0x100 59 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd> 60 * i2c md 50 210 10 display 16 bytes starting at 0x210 61 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd> 62 * This is awfully ugly. It would be nice if someone would think up 63 * a better way of handling this. 64 * 65 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). 66 */ 67 68 #include <common.h> 69 #include <bootretry.h> 70 #include <cli.h> 71 #include <command.h> 72 #include <console.h> 73 #include <dm.h> 74 #include <edid.h> 75 #include <environment.h> 76 #include <errno.h> 77 #include <i2c.h> 78 #include <malloc.h> 79 #include <asm/byteorder.h> 80 #include <linux/compiler.h> 81 82 DECLARE_GLOBAL_DATA_PTR; 83 84 /* Display values from last command. 85 * Memory modify remembered values are different from display memory. 86 */ 87 static uint i2c_dp_last_chip; 88 static uint i2c_dp_last_addr; 89 static uint i2c_dp_last_alen; 90 static uint i2c_dp_last_length = 0x10; 91 92 static uint i2c_mm_last_chip; 93 static uint i2c_mm_last_addr; 94 static uint i2c_mm_last_alen; 95 96 /* If only one I2C bus is present, the list of devices to ignore when 97 * the probe command is issued is represented by a 1D array of addresses. 98 * When multiple buses are present, the list is an array of bus-address 99 * pairs. The following macros take care of this */ 100 101 #if defined(CONFIG_SYS_I2C_NOPROBES) 102 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 103 static struct 104 { 105 uchar bus; 106 uchar addr; 107 } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; 108 #define GET_BUS_NUM i2c_get_bus_num() 109 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b)) 110 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a)) 111 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr 112 #else /* single bus */ 113 static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; 114 #define GET_BUS_NUM 0 115 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ 116 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) 117 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)] 118 #endif /* defined(CONFIG_SYS_I2C) */ 119 #endif 120 121 #define DISP_LINE_LEN 16 122 123 /* 124 * Default for driver model is to use the chip's existing address length. 125 * For legacy code, this is not stored, so we need to use a suitable 126 * default. 127 */ 128 #ifdef CONFIG_DM_I2C 129 #define DEFAULT_ADDR_LEN (-1) 130 #else 131 #define DEFAULT_ADDR_LEN 1 132 #endif 133 134 #ifdef CONFIG_DM_I2C 135 static struct udevice *i2c_cur_bus; 136 137 static int cmd_i2c_set_bus_num(unsigned int busnum) 138 { 139 struct udevice *bus; 140 int ret; 141 142 ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); 143 if (ret) { 144 debug("%s: No bus %d\n", __func__, busnum); 145 return ret; 146 } 147 i2c_cur_bus = bus; 148 149 return 0; 150 } 151 152 static int i2c_get_cur_bus(struct udevice **busp) 153 { 154 #ifdef CONFIG_I2C_SET_DEFAULT_BUS_NUM 155 if (!i2c_cur_bus) { 156 if (cmd_i2c_set_bus_num(CONFIG_I2C_DEFAULT_BUS_NUMBER)) { 157 printf("Default I2C bus %d not found\n", 158 CONFIG_I2C_DEFAULT_BUS_NUMBER); 159 return -ENODEV; 160 } 161 } 162 #endif 163 164 if (!i2c_cur_bus) { 165 puts("No I2C bus selected\n"); 166 return -ENODEV; 167 } 168 *busp = i2c_cur_bus; 169 170 return 0; 171 } 172 173 static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp) 174 { 175 struct udevice *bus; 176 int ret; 177 178 ret = i2c_get_cur_bus(&bus); 179 if (ret) 180 return ret; 181 182 return i2c_get_chip(bus, chip_addr, 1, devp); 183 } 184 185 #endif 186 187 /** 188 * i2c_init_board() - Board-specific I2C bus init 189 * 190 * This function is the default no-op implementation of I2C bus 191 * initialization. This function can be overridden by board-specific 192 * implementation if needed. 193 */ 194 __weak 195 void i2c_init_board(void) 196 { 197 } 198 199 /* TODO: Implement architecture-specific get/set functions */ 200 201 /** 202 * i2c_get_bus_speed() - Return I2C bus speed 203 * 204 * This function is the default implementation of function for retrieveing 205 * the current I2C bus speed in Hz. 206 * 207 * A driver implementing runtime switching of I2C bus speed must override 208 * this function to report the speed correctly. Simple or legacy drivers 209 * can use this fallback. 210 * 211 * Returns I2C bus speed in Hz. 212 */ 213 #if !defined(CONFIG_SYS_I2C) && !defined(CONFIG_DM_I2C) 214 /* 215 * TODO: Implement architecture-specific get/set functions 216 * Should go away, if we switched completely to new multibus support 217 */ 218 __weak 219 unsigned int i2c_get_bus_speed(void) 220 { 221 return CONFIG_SYS_I2C_SPEED; 222 } 223 224 /** 225 * i2c_set_bus_speed() - Configure I2C bus speed 226 * @speed: Newly set speed of the I2C bus in Hz 227 * 228 * This function is the default implementation of function for setting 229 * the I2C bus speed in Hz. 230 * 231 * A driver implementing runtime switching of I2C bus speed must override 232 * this function to report the speed correctly. Simple or legacy drivers 233 * can use this fallback. 234 * 235 * Returns zero on success, negative value on error. 236 */ 237 __weak 238 int i2c_set_bus_speed(unsigned int speed) 239 { 240 if (speed != CONFIG_SYS_I2C_SPEED) 241 return -1; 242 243 return 0; 244 } 245 #endif 246 247 /** 248 * get_alen() - Small parser helper function to get address length 249 * 250 * Returns the address length. 251 */ 252 static uint get_alen(char *arg, int default_len) 253 { 254 int j; 255 int alen; 256 257 alen = default_len; 258 for (j = 0; j < 8; j++) { 259 if (arg[j] == '.') { 260 alen = arg[j+1] - '0'; 261 break; 262 } else if (arg[j] == '\0') 263 break; 264 } 265 return alen; 266 } 267 268 enum i2c_err_op { 269 I2C_ERR_READ, 270 I2C_ERR_WRITE, 271 }; 272 273 static int i2c_report_err(int ret, enum i2c_err_op op) 274 { 275 printf("Error %s the chip: %d\n", 276 op == I2C_ERR_READ ? "reading" : "writing", ret); 277 278 return CMD_RET_FAILURE; 279 } 280 281 /** 282 * do_i2c_read() - Handle the "i2c read" command-line command 283 * @cmdtp: Command data struct pointer 284 * @flag: Command flag 285 * @argc: Command-line argument count 286 * @argv: Array of command-line arguments 287 * 288 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 289 * on error. 290 * 291 * Syntax: 292 * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr} 293 */ 294 static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 295 { 296 uint chip; 297 uint devaddr, length; 298 int alen; 299 u_char *memaddr; 300 int ret; 301 #ifdef CONFIG_DM_I2C 302 struct udevice *dev; 303 #endif 304 305 if (argc != 5) 306 return CMD_RET_USAGE; 307 308 /* 309 * I2C chip address 310 */ 311 chip = simple_strtoul(argv[1], NULL, 16); 312 313 /* 314 * I2C data address within the chip. This can be 1 or 315 * 2 bytes long. Some day it might be 3 bytes long :-). 316 */ 317 devaddr = simple_strtoul(argv[2], NULL, 16); 318 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 319 if (alen > 3) 320 return CMD_RET_USAGE; 321 322 /* 323 * Length is the number of objects, not number of bytes. 324 */ 325 length = simple_strtoul(argv[3], NULL, 16); 326 327 /* 328 * memaddr is the address where to store things in memory 329 */ 330 memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16); 331 332 #ifdef CONFIG_DM_I2C 333 ret = i2c_get_cur_bus_chip(chip, &dev); 334 if (!ret && alen != -1) 335 ret = i2c_set_chip_offset_len(dev, alen); 336 if (!ret) 337 ret = dm_i2c_read(dev, devaddr, memaddr, length); 338 #else 339 ret = i2c_read(chip, devaddr, alen, memaddr, length); 340 #endif 341 if (ret) 342 return i2c_report_err(ret, I2C_ERR_READ); 343 344 return 0; 345 } 346 347 static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 348 { 349 uint chip; 350 uint devaddr, length; 351 int alen; 352 u_char *memaddr; 353 int ret; 354 #ifdef CONFIG_DM_I2C 355 struct udevice *dev; 356 struct dm_i2c_chip *i2c_chip; 357 #endif 358 359 if ((argc < 5) || (argc > 6)) 360 return cmd_usage(cmdtp); 361 362 /* 363 * memaddr is the address where to store things in memory 364 */ 365 memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16); 366 367 /* 368 * I2C chip address 369 */ 370 chip = simple_strtoul(argv[2], NULL, 16); 371 372 /* 373 * I2C data address within the chip. This can be 1 or 374 * 2 bytes long. Some day it might be 3 bytes long :-). 375 */ 376 devaddr = simple_strtoul(argv[3], NULL, 16); 377 alen = get_alen(argv[3], DEFAULT_ADDR_LEN); 378 if (alen > 3) 379 return cmd_usage(cmdtp); 380 381 /* 382 * Length is the number of bytes. 383 */ 384 length = simple_strtoul(argv[4], NULL, 16); 385 386 #ifdef CONFIG_DM_I2C 387 ret = i2c_get_cur_bus_chip(chip, &dev); 388 if (!ret && alen != -1) 389 ret = i2c_set_chip_offset_len(dev, alen); 390 if (ret) 391 return i2c_report_err(ret, I2C_ERR_WRITE); 392 i2c_chip = dev_get_parent_platdata(dev); 393 if (!i2c_chip) 394 return i2c_report_err(ret, I2C_ERR_WRITE); 395 #endif 396 397 if (argc == 6 && !strcmp(argv[5], "-s")) { 398 /* 399 * Write all bytes in a single I2C transaction. If the target 400 * device is an EEPROM, it is your responsibility to not cross 401 * a page boundary. No write delay upon completion, take this 402 * into account if linking commands. 403 */ 404 #ifdef CONFIG_DM_I2C 405 i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS; 406 ret = dm_i2c_write(dev, devaddr, memaddr, length); 407 #else 408 ret = i2c_write(chip, devaddr, alen, memaddr, length); 409 #endif 410 if (ret) 411 return i2c_report_err(ret, I2C_ERR_WRITE); 412 } else { 413 /* 414 * Repeated addressing - perform <length> separate 415 * write transactions of one byte each 416 */ 417 while (length-- > 0) { 418 #ifdef CONFIG_DM_I2C 419 i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS; 420 ret = dm_i2c_write(dev, devaddr++, memaddr++, 1); 421 #else 422 ret = i2c_write(chip, devaddr++, alen, memaddr++, 1); 423 #endif 424 if (ret) 425 return i2c_report_err(ret, I2C_ERR_WRITE); 426 /* 427 * No write delay with FRAM devices. 428 */ 429 #if !defined(CONFIG_SYS_I2C_FRAM) 430 udelay(11000); 431 #endif 432 } 433 } 434 return 0; 435 } 436 437 #ifdef CONFIG_DM_I2C 438 static int do_i2c_flags(cmd_tbl_t *cmdtp, int flag, int argc, 439 char *const argv[]) 440 { 441 struct udevice *dev; 442 uint flags; 443 int chip; 444 int ret; 445 446 if (argc < 2) 447 return CMD_RET_USAGE; 448 449 chip = simple_strtoul(argv[1], NULL, 16); 450 ret = i2c_get_cur_bus_chip(chip, &dev); 451 if (ret) 452 return i2c_report_err(ret, I2C_ERR_READ); 453 454 if (argc > 2) { 455 flags = simple_strtoul(argv[2], NULL, 16); 456 ret = i2c_set_chip_flags(dev, flags); 457 } else { 458 ret = i2c_get_chip_flags(dev, &flags); 459 if (!ret) 460 printf("%x\n", flags); 461 } 462 if (ret) 463 return i2c_report_err(ret, I2C_ERR_READ); 464 465 return 0; 466 } 467 468 static int do_i2c_olen(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 469 { 470 struct udevice *dev; 471 uint olen; 472 int chip; 473 int ret; 474 475 if (argc < 2) 476 return CMD_RET_USAGE; 477 478 chip = simple_strtoul(argv[1], NULL, 16); 479 ret = i2c_get_cur_bus_chip(chip, &dev); 480 if (ret) 481 return i2c_report_err(ret, I2C_ERR_READ); 482 483 if (argc > 2) { 484 olen = simple_strtoul(argv[2], NULL, 16); 485 ret = i2c_set_chip_offset_len(dev, olen); 486 } else { 487 ret = i2c_get_chip_offset_len(dev); 488 if (ret >= 0) { 489 printf("%x\n", ret); 490 ret = 0; 491 } 492 } 493 if (ret) 494 return i2c_report_err(ret, I2C_ERR_READ); 495 496 return 0; 497 } 498 #endif 499 500 /** 501 * do_i2c_md() - Handle the "i2c md" command-line command 502 * @cmdtp: Command data struct pointer 503 * @flag: Command flag 504 * @argc: Command-line argument count 505 * @argv: Array of command-line arguments 506 * 507 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 508 * on error. 509 * 510 * Syntax: 511 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} 512 */ 513 static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 514 { 515 uint chip; 516 uint addr, length; 517 int alen; 518 int j, nbytes, linebytes; 519 int ret; 520 #ifdef CONFIG_DM_I2C 521 struct udevice *dev; 522 #endif 523 524 /* We use the last specified parameters, unless new ones are 525 * entered. 526 */ 527 chip = i2c_dp_last_chip; 528 addr = i2c_dp_last_addr; 529 alen = i2c_dp_last_alen; 530 length = i2c_dp_last_length; 531 532 if (argc < 3) 533 return CMD_RET_USAGE; 534 535 if ((flag & CMD_FLAG_REPEAT) == 0) { 536 /* 537 * New command specified. 538 */ 539 540 /* 541 * I2C chip address 542 */ 543 chip = simple_strtoul(argv[1], NULL, 16); 544 545 /* 546 * I2C data address within the chip. This can be 1 or 547 * 2 bytes long. Some day it might be 3 bytes long :-). 548 */ 549 addr = simple_strtoul(argv[2], NULL, 16); 550 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 551 if (alen > 3) 552 return CMD_RET_USAGE; 553 554 /* 555 * If another parameter, it is the length to display. 556 * Length is the number of objects, not number of bytes. 557 */ 558 if (argc > 3) 559 length = simple_strtoul(argv[3], NULL, 16); 560 } 561 562 #ifdef CONFIG_DM_I2C 563 ret = i2c_get_cur_bus_chip(chip, &dev); 564 if (!ret && alen != -1) 565 ret = i2c_set_chip_offset_len(dev, alen); 566 if (ret) 567 return i2c_report_err(ret, I2C_ERR_READ); 568 #endif 569 570 /* 571 * Print the lines. 572 * 573 * We buffer all read data, so we can make sure data is read only 574 * once. 575 */ 576 nbytes = length; 577 do { 578 unsigned char linebuf[DISP_LINE_LEN]; 579 unsigned char *cp; 580 581 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; 582 583 #ifdef CONFIG_DM_I2C 584 ret = dm_i2c_read(dev, addr, linebuf, linebytes); 585 #else 586 ret = i2c_read(chip, addr, alen, linebuf, linebytes); 587 #endif 588 if (ret) 589 return i2c_report_err(ret, I2C_ERR_READ); 590 else { 591 printf("%04x:", addr); 592 cp = linebuf; 593 for (j=0; j<linebytes; j++) { 594 printf(" %02x", *cp++); 595 addr++; 596 } 597 puts (" "); 598 cp = linebuf; 599 for (j=0; j<linebytes; j++) { 600 if ((*cp < 0x20) || (*cp > 0x7e)) 601 puts ("."); 602 else 603 printf("%c", *cp); 604 cp++; 605 } 606 putc ('\n'); 607 } 608 nbytes -= linebytes; 609 } while (nbytes > 0); 610 611 i2c_dp_last_chip = chip; 612 i2c_dp_last_addr = addr; 613 i2c_dp_last_alen = alen; 614 i2c_dp_last_length = length; 615 616 return 0; 617 } 618 619 /** 620 * do_i2c_mw() - Handle the "i2c mw" command-line command 621 * @cmdtp: Command data struct pointer 622 * @flag: Command flag 623 * @argc: Command-line argument count 624 * @argv: Array of command-line arguments 625 * 626 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 627 * on error. 628 * 629 * Syntax: 630 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] 631 */ 632 static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 633 { 634 uint chip; 635 ulong addr; 636 int alen; 637 uchar byte; 638 int count; 639 int ret; 640 #ifdef CONFIG_DM_I2C 641 struct udevice *dev; 642 #endif 643 644 if ((argc < 4) || (argc > 5)) 645 return CMD_RET_USAGE; 646 647 /* 648 * Chip is always specified. 649 */ 650 chip = simple_strtoul(argv[1], NULL, 16); 651 652 /* 653 * Address is always specified. 654 */ 655 addr = simple_strtoul(argv[2], NULL, 16); 656 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 657 if (alen > 3) 658 return CMD_RET_USAGE; 659 660 #ifdef CONFIG_DM_I2C 661 ret = i2c_get_cur_bus_chip(chip, &dev); 662 if (!ret && alen != -1) 663 ret = i2c_set_chip_offset_len(dev, alen); 664 if (ret) 665 return i2c_report_err(ret, I2C_ERR_WRITE); 666 #endif 667 /* 668 * Value to write is always specified. 669 */ 670 byte = simple_strtoul(argv[3], NULL, 16); 671 672 /* 673 * Optional count 674 */ 675 if (argc == 5) 676 count = simple_strtoul(argv[4], NULL, 16); 677 else 678 count = 1; 679 680 while (count-- > 0) { 681 #ifdef CONFIG_DM_I2C 682 ret = dm_i2c_write(dev, addr++, &byte, 1); 683 #else 684 ret = i2c_write(chip, addr++, alen, &byte, 1); 685 #endif 686 if (ret) 687 return i2c_report_err(ret, I2C_ERR_WRITE); 688 /* 689 * Wait for the write to complete. The write can take 690 * up to 10mSec (we allow a little more time). 691 */ 692 /* 693 * No write delay with FRAM devices. 694 */ 695 #if !defined(CONFIG_SYS_I2C_FRAM) 696 udelay(11000); 697 #endif 698 } 699 700 return 0; 701 } 702 703 /** 704 * do_i2c_crc() - Handle the "i2c crc32" command-line command 705 * @cmdtp: Command data struct pointer 706 * @flag: Command flag 707 * @argc: Command-line argument count 708 * @argv: Array of command-line arguments 709 * 710 * Calculate a CRC on memory 711 * 712 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 713 * on error. 714 * 715 * Syntax: 716 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} 717 */ 718 static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 719 { 720 uint chip; 721 ulong addr; 722 int alen; 723 int count; 724 uchar byte; 725 ulong crc; 726 ulong err; 727 int ret = 0; 728 #ifdef CONFIG_DM_I2C 729 struct udevice *dev; 730 #endif 731 732 if (argc < 4) 733 return CMD_RET_USAGE; 734 735 /* 736 * Chip is always specified. 737 */ 738 chip = simple_strtoul(argv[1], NULL, 16); 739 740 /* 741 * Address is always specified. 742 */ 743 addr = simple_strtoul(argv[2], NULL, 16); 744 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 745 if (alen > 3) 746 return CMD_RET_USAGE; 747 748 #ifdef CONFIG_DM_I2C 749 ret = i2c_get_cur_bus_chip(chip, &dev); 750 if (!ret && alen != -1) 751 ret = i2c_set_chip_offset_len(dev, alen); 752 if (ret) 753 return i2c_report_err(ret, I2C_ERR_READ); 754 #endif 755 /* 756 * Count is always specified 757 */ 758 count = simple_strtoul(argv[3], NULL, 16); 759 760 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1); 761 /* 762 * CRC a byte at a time. This is going to be slooow, but hey, the 763 * memories are small and slow too so hopefully nobody notices. 764 */ 765 crc = 0; 766 err = 0; 767 while (count-- > 0) { 768 #ifdef CONFIG_DM_I2C 769 ret = dm_i2c_read(dev, addr, &byte, 1); 770 #else 771 ret = i2c_read(chip, addr, alen, &byte, 1); 772 #endif 773 if (ret) 774 err++; 775 crc = crc32 (crc, &byte, 1); 776 addr++; 777 } 778 if (err > 0) 779 i2c_report_err(ret, I2C_ERR_READ); 780 else 781 printf ("%08lx\n", crc); 782 783 return 0; 784 } 785 786 /** 787 * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command 788 * @cmdtp: Command data struct pointer 789 * @flag: Command flag 790 * @argc: Command-line argument count 791 * @argv: Array of command-line arguments 792 * 793 * Modify memory. 794 * 795 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 796 * on error. 797 * 798 * Syntax: 799 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} 800 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} 801 */ 802 static int 803 mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) 804 { 805 uint chip; 806 ulong addr; 807 int alen; 808 ulong data; 809 int size = 1; 810 int nbytes; 811 int ret; 812 #ifdef CONFIG_DM_I2C 813 struct udevice *dev; 814 #endif 815 816 if (argc != 3) 817 return CMD_RET_USAGE; 818 819 bootretry_reset_cmd_timeout(); /* got a good command to get here */ 820 /* 821 * We use the last specified parameters, unless new ones are 822 * entered. 823 */ 824 chip = i2c_mm_last_chip; 825 addr = i2c_mm_last_addr; 826 alen = i2c_mm_last_alen; 827 828 if ((flag & CMD_FLAG_REPEAT) == 0) { 829 /* 830 * New command specified. Check for a size specification. 831 * Defaults to byte if no or incorrect specification. 832 */ 833 size = cmd_get_data_size(argv[0], 1); 834 835 /* 836 * Chip is always specified. 837 */ 838 chip = simple_strtoul(argv[1], NULL, 16); 839 840 /* 841 * Address is always specified. 842 */ 843 addr = simple_strtoul(argv[2], NULL, 16); 844 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 845 if (alen > 3) 846 return CMD_RET_USAGE; 847 } 848 849 #ifdef CONFIG_DM_I2C 850 ret = i2c_get_cur_bus_chip(chip, &dev); 851 if (!ret && alen != -1) 852 ret = i2c_set_chip_offset_len(dev, alen); 853 if (ret) 854 return i2c_report_err(ret, I2C_ERR_WRITE); 855 #endif 856 857 /* 858 * Print the address, followed by value. Then accept input for 859 * the next value. A non-converted value exits. 860 */ 861 do { 862 printf("%08lx:", addr); 863 #ifdef CONFIG_DM_I2C 864 ret = dm_i2c_read(dev, addr, (uchar *)&data, size); 865 #else 866 ret = i2c_read(chip, addr, alen, (uchar *)&data, size); 867 #endif 868 if (ret) 869 return i2c_report_err(ret, I2C_ERR_READ); 870 871 data = cpu_to_be32(data); 872 if (size == 1) 873 printf(" %02lx", (data >> 24) & 0x000000FF); 874 else if (size == 2) 875 printf(" %04lx", (data >> 16) & 0x0000FFFF); 876 else 877 printf(" %08lx", data); 878 879 nbytes = cli_readline(" ? "); 880 if (nbytes == 0) { 881 /* 882 * <CR> pressed as only input, don't modify current 883 * location and move to next. 884 */ 885 if (incrflag) 886 addr += size; 887 nbytes = size; 888 /* good enough to not time out */ 889 bootretry_reset_cmd_timeout(); 890 } 891 #ifdef CONFIG_BOOT_RETRY_TIME 892 else if (nbytes == -2) 893 break; /* timed out, exit the command */ 894 #endif 895 else { 896 char *endp; 897 898 data = simple_strtoul(console_buffer, &endp, 16); 899 if (size == 1) 900 data = data << 24; 901 else if (size == 2) 902 data = data << 16; 903 data = be32_to_cpu(data); 904 nbytes = endp - console_buffer; 905 if (nbytes) { 906 /* 907 * good enough to not time out 908 */ 909 bootretry_reset_cmd_timeout(); 910 #ifdef CONFIG_DM_I2C 911 ret = dm_i2c_write(dev, addr, (uchar *)&data, 912 size); 913 #else 914 ret = i2c_write(chip, addr, alen, 915 (uchar *)&data, size); 916 #endif 917 if (ret) 918 return i2c_report_err(ret, 919 I2C_ERR_WRITE); 920 #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 921 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); 922 #endif 923 if (incrflag) 924 addr += size; 925 } 926 } 927 } while (nbytes); 928 929 i2c_mm_last_chip = chip; 930 i2c_mm_last_addr = addr; 931 i2c_mm_last_alen = alen; 932 933 return 0; 934 } 935 936 /** 937 * do_i2c_probe() - Handle the "i2c probe" command-line command 938 * @cmdtp: Command data struct pointer 939 * @flag: Command flag 940 * @argc: Command-line argument count 941 * @argv: Array of command-line arguments 942 * 943 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 944 * on error. 945 * 946 * Syntax: 947 * i2c probe {addr} 948 * 949 * Returns zero (success) if one or more I2C devices was found 950 */ 951 static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 952 { 953 int j; 954 int addr = -1; 955 int found = 0; 956 #if defined(CONFIG_SYS_I2C_NOPROBES) 957 int k, skip; 958 unsigned int bus = GET_BUS_NUM; 959 #endif /* NOPROBES */ 960 int ret; 961 #ifdef CONFIG_DM_I2C 962 struct udevice *bus, *dev; 963 964 if (i2c_get_cur_bus(&bus)) 965 return CMD_RET_FAILURE; 966 #endif 967 968 if (argc == 2) 969 addr = simple_strtol(argv[1], 0, 16); 970 971 puts ("Valid chip addresses:"); 972 for (j = 0; j < 128; j++) { 973 if ((0 <= addr) && (j != addr)) 974 continue; 975 976 #if defined(CONFIG_SYS_I2C_NOPROBES) 977 skip = 0; 978 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { 979 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) { 980 skip = 1; 981 break; 982 } 983 } 984 if (skip) 985 continue; 986 #endif 987 #ifdef CONFIG_DM_I2C 988 ret = dm_i2c_probe(bus, j, 0, &dev); 989 #else 990 ret = i2c_probe(j); 991 #endif 992 if (ret == 0) { 993 printf(" %02X", j); 994 found++; 995 } 996 } 997 putc ('\n'); 998 999 #if defined(CONFIG_SYS_I2C_NOPROBES) 1000 puts ("Excluded chip addresses:"); 1001 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { 1002 if (COMPARE_BUS(bus,k)) 1003 printf(" %02X", NO_PROBE_ADDR(k)); 1004 } 1005 putc ('\n'); 1006 #endif 1007 1008 return (0 == found); 1009 } 1010 1011 /** 1012 * do_i2c_loop() - Handle the "i2c loop" command-line command 1013 * @cmdtp: Command data struct pointer 1014 * @flag: Command flag 1015 * @argc: Command-line argument count 1016 * @argv: Array of command-line arguments 1017 * 1018 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1019 * on error. 1020 * 1021 * Syntax: 1022 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] 1023 * {length} - Number of bytes to read 1024 * {delay} - A DECIMAL number and defaults to 1000 uSec 1025 */ 1026 static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 1027 { 1028 uint chip; 1029 int alen; 1030 uint addr; 1031 uint length; 1032 u_char bytes[16]; 1033 int delay; 1034 int ret; 1035 #ifdef CONFIG_DM_I2C 1036 struct udevice *dev; 1037 #endif 1038 1039 if (argc < 3) 1040 return CMD_RET_USAGE; 1041 1042 /* 1043 * Chip is always specified. 1044 */ 1045 chip = simple_strtoul(argv[1], NULL, 16); 1046 1047 /* 1048 * Address is always specified. 1049 */ 1050 addr = simple_strtoul(argv[2], NULL, 16); 1051 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 1052 if (alen > 3) 1053 return CMD_RET_USAGE; 1054 #ifdef CONFIG_DM_I2C 1055 ret = i2c_get_cur_bus_chip(chip, &dev); 1056 if (!ret && alen != -1) 1057 ret = i2c_set_chip_offset_len(dev, alen); 1058 if (ret) 1059 return i2c_report_err(ret, I2C_ERR_WRITE); 1060 #endif 1061 1062 /* 1063 * Length is the number of objects, not number of bytes. 1064 */ 1065 length = 1; 1066 length = simple_strtoul(argv[3], NULL, 16); 1067 if (length > sizeof(bytes)) 1068 length = sizeof(bytes); 1069 1070 /* 1071 * The delay time (uSec) is optional. 1072 */ 1073 delay = 1000; 1074 if (argc > 3) 1075 delay = simple_strtoul(argv[4], NULL, 10); 1076 /* 1077 * Run the loop... 1078 */ 1079 while (1) { 1080 #ifdef CONFIG_DM_I2C 1081 ret = dm_i2c_read(dev, addr, bytes, length); 1082 #else 1083 ret = i2c_read(chip, addr, alen, bytes, length); 1084 #endif 1085 if (ret) 1086 i2c_report_err(ret, I2C_ERR_READ); 1087 udelay(delay); 1088 } 1089 1090 /* NOTREACHED */ 1091 return 0; 1092 } 1093 1094 /* 1095 * The SDRAM command is separately configured because many 1096 * (most?) embedded boards don't use SDRAM DIMMs. 1097 * 1098 * FIXME: Document and probably move elsewhere! 1099 */ 1100 #if defined(CONFIG_CMD_SDRAM) 1101 static void print_ddr2_tcyc (u_char const b) 1102 { 1103 printf ("%d.", (b >> 4) & 0x0F); 1104 switch (b & 0x0F) { 1105 case 0x0: 1106 case 0x1: 1107 case 0x2: 1108 case 0x3: 1109 case 0x4: 1110 case 0x5: 1111 case 0x6: 1112 case 0x7: 1113 case 0x8: 1114 case 0x9: 1115 printf ("%d ns\n", b & 0x0F); 1116 break; 1117 case 0xA: 1118 puts ("25 ns\n"); 1119 break; 1120 case 0xB: 1121 puts ("33 ns\n"); 1122 break; 1123 case 0xC: 1124 puts ("66 ns\n"); 1125 break; 1126 case 0xD: 1127 puts ("75 ns\n"); 1128 break; 1129 default: 1130 puts ("?? ns\n"); 1131 break; 1132 } 1133 } 1134 1135 static void decode_bits (u_char const b, char const *str[], int const do_once) 1136 { 1137 u_char mask; 1138 1139 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) { 1140 if (b & mask) { 1141 puts (*str); 1142 if (do_once) 1143 return; 1144 } 1145 } 1146 } 1147 1148 /* 1149 * Syntax: 1150 * i2c sdram {i2c_chip} 1151 */ 1152 static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1153 { 1154 enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type; 1155 1156 uint chip; 1157 u_char data[128]; 1158 u_char cksum; 1159 int j; 1160 1161 static const char *decode_CAS_DDR2[] = { 1162 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD" 1163 }; 1164 1165 static const char *decode_CAS_default[] = { 1166 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1" 1167 }; 1168 1169 static const char *decode_CS_WE_default[] = { 1170 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0" 1171 }; 1172 1173 static const char *decode_byte21_default[] = { 1174 " TBD (bit 7)\n", 1175 " Redundant row address\n", 1176 " Differential clock input\n", 1177 " Registerd DQMB inputs\n", 1178 " Buffered DQMB inputs\n", 1179 " On-card PLL\n", 1180 " Registered address/control lines\n", 1181 " Buffered address/control lines\n" 1182 }; 1183 1184 static const char *decode_byte22_DDR2[] = { 1185 " TBD (bit 7)\n", 1186 " TBD (bit 6)\n", 1187 " TBD (bit 5)\n", 1188 " TBD (bit 4)\n", 1189 " TBD (bit 3)\n", 1190 " Supports partial array self refresh\n", 1191 " Supports 50 ohm ODT\n", 1192 " Supports weak driver\n" 1193 }; 1194 1195 static const char *decode_row_density_DDR2[] = { 1196 "512 MiB", "256 MiB", "128 MiB", "16 GiB", 1197 "8 GiB", "4 GiB", "2 GiB", "1 GiB" 1198 }; 1199 1200 static const char *decode_row_density_default[] = { 1201 "512 MiB", "256 MiB", "128 MiB", "64 MiB", 1202 "32 MiB", "16 MiB", "8 MiB", "4 MiB" 1203 }; 1204 1205 if (argc < 2) 1206 return CMD_RET_USAGE; 1207 1208 /* 1209 * Chip is always specified. 1210 */ 1211 chip = simple_strtoul (argv[1], NULL, 16); 1212 1213 if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) { 1214 puts ("No SDRAM Serial Presence Detect found.\n"); 1215 return 1; 1216 } 1217 1218 cksum = 0; 1219 for (j = 0; j < 63; j++) { 1220 cksum += data[j]; 1221 } 1222 if (cksum != data[63]) { 1223 printf ("WARNING: Configuration data checksum failure:\n" 1224 " is 0x%02x, calculated 0x%02x\n", data[63], cksum); 1225 } 1226 printf ("SPD data revision %d.%d\n", 1227 (data[62] >> 4) & 0x0F, data[62] & 0x0F); 1228 printf ("Bytes used 0x%02X\n", data[0]); 1229 printf ("Serial memory size 0x%02X\n", 1 << data[1]); 1230 1231 puts ("Memory type "); 1232 switch (data[2]) { 1233 case 2: 1234 type = EDO; 1235 puts ("EDO\n"); 1236 break; 1237 case 4: 1238 type = SDRAM; 1239 puts ("SDRAM\n"); 1240 break; 1241 case 7: 1242 type = DDR; 1243 puts("DDR\n"); 1244 break; 1245 case 8: 1246 type = DDR2; 1247 puts ("DDR2\n"); 1248 break; 1249 case 11: 1250 type = DDR3; 1251 puts("DDR3\n"); 1252 break; 1253 case 12: 1254 type = DDR4; 1255 puts("DDR4\n"); 1256 break; 1257 default: 1258 type = unknown; 1259 puts ("unknown\n"); 1260 break; 1261 } 1262 1263 puts ("Row address bits "); 1264 if ((data[3] & 0x00F0) == 0) 1265 printf ("%d\n", data[3] & 0x0F); 1266 else 1267 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F); 1268 1269 puts ("Column address bits "); 1270 if ((data[4] & 0x00F0) == 0) 1271 printf ("%d\n", data[4] & 0x0F); 1272 else 1273 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F); 1274 1275 switch (type) { 1276 case DDR2: 1277 printf ("Number of ranks %d\n", 1278 (data[5] & 0x07) + 1); 1279 break; 1280 default: 1281 printf ("Module rows %d\n", data[5]); 1282 break; 1283 } 1284 1285 switch (type) { 1286 case DDR2: 1287 printf ("Module data width %d bits\n", data[6]); 1288 break; 1289 default: 1290 printf ("Module data width %d bits\n", 1291 (data[7] << 8) | data[6]); 1292 break; 1293 } 1294 1295 puts ("Interface signal levels "); 1296 switch(data[8]) { 1297 case 0: puts ("TTL 5.0 V\n"); break; 1298 case 1: puts ("LVTTL\n"); break; 1299 case 2: puts ("HSTL 1.5 V\n"); break; 1300 case 3: puts ("SSTL 3.3 V\n"); break; 1301 case 4: puts ("SSTL 2.5 V\n"); break; 1302 case 5: puts ("SSTL 1.8 V\n"); break; 1303 default: puts ("unknown\n"); break; 1304 } 1305 1306 switch (type) { 1307 case DDR2: 1308 printf ("SDRAM cycle time "); 1309 print_ddr2_tcyc (data[9]); 1310 break; 1311 default: 1312 printf ("SDRAM cycle time %d.%d ns\n", 1313 (data[9] >> 4) & 0x0F, data[9] & 0x0F); 1314 break; 1315 } 1316 1317 switch (type) { 1318 case DDR2: 1319 printf ("SDRAM access time 0.%d%d ns\n", 1320 (data[10] >> 4) & 0x0F, data[10] & 0x0F); 1321 break; 1322 default: 1323 printf ("SDRAM access time %d.%d ns\n", 1324 (data[10] >> 4) & 0x0F, data[10] & 0x0F); 1325 break; 1326 } 1327 1328 puts ("EDC configuration "); 1329 switch (data[11]) { 1330 case 0: puts ("None\n"); break; 1331 case 1: puts ("Parity\n"); break; 1332 case 2: puts ("ECC\n"); break; 1333 default: puts ("unknown\n"); break; 1334 } 1335 1336 if ((data[12] & 0x80) == 0) 1337 puts ("No self refresh, rate "); 1338 else 1339 puts ("Self refresh, rate "); 1340 1341 switch(data[12] & 0x7F) { 1342 case 0: puts ("15.625 us\n"); break; 1343 case 1: puts ("3.9 us\n"); break; 1344 case 2: puts ("7.8 us\n"); break; 1345 case 3: puts ("31.3 us\n"); break; 1346 case 4: puts ("62.5 us\n"); break; 1347 case 5: puts ("125 us\n"); break; 1348 default: puts ("unknown\n"); break; 1349 } 1350 1351 switch (type) { 1352 case DDR2: 1353 printf ("SDRAM width (primary) %d\n", data[13]); 1354 break; 1355 default: 1356 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F); 1357 if ((data[13] & 0x80) != 0) { 1358 printf (" (second bank) %d\n", 1359 2 * (data[13] & 0x7F)); 1360 } 1361 break; 1362 } 1363 1364 switch (type) { 1365 case DDR2: 1366 if (data[14] != 0) 1367 printf ("EDC width %d\n", data[14]); 1368 break; 1369 default: 1370 if (data[14] != 0) { 1371 printf ("EDC width %d\n", 1372 data[14] & 0x7F); 1373 1374 if ((data[14] & 0x80) != 0) { 1375 printf (" (second bank) %d\n", 1376 2 * (data[14] & 0x7F)); 1377 } 1378 } 1379 break; 1380 } 1381 1382 if (DDR2 != type) { 1383 printf ("Min clock delay, back-to-back random column addresses " 1384 "%d\n", data[15]); 1385 } 1386 1387 puts ("Burst length(s) "); 1388 if (data[16] & 0x80) puts (" Page"); 1389 if (data[16] & 0x08) puts (" 8"); 1390 if (data[16] & 0x04) puts (" 4"); 1391 if (data[16] & 0x02) puts (" 2"); 1392 if (data[16] & 0x01) puts (" 1"); 1393 putc ('\n'); 1394 printf ("Number of banks %d\n", data[17]); 1395 1396 switch (type) { 1397 case DDR2: 1398 puts ("CAS latency(s) "); 1399 decode_bits (data[18], decode_CAS_DDR2, 0); 1400 putc ('\n'); 1401 break; 1402 default: 1403 puts ("CAS latency(s) "); 1404 decode_bits (data[18], decode_CAS_default, 0); 1405 putc ('\n'); 1406 break; 1407 } 1408 1409 if (DDR2 != type) { 1410 puts ("CS latency(s) "); 1411 decode_bits (data[19], decode_CS_WE_default, 0); 1412 putc ('\n'); 1413 } 1414 1415 if (DDR2 != type) { 1416 puts ("WE latency(s) "); 1417 decode_bits (data[20], decode_CS_WE_default, 0); 1418 putc ('\n'); 1419 } 1420 1421 switch (type) { 1422 case DDR2: 1423 puts ("Module attributes:\n"); 1424 if (data[21] & 0x80) 1425 puts (" TBD (bit 7)\n"); 1426 if (data[21] & 0x40) 1427 puts (" Analysis probe installed\n"); 1428 if (data[21] & 0x20) 1429 puts (" TBD (bit 5)\n"); 1430 if (data[21] & 0x10) 1431 puts (" FET switch external enable\n"); 1432 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03); 1433 if (data[20] & 0x11) { 1434 printf (" %d active registers on DIMM\n", 1435 (data[21] & 0x03) + 1); 1436 } 1437 break; 1438 default: 1439 puts ("Module attributes:\n"); 1440 if (!data[21]) 1441 puts (" (none)\n"); 1442 else 1443 decode_bits (data[21], decode_byte21_default, 0); 1444 break; 1445 } 1446 1447 switch (type) { 1448 case DDR2: 1449 decode_bits (data[22], decode_byte22_DDR2, 0); 1450 break; 1451 default: 1452 puts ("Device attributes:\n"); 1453 if (data[22] & 0x80) puts (" TBD (bit 7)\n"); 1454 if (data[22] & 0x40) puts (" TBD (bit 6)\n"); 1455 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n"); 1456 else puts (" Upper Vcc tolerance 10%\n"); 1457 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n"); 1458 else puts (" Lower Vcc tolerance 10%\n"); 1459 if (data[22] & 0x08) puts (" Supports write1/read burst\n"); 1460 if (data[22] & 0x04) puts (" Supports precharge all\n"); 1461 if (data[22] & 0x02) puts (" Supports auto precharge\n"); 1462 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n"); 1463 break; 1464 } 1465 1466 switch (type) { 1467 case DDR2: 1468 printf ("SDRAM cycle time (2nd highest CAS latency) "); 1469 print_ddr2_tcyc (data[23]); 1470 break; 1471 default: 1472 printf ("SDRAM cycle time (2nd highest CAS latency) %d." 1473 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F); 1474 break; 1475 } 1476 1477 switch (type) { 1478 case DDR2: 1479 printf ("SDRAM access from clock (2nd highest CAS latency) 0." 1480 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); 1481 break; 1482 default: 1483 printf ("SDRAM access from clock (2nd highest CAS latency) %d." 1484 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); 1485 break; 1486 } 1487 1488 switch (type) { 1489 case DDR2: 1490 printf ("SDRAM cycle time (3rd highest CAS latency) "); 1491 print_ddr2_tcyc (data[25]); 1492 break; 1493 default: 1494 printf ("SDRAM cycle time (3rd highest CAS latency) %d." 1495 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F); 1496 break; 1497 } 1498 1499 switch (type) { 1500 case DDR2: 1501 printf ("SDRAM access from clock (3rd highest CAS latency) 0." 1502 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); 1503 break; 1504 default: 1505 printf ("SDRAM access from clock (3rd highest CAS latency) %d." 1506 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); 1507 break; 1508 } 1509 1510 switch (type) { 1511 case DDR2: 1512 printf ("Minimum row precharge %d.%02d ns\n", 1513 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03)); 1514 break; 1515 default: 1516 printf ("Minimum row precharge %d ns\n", data[27]); 1517 break; 1518 } 1519 1520 switch (type) { 1521 case DDR2: 1522 printf ("Row active to row active min %d.%02d ns\n", 1523 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03)); 1524 break; 1525 default: 1526 printf ("Row active to row active min %d ns\n", data[28]); 1527 break; 1528 } 1529 1530 switch (type) { 1531 case DDR2: 1532 printf ("RAS to CAS delay min %d.%02d ns\n", 1533 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03)); 1534 break; 1535 default: 1536 printf ("RAS to CAS delay min %d ns\n", data[29]); 1537 break; 1538 } 1539 1540 printf ("Minimum RAS pulse width %d ns\n", data[30]); 1541 1542 switch (type) { 1543 case DDR2: 1544 puts ("Density of each row "); 1545 decode_bits (data[31], decode_row_density_DDR2, 1); 1546 putc ('\n'); 1547 break; 1548 default: 1549 puts ("Density of each row "); 1550 decode_bits (data[31], decode_row_density_default, 1); 1551 putc ('\n'); 1552 break; 1553 } 1554 1555 switch (type) { 1556 case DDR2: 1557 puts ("Command and Address setup "); 1558 if (data[32] >= 0xA0) { 1559 printf ("1.%d%d ns\n", 1560 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F); 1561 } else { 1562 printf ("0.%d%d ns\n", 1563 ((data[32] >> 4) & 0x0F), data[32] & 0x0F); 1564 } 1565 break; 1566 default: 1567 printf ("Command and Address setup %c%d.%d ns\n", 1568 (data[32] & 0x80) ? '-' : '+', 1569 (data[32] >> 4) & 0x07, data[32] & 0x0F); 1570 break; 1571 } 1572 1573 switch (type) { 1574 case DDR2: 1575 puts ("Command and Address hold "); 1576 if (data[33] >= 0xA0) { 1577 printf ("1.%d%d ns\n", 1578 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F); 1579 } else { 1580 printf ("0.%d%d ns\n", 1581 ((data[33] >> 4) & 0x0F), data[33] & 0x0F); 1582 } 1583 break; 1584 default: 1585 printf ("Command and Address hold %c%d.%d ns\n", 1586 (data[33] & 0x80) ? '-' : '+', 1587 (data[33] >> 4) & 0x07, data[33] & 0x0F); 1588 break; 1589 } 1590 1591 switch (type) { 1592 case DDR2: 1593 printf ("Data signal input setup 0.%d%d ns\n", 1594 (data[34] >> 4) & 0x0F, data[34] & 0x0F); 1595 break; 1596 default: 1597 printf ("Data signal input setup %c%d.%d ns\n", 1598 (data[34] & 0x80) ? '-' : '+', 1599 (data[34] >> 4) & 0x07, data[34] & 0x0F); 1600 break; 1601 } 1602 1603 switch (type) { 1604 case DDR2: 1605 printf ("Data signal input hold 0.%d%d ns\n", 1606 (data[35] >> 4) & 0x0F, data[35] & 0x0F); 1607 break; 1608 default: 1609 printf ("Data signal input hold %c%d.%d ns\n", 1610 (data[35] & 0x80) ? '-' : '+', 1611 (data[35] >> 4) & 0x07, data[35] & 0x0F); 1612 break; 1613 } 1614 1615 puts ("Manufacturer's JEDEC ID "); 1616 for (j = 64; j <= 71; j++) 1617 printf ("%02X ", data[j]); 1618 putc ('\n'); 1619 printf ("Manufacturing Location %02X\n", data[72]); 1620 puts ("Manufacturer's Part Number "); 1621 for (j = 73; j <= 90; j++) 1622 printf ("%02X ", data[j]); 1623 putc ('\n'); 1624 printf ("Revision Code %02X %02X\n", data[91], data[92]); 1625 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]); 1626 puts ("Assembly Serial Number "); 1627 for (j = 95; j <= 98; j++) 1628 printf ("%02X ", data[j]); 1629 putc ('\n'); 1630 1631 if (DDR2 != type) { 1632 printf ("Speed rating PC%d\n", 1633 data[126] == 0x66 ? 66 : data[126]); 1634 } 1635 return 0; 1636 } 1637 #endif 1638 1639 /* 1640 * Syntax: 1641 * i2c edid {i2c_chip} 1642 */ 1643 #if defined(CONFIG_I2C_EDID) 1644 int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1645 { 1646 uint chip; 1647 struct edid1_info edid; 1648 int ret; 1649 #ifdef CONFIG_DM_I2C 1650 struct udevice *dev; 1651 #endif 1652 1653 if (argc < 2) { 1654 cmd_usage(cmdtp); 1655 return 1; 1656 } 1657 1658 chip = simple_strtoul(argv[1], NULL, 16); 1659 #ifdef CONFIG_DM_I2C 1660 ret = i2c_get_cur_bus_chip(chip, &dev); 1661 if (!ret) 1662 ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid)); 1663 #else 1664 ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid)); 1665 #endif 1666 if (ret) 1667 return i2c_report_err(ret, I2C_ERR_READ); 1668 1669 if (edid_check_info(&edid)) { 1670 puts("Content isn't valid EDID.\n"); 1671 return 1; 1672 } 1673 1674 edid_print_info(&edid); 1675 return 0; 1676 1677 } 1678 #endif /* CONFIG_I2C_EDID */ 1679 1680 #ifdef CONFIG_DM_I2C 1681 static void show_bus(struct udevice *bus) 1682 { 1683 struct udevice *dev; 1684 1685 printf("Bus %d:\t%s", bus->req_seq, bus->name); 1686 if (device_active(bus)) 1687 printf(" (active %d)", bus->seq); 1688 printf("\n"); 1689 for (device_find_first_child(bus, &dev); 1690 dev; 1691 device_find_next_child(&dev)) { 1692 struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); 1693 1694 printf(" %02x: %s, offset len %x, flags %x\n", 1695 chip->chip_addr, dev->name, chip->offset_len, 1696 chip->flags); 1697 } 1698 } 1699 #endif 1700 1701 /** 1702 * do_i2c_show_bus() - Handle the "i2c bus" command-line command 1703 * @cmdtp: Command data struct pointer 1704 * @flag: Command flag 1705 * @argc: Command-line argument count 1706 * @argv: Array of command-line arguments 1707 * 1708 * Returns zero always. 1709 */ 1710 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) 1711 static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc, 1712 char * const argv[]) 1713 { 1714 if (argc == 1) { 1715 /* show all busses */ 1716 #ifdef CONFIG_DM_I2C 1717 struct udevice *bus; 1718 struct uclass *uc; 1719 int ret; 1720 1721 ret = uclass_get(UCLASS_I2C, &uc); 1722 if (ret) 1723 return CMD_RET_FAILURE; 1724 uclass_foreach_dev(bus, uc) 1725 show_bus(bus); 1726 #else 1727 int i; 1728 1729 for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) { 1730 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); 1731 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 1732 int j; 1733 1734 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { 1735 if (i2c_bus[i].next_hop[j].chip == 0) 1736 break; 1737 printf("->%s@0x%2x:%d", 1738 i2c_bus[i].next_hop[j].mux.name, 1739 i2c_bus[i].next_hop[j].chip, 1740 i2c_bus[i].next_hop[j].channel); 1741 } 1742 #endif 1743 printf("\n"); 1744 } 1745 #endif 1746 } else { 1747 int i; 1748 1749 /* show specific bus */ 1750 i = simple_strtoul(argv[1], NULL, 10); 1751 #ifdef CONFIG_DM_I2C 1752 struct udevice *bus; 1753 int ret; 1754 1755 ret = uclass_get_device_by_seq(UCLASS_I2C, i, &bus); 1756 if (ret) { 1757 printf("Invalid bus %d: err=%d\n", i, ret); 1758 return CMD_RET_FAILURE; 1759 } 1760 show_bus(bus); 1761 #else 1762 if (i >= CONFIG_SYS_NUM_I2C_BUSES) { 1763 printf("Invalid bus %d\n", i); 1764 return -1; 1765 } 1766 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); 1767 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 1768 int j; 1769 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { 1770 if (i2c_bus[i].next_hop[j].chip == 0) 1771 break; 1772 printf("->%s@0x%2x:%d", 1773 i2c_bus[i].next_hop[j].mux.name, 1774 i2c_bus[i].next_hop[j].chip, 1775 i2c_bus[i].next_hop[j].channel); 1776 } 1777 #endif 1778 printf("\n"); 1779 #endif 1780 } 1781 1782 return 0; 1783 } 1784 #endif 1785 1786 /** 1787 * do_i2c_bus_num() - Handle the "i2c dev" command-line command 1788 * @cmdtp: Command data struct pointer 1789 * @flag: Command flag 1790 * @argc: Command-line argument count 1791 * @argv: Array of command-line arguments 1792 * 1793 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1794 * on error. 1795 */ 1796 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \ 1797 defined(CONFIG_DM_I2C) 1798 static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc, 1799 char * const argv[]) 1800 { 1801 int ret = 0; 1802 int bus_no; 1803 1804 if (argc == 1) { 1805 /* querying current setting */ 1806 #ifdef CONFIG_DM_I2C 1807 struct udevice *bus; 1808 1809 if (!i2c_get_cur_bus(&bus)) 1810 bus_no = bus->seq; 1811 else 1812 bus_no = -1; 1813 #else 1814 bus_no = i2c_get_bus_num(); 1815 #endif 1816 printf("Current bus is %d\n", bus_no); 1817 } else { 1818 bus_no = simple_strtoul(argv[1], NULL, 10); 1819 #if defined(CONFIG_SYS_I2C) 1820 if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) { 1821 printf("Invalid bus %d\n", bus_no); 1822 return -1; 1823 } 1824 #endif 1825 printf("Setting bus to %d\n", bus_no); 1826 #ifdef CONFIG_DM_I2C 1827 ret = cmd_i2c_set_bus_num(bus_no); 1828 #else 1829 ret = i2c_set_bus_num(bus_no); 1830 #endif 1831 if (ret) 1832 printf("Failure changing bus number (%d)\n", ret); 1833 } 1834 1835 return ret ? CMD_RET_FAILURE : 0; 1836 } 1837 #endif /* defined(CONFIG_SYS_I2C) */ 1838 1839 /** 1840 * do_i2c_bus_speed() - Handle the "i2c speed" command-line command 1841 * @cmdtp: Command data struct pointer 1842 * @flag: Command flag 1843 * @argc: Command-line argument count 1844 * @argv: Array of command-line arguments 1845 * 1846 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1847 * on error. 1848 */ 1849 static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1850 { 1851 int speed, ret=0; 1852 1853 #ifdef CONFIG_DM_I2C 1854 struct udevice *bus; 1855 1856 if (i2c_get_cur_bus(&bus)) 1857 return 1; 1858 #endif 1859 if (argc == 1) { 1860 #ifdef CONFIG_DM_I2C 1861 speed = dm_i2c_get_bus_speed(bus); 1862 #else 1863 speed = i2c_get_bus_speed(); 1864 #endif 1865 /* querying current speed */ 1866 printf("Current bus speed=%d\n", speed); 1867 } else { 1868 speed = simple_strtoul(argv[1], NULL, 10); 1869 printf("Setting bus speed to %d Hz\n", speed); 1870 #ifdef CONFIG_DM_I2C 1871 ret = dm_i2c_set_bus_speed(bus, speed); 1872 #else 1873 ret = i2c_set_bus_speed(speed); 1874 #endif 1875 if (ret) 1876 printf("Failure changing bus speed (%d)\n", ret); 1877 } 1878 1879 return ret ? CMD_RET_FAILURE : 0; 1880 } 1881 1882 /** 1883 * do_i2c_mm() - Handle the "i2c mm" command-line command 1884 * @cmdtp: Command data struct pointer 1885 * @flag: Command flag 1886 * @argc: Command-line argument count 1887 * @argv: Array of command-line arguments 1888 * 1889 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1890 * on error. 1891 */ 1892 static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1893 { 1894 return mod_i2c_mem (cmdtp, 1, flag, argc, argv); 1895 } 1896 1897 /** 1898 * do_i2c_nm() - Handle the "i2c nm" command-line command 1899 * @cmdtp: Command data struct pointer 1900 * @flag: Command flag 1901 * @argc: Command-line argument count 1902 * @argv: Array of command-line arguments 1903 * 1904 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1905 * on error. 1906 */ 1907 static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1908 { 1909 return mod_i2c_mem (cmdtp, 0, flag, argc, argv); 1910 } 1911 1912 /** 1913 * do_i2c_reset() - Handle the "i2c reset" command-line command 1914 * @cmdtp: Command data struct pointer 1915 * @flag: Command flag 1916 * @argc: Command-line argument count 1917 * @argv: Array of command-line arguments 1918 * 1919 * Returns zero always. 1920 */ 1921 static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1922 { 1923 #if defined(CONFIG_DM_I2C) 1924 struct udevice *bus; 1925 1926 if (i2c_get_cur_bus(&bus)) 1927 return CMD_RET_FAILURE; 1928 if (i2c_deblock(bus)) { 1929 printf("Error: Not supported by the driver\n"); 1930 return CMD_RET_FAILURE; 1931 } 1932 #elif defined(CONFIG_SYS_I2C) 1933 i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr); 1934 #else 1935 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 1936 #endif 1937 return 0; 1938 } 1939 1940 static cmd_tbl_t cmd_i2c_sub[] = { 1941 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) 1942 U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""), 1943 #endif 1944 U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), 1945 #if defined(CONFIG_SYS_I2C) || \ 1946 defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C) 1947 U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), 1948 #endif /* CONFIG_I2C_MULTI_BUS */ 1949 #if defined(CONFIG_I2C_EDID) 1950 U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""), 1951 #endif /* CONFIG_I2C_EDID */ 1952 U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""), 1953 U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""), 1954 U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""), 1955 U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""), 1956 U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), 1957 U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), 1958 U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), 1959 U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""), 1960 #ifdef CONFIG_DM_I2C 1961 U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""), 1962 U_BOOT_CMD_MKENT(olen, 2, 1, do_i2c_olen, "", ""), 1963 #endif 1964 U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""), 1965 #if defined(CONFIG_CMD_SDRAM) 1966 U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""), 1967 #endif 1968 U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), 1969 }; 1970 1971 static __maybe_unused void i2c_reloc(void) 1972 { 1973 static int relocated; 1974 1975 if (!relocated) { 1976 fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); 1977 relocated = 1; 1978 }; 1979 } 1980 1981 /** 1982 * do_i2c() - Handle the "i2c" command-line command 1983 * @cmdtp: Command data struct pointer 1984 * @flag: Command flag 1985 * @argc: Command-line argument count 1986 * @argv: Array of command-line arguments 1987 * 1988 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1989 * on error. 1990 */ 1991 static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1992 { 1993 cmd_tbl_t *c; 1994 1995 #ifdef CONFIG_NEEDS_MANUAL_RELOC 1996 i2c_reloc(); 1997 #endif 1998 1999 if (argc < 2) 2000 return CMD_RET_USAGE; 2001 2002 /* Strip off leading 'i2c' command argument */ 2003 argc--; 2004 argv++; 2005 2006 c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub)); 2007 2008 if (c) 2009 return c->cmd(cmdtp, flag, argc, argv); 2010 else 2011 return CMD_RET_USAGE; 2012 } 2013 2014 /***************************************************/ 2015 #ifdef CONFIG_SYS_LONGHELP 2016 static char i2c_help_text[] = 2017 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) 2018 "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n" 2019 #endif 2020 "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" 2021 #if defined(CONFIG_SYS_I2C) || \ 2022 defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C) 2023 "i2c dev [dev] - show or set current I2C bus\n" 2024 #endif /* CONFIG_I2C_MULTI_BUS */ 2025 #if defined(CONFIG_I2C_EDID) 2026 "i2c edid chip - print EDID configuration information\n" 2027 #endif /* CONFIG_I2C_EDID */ 2028 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n" 2029 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n" 2030 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n" 2031 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n" 2032 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" 2033 "i2c probe [address] - test for and show device(s) on the I2C bus\n" 2034 "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n" 2035 "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n" 2036 " to I2C; the -s option selects bulk write in a single transaction\n" 2037 #ifdef CONFIG_DM_I2C 2038 "i2c flags chip [flags] - set or get chip flags\n" 2039 "i2c olen chip [offset_length] - set or get chip offset length\n" 2040 #endif 2041 "i2c reset - re-init the I2C Controller\n" 2042 #if defined(CONFIG_CMD_SDRAM) 2043 "i2c sdram chip - print SDRAM configuration information\n" 2044 #endif 2045 "i2c speed [speed] - show or set I2C bus speed"; 2046 #endif 2047 2048 U_BOOT_CMD( 2049 i2c, 7, 1, do_i2c, 2050 "I2C sub-system", 2051 i2c_help_text 2052 ); 2053