1 /* 2 * (C) Copyright 2009 3 * Sergey Kubushyn, himself, ksi@koi8.net 4 * 5 * Changes for unified multibus/multiadapter I2C support. 6 * 7 * (C) Copyright 2001 8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 /* 14 * I2C Functions similar to the standard memory functions. 15 * 16 * There are several parameters in many of the commands that bear further 17 * explanations: 18 * 19 * {i2c_chip} is the I2C chip address (the first byte sent on the bus). 20 * Each I2C chip on the bus has a unique address. On the I2C data bus, 21 * the address is the upper seven bits and the LSB is the "read/write" 22 * bit. Note that the {i2c_chip} address specified on the command 23 * line is not shifted up: e.g. a typical EEPROM memory chip may have 24 * an I2C address of 0x50, but the data put on the bus will be 0xA0 25 * for write and 0xA1 for read. This "non shifted" address notation 26 * matches at least half of the data sheets :-/. 27 * 28 * {addr} is the address (or offset) within the chip. Small memory 29 * chips have 8 bit addresses. Large memory chips have 16 bit 30 * addresses. Other memory chips have 9, 10, or 11 bit addresses. 31 * Many non-memory chips have multiple registers and {addr} is used 32 * as the register index. Some non-memory chips have only one register 33 * and therefore don't need any {addr} parameter. 34 * 35 * The default {addr} parameter is one byte (.1) which works well for 36 * memories and registers with 8 bits of address space. 37 * 38 * You can specify the length of the {addr} field with the optional .0, 39 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are 40 * manipulating a single register device which doesn't use an address 41 * field, use "0.0" for the address and the ".0" length field will 42 * suppress the address in the I2C data stream. This also works for 43 * successive reads using the I2C auto-incrementing memory pointer. 44 * 45 * If you are manipulating a large memory with 2-byte addresses, use 46 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal). 47 * 48 * Then there are the unfortunate memory chips that spill the most 49 * significant 1, 2, or 3 bits of address into the chip address byte. 50 * This effectively makes one chip (logically) look like 2, 4, or 51 * 8 chips. This is handled (awkwardly) by #defining 52 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the 53 * {addr} field (since .1 is the default, it doesn't actually have to 54 * be specified). Examples: given a memory chip at I2C chip address 55 * 0x50, the following would happen... 56 * i2c md 50 0 10 display 16 bytes starting at 0x000 57 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd> 58 * i2c md 50 100 10 display 16 bytes starting at 0x100 59 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd> 60 * i2c md 50 210 10 display 16 bytes starting at 0x210 61 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd> 62 * This is awfully ugly. It would be nice if someone would think up 63 * a better way of handling this. 64 * 65 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). 66 */ 67 68 #include <common.h> 69 #include <bootretry.h> 70 #include <cli.h> 71 #include <command.h> 72 #include <console.h> 73 #include <dm.h> 74 #include <edid.h> 75 #include <environment.h> 76 #include <errno.h> 77 #include <i2c.h> 78 #include <malloc.h> 79 #include <asm/byteorder.h> 80 #include <linux/compiler.h> 81 82 /* Display values from last command. 83 * Memory modify remembered values are different from display memory. 84 */ 85 static uint i2c_dp_last_chip; 86 static uint i2c_dp_last_addr; 87 static uint i2c_dp_last_alen; 88 static uint i2c_dp_last_length = 0x10; 89 90 static uint i2c_mm_last_chip; 91 static uint i2c_mm_last_addr; 92 static uint i2c_mm_last_alen; 93 94 /* If only one I2C bus is present, the list of devices to ignore when 95 * the probe command is issued is represented by a 1D array of addresses. 96 * When multiple buses are present, the list is an array of bus-address 97 * pairs. The following macros take care of this */ 98 99 #if defined(CONFIG_SYS_I2C_NOPROBES) 100 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) 101 static struct 102 { 103 uchar bus; 104 uchar addr; 105 } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; 106 #define GET_BUS_NUM i2c_get_bus_num() 107 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b)) 108 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a)) 109 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr 110 #else /* single bus */ 111 static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; 112 #define GET_BUS_NUM 0 113 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ 114 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) 115 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)] 116 #endif /* defined(CONFIG_SYS_I2C) */ 117 #endif 118 119 #define DISP_LINE_LEN 16 120 121 /* 122 * Default for driver model is to use the chip's existing address length. 123 * For legacy code, this is not stored, so we need to use a suitable 124 * default. 125 */ 126 #ifdef CONFIG_DM_I2C 127 #define DEFAULT_ADDR_LEN (-1) 128 #else 129 #define DEFAULT_ADDR_LEN 1 130 #endif 131 132 #ifdef CONFIG_DM_I2C 133 static struct udevice *i2c_cur_bus; 134 135 static int cmd_i2c_set_bus_num(unsigned int busnum) 136 { 137 struct udevice *bus; 138 int ret; 139 140 ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); 141 if (ret) { 142 debug("%s: No bus %d\n", __func__, busnum); 143 return ret; 144 } 145 i2c_cur_bus = bus; 146 147 return 0; 148 } 149 150 static int i2c_get_cur_bus(struct udevice **busp) 151 { 152 #ifdef CONFIG_I2C_SET_DEFAULT_BUS_NUM 153 if (!i2c_cur_bus) { 154 if (cmd_i2c_set_bus_num(CONFIG_I2C_DEFAULT_BUS_NUMBER)) { 155 printf("Default I2C bus %d not found\n", 156 CONFIG_I2C_DEFAULT_BUS_NUMBER); 157 return -ENODEV; 158 } 159 } 160 #endif 161 162 if (!i2c_cur_bus) { 163 puts("No I2C bus selected\n"); 164 return -ENODEV; 165 } 166 *busp = i2c_cur_bus; 167 168 return 0; 169 } 170 171 static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp) 172 { 173 struct udevice *bus; 174 int ret; 175 176 ret = i2c_get_cur_bus(&bus); 177 if (ret) 178 return ret; 179 180 return i2c_get_chip(bus, chip_addr, 1, devp); 181 } 182 183 #endif 184 185 /** 186 * i2c_init_board() - Board-specific I2C bus init 187 * 188 * This function is the default no-op implementation of I2C bus 189 * initialization. This function can be overridden by board-specific 190 * implementation if needed. 191 */ 192 __weak 193 void i2c_init_board(void) 194 { 195 } 196 197 /* TODO: Implement architecture-specific get/set functions */ 198 199 /** 200 * i2c_get_bus_speed() - Return I2C bus speed 201 * 202 * This function is the default implementation of function for retrieveing 203 * the current I2C bus speed in Hz. 204 * 205 * A driver implementing runtime switching of I2C bus speed must override 206 * this function to report the speed correctly. Simple or legacy drivers 207 * can use this fallback. 208 * 209 * Returns I2C bus speed in Hz. 210 */ 211 #if !defined(CONFIG_SYS_I2C) && !defined(CONFIG_DM_I2C) 212 /* 213 * TODO: Implement architecture-specific get/set functions 214 * Should go away, if we switched completely to new multibus support 215 */ 216 __weak 217 unsigned int i2c_get_bus_speed(void) 218 { 219 return CONFIG_SYS_I2C_SPEED; 220 } 221 222 /** 223 * i2c_set_bus_speed() - Configure I2C bus speed 224 * @speed: Newly set speed of the I2C bus in Hz 225 * 226 * This function is the default implementation of function for setting 227 * the I2C bus speed in Hz. 228 * 229 * A driver implementing runtime switching of I2C bus speed must override 230 * this function to report the speed correctly. Simple or legacy drivers 231 * can use this fallback. 232 * 233 * Returns zero on success, negative value on error. 234 */ 235 __weak 236 int i2c_set_bus_speed(unsigned int speed) 237 { 238 if (speed != CONFIG_SYS_I2C_SPEED) 239 return -1; 240 241 return 0; 242 } 243 #endif 244 245 /** 246 * get_alen() - Small parser helper function to get address length 247 * 248 * Returns the address length. 249 */ 250 static uint get_alen(char *arg, int default_len) 251 { 252 int j; 253 int alen; 254 255 alen = default_len; 256 for (j = 0; j < 8; j++) { 257 if (arg[j] == '.') { 258 alen = arg[j+1] - '0'; 259 break; 260 } else if (arg[j] == '\0') 261 break; 262 } 263 return alen; 264 } 265 266 enum i2c_err_op { 267 I2C_ERR_READ, 268 I2C_ERR_WRITE, 269 }; 270 271 static int i2c_report_err(int ret, enum i2c_err_op op) 272 { 273 printf("Error %s the chip: %d\n", 274 op == I2C_ERR_READ ? "reading" : "writing", ret); 275 276 return CMD_RET_FAILURE; 277 } 278 279 /** 280 * do_i2c_read() - Handle the "i2c read" command-line command 281 * @cmdtp: Command data struct pointer 282 * @flag: Command flag 283 * @argc: Command-line argument count 284 * @argv: Array of command-line arguments 285 * 286 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 287 * on error. 288 * 289 * Syntax: 290 * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr} 291 */ 292 static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 293 { 294 uint chip; 295 uint devaddr, length; 296 int alen; 297 u_char *memaddr; 298 int ret; 299 #ifdef CONFIG_DM_I2C 300 struct udevice *dev; 301 #endif 302 303 if (argc != 5) 304 return CMD_RET_USAGE; 305 306 /* 307 * I2C chip address 308 */ 309 chip = simple_strtoul(argv[1], NULL, 16); 310 311 /* 312 * I2C data address within the chip. This can be 1 or 313 * 2 bytes long. Some day it might be 3 bytes long :-). 314 */ 315 devaddr = simple_strtoul(argv[2], NULL, 16); 316 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 317 if (alen > 3) 318 return CMD_RET_USAGE; 319 320 /* 321 * Length is the number of objects, not number of bytes. 322 */ 323 length = simple_strtoul(argv[3], NULL, 16); 324 325 /* 326 * memaddr is the address where to store things in memory 327 */ 328 memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16); 329 330 #ifdef CONFIG_DM_I2C 331 ret = i2c_get_cur_bus_chip(chip, &dev); 332 if (!ret && alen != -1) 333 ret = i2c_set_chip_offset_len(dev, alen); 334 if (!ret) 335 ret = dm_i2c_read(dev, devaddr, memaddr, length); 336 #else 337 ret = i2c_read(chip, devaddr, alen, memaddr, length); 338 #endif 339 if (ret) 340 return i2c_report_err(ret, I2C_ERR_READ); 341 342 return 0; 343 } 344 345 static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 346 { 347 uint chip; 348 uint devaddr, length; 349 int alen; 350 u_char *memaddr; 351 int ret; 352 #ifdef CONFIG_DM_I2C 353 struct udevice *dev; 354 struct dm_i2c_chip *i2c_chip; 355 #endif 356 357 if ((argc < 5) || (argc > 6)) 358 return cmd_usage(cmdtp); 359 360 /* 361 * memaddr is the address where to store things in memory 362 */ 363 memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16); 364 365 /* 366 * I2C chip address 367 */ 368 chip = simple_strtoul(argv[2], NULL, 16); 369 370 /* 371 * I2C data address within the chip. This can be 1 or 372 * 2 bytes long. Some day it might be 3 bytes long :-). 373 */ 374 devaddr = simple_strtoul(argv[3], NULL, 16); 375 alen = get_alen(argv[3], DEFAULT_ADDR_LEN); 376 if (alen > 3) 377 return cmd_usage(cmdtp); 378 379 /* 380 * Length is the number of bytes. 381 */ 382 length = simple_strtoul(argv[4], NULL, 16); 383 384 #ifdef CONFIG_DM_I2C 385 ret = i2c_get_cur_bus_chip(chip, &dev); 386 if (!ret && alen != -1) 387 ret = i2c_set_chip_offset_len(dev, alen); 388 if (ret) 389 return i2c_report_err(ret, I2C_ERR_WRITE); 390 i2c_chip = dev_get_parent_platdata(dev); 391 if (!i2c_chip) 392 return i2c_report_err(ret, I2C_ERR_WRITE); 393 #endif 394 395 if (argc == 6 && !strcmp(argv[5], "-s")) { 396 /* 397 * Write all bytes in a single I2C transaction. If the target 398 * device is an EEPROM, it is your responsibility to not cross 399 * a page boundary. No write delay upon completion, take this 400 * into account if linking commands. 401 */ 402 #ifdef CONFIG_DM_I2C 403 i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS; 404 ret = dm_i2c_write(dev, devaddr, memaddr, length); 405 #else 406 ret = i2c_write(chip, devaddr, alen, memaddr, length); 407 #endif 408 if (ret) 409 return i2c_report_err(ret, I2C_ERR_WRITE); 410 } else { 411 /* 412 * Repeated addressing - perform <length> separate 413 * write transactions of one byte each 414 */ 415 while (length-- > 0) { 416 #ifdef CONFIG_DM_I2C 417 i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS; 418 ret = dm_i2c_write(dev, devaddr++, memaddr++, 1); 419 #else 420 ret = i2c_write(chip, devaddr++, alen, memaddr++, 1); 421 #endif 422 if (ret) 423 return i2c_report_err(ret, I2C_ERR_WRITE); 424 /* 425 * No write delay with FRAM devices. 426 */ 427 #if !defined(CONFIG_SYS_I2C_FRAM) 428 udelay(11000); 429 #endif 430 } 431 } 432 return 0; 433 } 434 435 #ifdef CONFIG_DM_I2C 436 static int do_i2c_flags(cmd_tbl_t *cmdtp, int flag, int argc, 437 char *const argv[]) 438 { 439 struct udevice *dev; 440 uint flags; 441 int chip; 442 int ret; 443 444 if (argc < 2) 445 return CMD_RET_USAGE; 446 447 chip = simple_strtoul(argv[1], NULL, 16); 448 ret = i2c_get_cur_bus_chip(chip, &dev); 449 if (ret) 450 return i2c_report_err(ret, I2C_ERR_READ); 451 452 if (argc > 2) { 453 flags = simple_strtoul(argv[2], NULL, 16); 454 ret = i2c_set_chip_flags(dev, flags); 455 } else { 456 ret = i2c_get_chip_flags(dev, &flags); 457 if (!ret) 458 printf("%x\n", flags); 459 } 460 if (ret) 461 return i2c_report_err(ret, I2C_ERR_READ); 462 463 return 0; 464 } 465 466 static int do_i2c_olen(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 467 { 468 struct udevice *dev; 469 uint olen; 470 int chip; 471 int ret; 472 473 if (argc < 2) 474 return CMD_RET_USAGE; 475 476 chip = simple_strtoul(argv[1], NULL, 16); 477 ret = i2c_get_cur_bus_chip(chip, &dev); 478 if (ret) 479 return i2c_report_err(ret, I2C_ERR_READ); 480 481 if (argc > 2) { 482 olen = simple_strtoul(argv[2], NULL, 16); 483 ret = i2c_set_chip_offset_len(dev, olen); 484 } else { 485 ret = i2c_get_chip_offset_len(dev); 486 if (ret >= 0) { 487 printf("%x\n", ret); 488 ret = 0; 489 } 490 } 491 if (ret) 492 return i2c_report_err(ret, I2C_ERR_READ); 493 494 return 0; 495 } 496 #endif 497 498 /** 499 * do_i2c_md() - Handle the "i2c md" command-line command 500 * @cmdtp: Command data struct pointer 501 * @flag: Command flag 502 * @argc: Command-line argument count 503 * @argv: Array of command-line arguments 504 * 505 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 506 * on error. 507 * 508 * Syntax: 509 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} 510 */ 511 static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 512 { 513 uint chip; 514 uint addr, length; 515 int alen; 516 int j, nbytes, linebytes; 517 int ret; 518 #ifdef CONFIG_DM_I2C 519 struct udevice *dev; 520 #endif 521 522 /* We use the last specified parameters, unless new ones are 523 * entered. 524 */ 525 chip = i2c_dp_last_chip; 526 addr = i2c_dp_last_addr; 527 alen = i2c_dp_last_alen; 528 length = i2c_dp_last_length; 529 530 if (argc < 3) 531 return CMD_RET_USAGE; 532 533 if ((flag & CMD_FLAG_REPEAT) == 0) { 534 /* 535 * New command specified. 536 */ 537 538 /* 539 * I2C chip address 540 */ 541 chip = simple_strtoul(argv[1], NULL, 16); 542 543 /* 544 * I2C data address within the chip. This can be 1 or 545 * 2 bytes long. Some day it might be 3 bytes long :-). 546 */ 547 addr = simple_strtoul(argv[2], NULL, 16); 548 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 549 if (alen > 3) 550 return CMD_RET_USAGE; 551 552 /* 553 * If another parameter, it is the length to display. 554 * Length is the number of objects, not number of bytes. 555 */ 556 if (argc > 3) 557 length = simple_strtoul(argv[3], NULL, 16); 558 } 559 560 #ifdef CONFIG_DM_I2C 561 ret = i2c_get_cur_bus_chip(chip, &dev); 562 if (!ret && alen != -1) 563 ret = i2c_set_chip_offset_len(dev, alen); 564 if (ret) 565 return i2c_report_err(ret, I2C_ERR_READ); 566 #endif 567 568 /* 569 * Print the lines. 570 * 571 * We buffer all read data, so we can make sure data is read only 572 * once. 573 */ 574 nbytes = length; 575 do { 576 unsigned char linebuf[DISP_LINE_LEN]; 577 unsigned char *cp; 578 579 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; 580 581 #ifdef CONFIG_DM_I2C 582 ret = dm_i2c_read(dev, addr, linebuf, linebytes); 583 #else 584 ret = i2c_read(chip, addr, alen, linebuf, linebytes); 585 #endif 586 if (ret) 587 return i2c_report_err(ret, I2C_ERR_READ); 588 else { 589 printf("%04x:", addr); 590 cp = linebuf; 591 for (j=0; j<linebytes; j++) { 592 printf(" %02x", *cp++); 593 addr++; 594 } 595 puts (" "); 596 cp = linebuf; 597 for (j=0; j<linebytes; j++) { 598 if ((*cp < 0x20) || (*cp > 0x7e)) 599 puts ("."); 600 else 601 printf("%c", *cp); 602 cp++; 603 } 604 putc ('\n'); 605 } 606 nbytes -= linebytes; 607 } while (nbytes > 0); 608 609 i2c_dp_last_chip = chip; 610 i2c_dp_last_addr = addr; 611 i2c_dp_last_alen = alen; 612 i2c_dp_last_length = length; 613 614 return 0; 615 } 616 617 /** 618 * do_i2c_mw() - Handle the "i2c mw" command-line command 619 * @cmdtp: Command data struct pointer 620 * @flag: Command flag 621 * @argc: Command-line argument count 622 * @argv: Array of command-line arguments 623 * 624 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 625 * on error. 626 * 627 * Syntax: 628 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] 629 */ 630 static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 631 { 632 uint chip; 633 ulong addr; 634 int alen; 635 uchar byte; 636 int count; 637 int ret; 638 #ifdef CONFIG_DM_I2C 639 struct udevice *dev; 640 #endif 641 642 if ((argc < 4) || (argc > 5)) 643 return CMD_RET_USAGE; 644 645 /* 646 * Chip is always specified. 647 */ 648 chip = simple_strtoul(argv[1], NULL, 16); 649 650 /* 651 * Address is always specified. 652 */ 653 addr = simple_strtoul(argv[2], NULL, 16); 654 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 655 if (alen > 3) 656 return CMD_RET_USAGE; 657 658 #ifdef CONFIG_DM_I2C 659 ret = i2c_get_cur_bus_chip(chip, &dev); 660 if (!ret && alen != -1) 661 ret = i2c_set_chip_offset_len(dev, alen); 662 if (ret) 663 return i2c_report_err(ret, I2C_ERR_WRITE); 664 #endif 665 /* 666 * Value to write is always specified. 667 */ 668 byte = simple_strtoul(argv[3], NULL, 16); 669 670 /* 671 * Optional count 672 */ 673 if (argc == 5) 674 count = simple_strtoul(argv[4], NULL, 16); 675 else 676 count = 1; 677 678 while (count-- > 0) { 679 #ifdef CONFIG_DM_I2C 680 ret = dm_i2c_write(dev, addr++, &byte, 1); 681 #else 682 ret = i2c_write(chip, addr++, alen, &byte, 1); 683 #endif 684 if (ret) 685 return i2c_report_err(ret, I2C_ERR_WRITE); 686 /* 687 * Wait for the write to complete. The write can take 688 * up to 10mSec (we allow a little more time). 689 */ 690 /* 691 * No write delay with FRAM devices. 692 */ 693 #if !defined(CONFIG_SYS_I2C_FRAM) 694 udelay(11000); 695 #endif 696 } 697 698 return 0; 699 } 700 701 /** 702 * do_i2c_crc() - Handle the "i2c crc32" command-line command 703 * @cmdtp: Command data struct pointer 704 * @flag: Command flag 705 * @argc: Command-line argument count 706 * @argv: Array of command-line arguments 707 * 708 * Calculate a CRC on memory 709 * 710 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 711 * on error. 712 * 713 * Syntax: 714 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} 715 */ 716 static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 717 { 718 uint chip; 719 ulong addr; 720 int alen; 721 int count; 722 uchar byte; 723 ulong crc; 724 ulong err; 725 int ret = 0; 726 #ifdef CONFIG_DM_I2C 727 struct udevice *dev; 728 #endif 729 730 if (argc < 4) 731 return CMD_RET_USAGE; 732 733 /* 734 * Chip is always specified. 735 */ 736 chip = simple_strtoul(argv[1], NULL, 16); 737 738 /* 739 * Address is always specified. 740 */ 741 addr = simple_strtoul(argv[2], NULL, 16); 742 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 743 if (alen > 3) 744 return CMD_RET_USAGE; 745 746 #ifdef CONFIG_DM_I2C 747 ret = i2c_get_cur_bus_chip(chip, &dev); 748 if (!ret && alen != -1) 749 ret = i2c_set_chip_offset_len(dev, alen); 750 if (ret) 751 return i2c_report_err(ret, I2C_ERR_READ); 752 #endif 753 /* 754 * Count is always specified 755 */ 756 count = simple_strtoul(argv[3], NULL, 16); 757 758 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1); 759 /* 760 * CRC a byte at a time. This is going to be slooow, but hey, the 761 * memories are small and slow too so hopefully nobody notices. 762 */ 763 crc = 0; 764 err = 0; 765 while (count-- > 0) { 766 #ifdef CONFIG_DM_I2C 767 ret = dm_i2c_read(dev, addr, &byte, 1); 768 #else 769 ret = i2c_read(chip, addr, alen, &byte, 1); 770 #endif 771 if (ret) 772 err++; 773 crc = crc32 (crc, &byte, 1); 774 addr++; 775 } 776 if (err > 0) 777 i2c_report_err(ret, I2C_ERR_READ); 778 else 779 printf ("%08lx\n", crc); 780 781 return 0; 782 } 783 784 /** 785 * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command 786 * @cmdtp: Command data struct pointer 787 * @flag: Command flag 788 * @argc: Command-line argument count 789 * @argv: Array of command-line arguments 790 * 791 * Modify memory. 792 * 793 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 794 * on error. 795 * 796 * Syntax: 797 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} 798 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} 799 */ 800 static int 801 mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) 802 { 803 uint chip; 804 ulong addr; 805 int alen; 806 ulong data; 807 int size = 1; 808 int nbytes; 809 int ret; 810 #ifdef CONFIG_DM_I2C 811 struct udevice *dev; 812 #endif 813 814 if (argc != 3) 815 return CMD_RET_USAGE; 816 817 bootretry_reset_cmd_timeout(); /* got a good command to get here */ 818 /* 819 * We use the last specified parameters, unless new ones are 820 * entered. 821 */ 822 chip = i2c_mm_last_chip; 823 addr = i2c_mm_last_addr; 824 alen = i2c_mm_last_alen; 825 826 if ((flag & CMD_FLAG_REPEAT) == 0) { 827 /* 828 * New command specified. Check for a size specification. 829 * Defaults to byte if no or incorrect specification. 830 */ 831 size = cmd_get_data_size(argv[0], 1); 832 833 /* 834 * Chip is always specified. 835 */ 836 chip = simple_strtoul(argv[1], NULL, 16); 837 838 /* 839 * Address is always specified. 840 */ 841 addr = simple_strtoul(argv[2], NULL, 16); 842 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 843 if (alen > 3) 844 return CMD_RET_USAGE; 845 } 846 847 #ifdef CONFIG_DM_I2C 848 ret = i2c_get_cur_bus_chip(chip, &dev); 849 if (!ret && alen != -1) 850 ret = i2c_set_chip_offset_len(dev, alen); 851 if (ret) 852 return i2c_report_err(ret, I2C_ERR_WRITE); 853 #endif 854 855 /* 856 * Print the address, followed by value. Then accept input for 857 * the next value. A non-converted value exits. 858 */ 859 do { 860 printf("%08lx:", addr); 861 #ifdef CONFIG_DM_I2C 862 ret = dm_i2c_read(dev, addr, (uchar *)&data, size); 863 #else 864 ret = i2c_read(chip, addr, alen, (uchar *)&data, size); 865 #endif 866 if (ret) 867 return i2c_report_err(ret, I2C_ERR_READ); 868 869 data = cpu_to_be32(data); 870 if (size == 1) 871 printf(" %02lx", (data >> 24) & 0x000000FF); 872 else if (size == 2) 873 printf(" %04lx", (data >> 16) & 0x0000FFFF); 874 else 875 printf(" %08lx", data); 876 877 nbytes = cli_readline(" ? "); 878 if (nbytes == 0) { 879 /* 880 * <CR> pressed as only input, don't modify current 881 * location and move to next. 882 */ 883 if (incrflag) 884 addr += size; 885 nbytes = size; 886 /* good enough to not time out */ 887 bootretry_reset_cmd_timeout(); 888 } 889 #ifdef CONFIG_BOOT_RETRY_TIME 890 else if (nbytes == -2) 891 break; /* timed out, exit the command */ 892 #endif 893 else { 894 char *endp; 895 896 data = simple_strtoul(console_buffer, &endp, 16); 897 if (size == 1) 898 data = data << 24; 899 else if (size == 2) 900 data = data << 16; 901 data = be32_to_cpu(data); 902 nbytes = endp - console_buffer; 903 if (nbytes) { 904 /* 905 * good enough to not time out 906 */ 907 bootretry_reset_cmd_timeout(); 908 #ifdef CONFIG_DM_I2C 909 ret = dm_i2c_write(dev, addr, (uchar *)&data, 910 size); 911 #else 912 ret = i2c_write(chip, addr, alen, 913 (uchar *)&data, size); 914 #endif 915 if (ret) 916 return i2c_report_err(ret, 917 I2C_ERR_WRITE); 918 #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 919 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); 920 #endif 921 if (incrflag) 922 addr += size; 923 } 924 } 925 } while (nbytes); 926 927 i2c_mm_last_chip = chip; 928 i2c_mm_last_addr = addr; 929 i2c_mm_last_alen = alen; 930 931 return 0; 932 } 933 934 /** 935 * do_i2c_probe() - Handle the "i2c probe" command-line command 936 * @cmdtp: Command data struct pointer 937 * @flag: Command flag 938 * @argc: Command-line argument count 939 * @argv: Array of command-line arguments 940 * 941 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 942 * on error. 943 * 944 * Syntax: 945 * i2c probe {addr} 946 * 947 * Returns zero (success) if one or more I2C devices was found 948 */ 949 static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 950 { 951 int j; 952 int addr = -1; 953 int found = 0; 954 #if defined(CONFIG_SYS_I2C_NOPROBES) 955 int k, skip; 956 unsigned int bus = GET_BUS_NUM; 957 #endif /* NOPROBES */ 958 int ret; 959 #ifdef CONFIG_DM_I2C 960 struct udevice *bus, *dev; 961 962 if (i2c_get_cur_bus(&bus)) 963 return CMD_RET_FAILURE; 964 #endif 965 966 if (argc == 2) 967 addr = simple_strtol(argv[1], 0, 16); 968 969 puts ("Valid chip addresses:"); 970 for (j = 0; j < 128; j++) { 971 if ((0 <= addr) && (j != addr)) 972 continue; 973 974 #if defined(CONFIG_SYS_I2C_NOPROBES) 975 skip = 0; 976 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { 977 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) { 978 skip = 1; 979 break; 980 } 981 } 982 if (skip) 983 continue; 984 #endif 985 #ifdef CONFIG_DM_I2C 986 ret = dm_i2c_probe(bus, j, 0, &dev); 987 #else 988 ret = i2c_probe(j); 989 #endif 990 if (ret == 0) { 991 printf(" %02X", j); 992 found++; 993 } 994 } 995 putc ('\n'); 996 997 #if defined(CONFIG_SYS_I2C_NOPROBES) 998 puts ("Excluded chip addresses:"); 999 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { 1000 if (COMPARE_BUS(bus,k)) 1001 printf(" %02X", NO_PROBE_ADDR(k)); 1002 } 1003 putc ('\n'); 1004 #endif 1005 1006 return (0 == found); 1007 } 1008 1009 /** 1010 * do_i2c_loop() - Handle the "i2c loop" command-line command 1011 * @cmdtp: Command data struct pointer 1012 * @flag: Command flag 1013 * @argc: Command-line argument count 1014 * @argv: Array of command-line arguments 1015 * 1016 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1017 * on error. 1018 * 1019 * Syntax: 1020 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] 1021 * {length} - Number of bytes to read 1022 * {delay} - A DECIMAL number and defaults to 1000 uSec 1023 */ 1024 static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 1025 { 1026 uint chip; 1027 int alen; 1028 uint addr; 1029 uint length; 1030 u_char bytes[16]; 1031 int delay; 1032 int ret; 1033 #ifdef CONFIG_DM_I2C 1034 struct udevice *dev; 1035 #endif 1036 1037 if (argc < 3) 1038 return CMD_RET_USAGE; 1039 1040 /* 1041 * Chip is always specified. 1042 */ 1043 chip = simple_strtoul(argv[1], NULL, 16); 1044 1045 /* 1046 * Address is always specified. 1047 */ 1048 addr = simple_strtoul(argv[2], NULL, 16); 1049 alen = get_alen(argv[2], DEFAULT_ADDR_LEN); 1050 if (alen > 3) 1051 return CMD_RET_USAGE; 1052 #ifdef CONFIG_DM_I2C 1053 ret = i2c_get_cur_bus_chip(chip, &dev); 1054 if (!ret && alen != -1) 1055 ret = i2c_set_chip_offset_len(dev, alen); 1056 if (ret) 1057 return i2c_report_err(ret, I2C_ERR_WRITE); 1058 #endif 1059 1060 /* 1061 * Length is the number of objects, not number of bytes. 1062 */ 1063 length = 1; 1064 length = simple_strtoul(argv[3], NULL, 16); 1065 if (length > sizeof(bytes)) 1066 length = sizeof(bytes); 1067 1068 /* 1069 * The delay time (uSec) is optional. 1070 */ 1071 delay = 1000; 1072 if (argc > 3) 1073 delay = simple_strtoul(argv[4], NULL, 10); 1074 /* 1075 * Run the loop... 1076 */ 1077 while (1) { 1078 #ifdef CONFIG_DM_I2C 1079 ret = dm_i2c_read(dev, addr, bytes, length); 1080 #else 1081 ret = i2c_read(chip, addr, alen, bytes, length); 1082 #endif 1083 if (ret) 1084 i2c_report_err(ret, I2C_ERR_READ); 1085 udelay(delay); 1086 } 1087 1088 /* NOTREACHED */ 1089 return 0; 1090 } 1091 1092 /* 1093 * The SDRAM command is separately configured because many 1094 * (most?) embedded boards don't use SDRAM DIMMs. 1095 * 1096 * FIXME: Document and probably move elsewhere! 1097 */ 1098 #if defined(CONFIG_CMD_SDRAM) 1099 static void print_ddr2_tcyc (u_char const b) 1100 { 1101 printf ("%d.", (b >> 4) & 0x0F); 1102 switch (b & 0x0F) { 1103 case 0x0: 1104 case 0x1: 1105 case 0x2: 1106 case 0x3: 1107 case 0x4: 1108 case 0x5: 1109 case 0x6: 1110 case 0x7: 1111 case 0x8: 1112 case 0x9: 1113 printf ("%d ns\n", b & 0x0F); 1114 break; 1115 case 0xA: 1116 puts ("25 ns\n"); 1117 break; 1118 case 0xB: 1119 puts ("33 ns\n"); 1120 break; 1121 case 0xC: 1122 puts ("66 ns\n"); 1123 break; 1124 case 0xD: 1125 puts ("75 ns\n"); 1126 break; 1127 default: 1128 puts ("?? ns\n"); 1129 break; 1130 } 1131 } 1132 1133 static void decode_bits (u_char const b, char const *str[], int const do_once) 1134 { 1135 u_char mask; 1136 1137 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) { 1138 if (b & mask) { 1139 puts (*str); 1140 if (do_once) 1141 return; 1142 } 1143 } 1144 } 1145 1146 /* 1147 * Syntax: 1148 * i2c sdram {i2c_chip} 1149 */ 1150 static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1151 { 1152 enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type; 1153 1154 uint chip; 1155 u_char data[128]; 1156 u_char cksum; 1157 int j, ret; 1158 #ifdef CONFIG_DM_I2C 1159 struct udevice *dev; 1160 #endif 1161 1162 static const char *decode_CAS_DDR2[] = { 1163 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD" 1164 }; 1165 1166 static const char *decode_CAS_default[] = { 1167 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1" 1168 }; 1169 1170 static const char *decode_CS_WE_default[] = { 1171 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0" 1172 }; 1173 1174 static const char *decode_byte21_default[] = { 1175 " TBD (bit 7)\n", 1176 " Redundant row address\n", 1177 " Differential clock input\n", 1178 " Registerd DQMB inputs\n", 1179 " Buffered DQMB inputs\n", 1180 " On-card PLL\n", 1181 " Registered address/control lines\n", 1182 " Buffered address/control lines\n" 1183 }; 1184 1185 static const char *decode_byte22_DDR2[] = { 1186 " TBD (bit 7)\n", 1187 " TBD (bit 6)\n", 1188 " TBD (bit 5)\n", 1189 " TBD (bit 4)\n", 1190 " TBD (bit 3)\n", 1191 " Supports partial array self refresh\n", 1192 " Supports 50 ohm ODT\n", 1193 " Supports weak driver\n" 1194 }; 1195 1196 static const char *decode_row_density_DDR2[] = { 1197 "512 MiB", "256 MiB", "128 MiB", "16 GiB", 1198 "8 GiB", "4 GiB", "2 GiB", "1 GiB" 1199 }; 1200 1201 static const char *decode_row_density_default[] = { 1202 "512 MiB", "256 MiB", "128 MiB", "64 MiB", 1203 "32 MiB", "16 MiB", "8 MiB", "4 MiB" 1204 }; 1205 1206 if (argc < 2) 1207 return CMD_RET_USAGE; 1208 1209 /* 1210 * Chip is always specified. 1211 */ 1212 chip = simple_strtoul (argv[1], NULL, 16); 1213 1214 #ifdef CONFIG_DM_I2C 1215 ret = i2c_get_cur_bus_chip(chip, &dev); 1216 if (!ret) 1217 ret = dm_i2c_read(dev, 0, data, sizeof(data)); 1218 #else 1219 ret = i2c_read(chip, 0, 1, data, sizeof(data)); 1220 #endif 1221 if (ret) { 1222 puts ("No SDRAM Serial Presence Detect found.\n"); 1223 return 1; 1224 } 1225 1226 cksum = 0; 1227 for (j = 0; j < 63; j++) { 1228 cksum += data[j]; 1229 } 1230 if (cksum != data[63]) { 1231 printf ("WARNING: Configuration data checksum failure:\n" 1232 " is 0x%02x, calculated 0x%02x\n", data[63], cksum); 1233 } 1234 printf ("SPD data revision %d.%d\n", 1235 (data[62] >> 4) & 0x0F, data[62] & 0x0F); 1236 printf ("Bytes used 0x%02X\n", data[0]); 1237 printf ("Serial memory size 0x%02X\n", 1 << data[1]); 1238 1239 puts ("Memory type "); 1240 switch (data[2]) { 1241 case 2: 1242 type = EDO; 1243 puts ("EDO\n"); 1244 break; 1245 case 4: 1246 type = SDRAM; 1247 puts ("SDRAM\n"); 1248 break; 1249 case 7: 1250 type = DDR; 1251 puts("DDR\n"); 1252 break; 1253 case 8: 1254 type = DDR2; 1255 puts ("DDR2\n"); 1256 break; 1257 case 11: 1258 type = DDR3; 1259 puts("DDR3\n"); 1260 break; 1261 case 12: 1262 type = DDR4; 1263 puts("DDR4\n"); 1264 break; 1265 default: 1266 type = unknown; 1267 puts ("unknown\n"); 1268 break; 1269 } 1270 1271 puts ("Row address bits "); 1272 if ((data[3] & 0x00F0) == 0) 1273 printf ("%d\n", data[3] & 0x0F); 1274 else 1275 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F); 1276 1277 puts ("Column address bits "); 1278 if ((data[4] & 0x00F0) == 0) 1279 printf ("%d\n", data[4] & 0x0F); 1280 else 1281 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F); 1282 1283 switch (type) { 1284 case DDR2: 1285 printf ("Number of ranks %d\n", 1286 (data[5] & 0x07) + 1); 1287 break; 1288 default: 1289 printf ("Module rows %d\n", data[5]); 1290 break; 1291 } 1292 1293 switch (type) { 1294 case DDR2: 1295 printf ("Module data width %d bits\n", data[6]); 1296 break; 1297 default: 1298 printf ("Module data width %d bits\n", 1299 (data[7] << 8) | data[6]); 1300 break; 1301 } 1302 1303 puts ("Interface signal levels "); 1304 switch(data[8]) { 1305 case 0: puts ("TTL 5.0 V\n"); break; 1306 case 1: puts ("LVTTL\n"); break; 1307 case 2: puts ("HSTL 1.5 V\n"); break; 1308 case 3: puts ("SSTL 3.3 V\n"); break; 1309 case 4: puts ("SSTL 2.5 V\n"); break; 1310 case 5: puts ("SSTL 1.8 V\n"); break; 1311 default: puts ("unknown\n"); break; 1312 } 1313 1314 switch (type) { 1315 case DDR2: 1316 printf ("SDRAM cycle time "); 1317 print_ddr2_tcyc (data[9]); 1318 break; 1319 default: 1320 printf ("SDRAM cycle time %d.%d ns\n", 1321 (data[9] >> 4) & 0x0F, data[9] & 0x0F); 1322 break; 1323 } 1324 1325 switch (type) { 1326 case DDR2: 1327 printf ("SDRAM access time 0.%d%d ns\n", 1328 (data[10] >> 4) & 0x0F, data[10] & 0x0F); 1329 break; 1330 default: 1331 printf ("SDRAM access time %d.%d ns\n", 1332 (data[10] >> 4) & 0x0F, data[10] & 0x0F); 1333 break; 1334 } 1335 1336 puts ("EDC configuration "); 1337 switch (data[11]) { 1338 case 0: puts ("None\n"); break; 1339 case 1: puts ("Parity\n"); break; 1340 case 2: puts ("ECC\n"); break; 1341 default: puts ("unknown\n"); break; 1342 } 1343 1344 if ((data[12] & 0x80) == 0) 1345 puts ("No self refresh, rate "); 1346 else 1347 puts ("Self refresh, rate "); 1348 1349 switch(data[12] & 0x7F) { 1350 case 0: puts ("15.625 us\n"); break; 1351 case 1: puts ("3.9 us\n"); break; 1352 case 2: puts ("7.8 us\n"); break; 1353 case 3: puts ("31.3 us\n"); break; 1354 case 4: puts ("62.5 us\n"); break; 1355 case 5: puts ("125 us\n"); break; 1356 default: puts ("unknown\n"); break; 1357 } 1358 1359 switch (type) { 1360 case DDR2: 1361 printf ("SDRAM width (primary) %d\n", data[13]); 1362 break; 1363 default: 1364 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F); 1365 if ((data[13] & 0x80) != 0) { 1366 printf (" (second bank) %d\n", 1367 2 * (data[13] & 0x7F)); 1368 } 1369 break; 1370 } 1371 1372 switch (type) { 1373 case DDR2: 1374 if (data[14] != 0) 1375 printf ("EDC width %d\n", data[14]); 1376 break; 1377 default: 1378 if (data[14] != 0) { 1379 printf ("EDC width %d\n", 1380 data[14] & 0x7F); 1381 1382 if ((data[14] & 0x80) != 0) { 1383 printf (" (second bank) %d\n", 1384 2 * (data[14] & 0x7F)); 1385 } 1386 } 1387 break; 1388 } 1389 1390 if (DDR2 != type) { 1391 printf ("Min clock delay, back-to-back random column addresses " 1392 "%d\n", data[15]); 1393 } 1394 1395 puts ("Burst length(s) "); 1396 if (data[16] & 0x80) puts (" Page"); 1397 if (data[16] & 0x08) puts (" 8"); 1398 if (data[16] & 0x04) puts (" 4"); 1399 if (data[16] & 0x02) puts (" 2"); 1400 if (data[16] & 0x01) puts (" 1"); 1401 putc ('\n'); 1402 printf ("Number of banks %d\n", data[17]); 1403 1404 switch (type) { 1405 case DDR2: 1406 puts ("CAS latency(s) "); 1407 decode_bits (data[18], decode_CAS_DDR2, 0); 1408 putc ('\n'); 1409 break; 1410 default: 1411 puts ("CAS latency(s) "); 1412 decode_bits (data[18], decode_CAS_default, 0); 1413 putc ('\n'); 1414 break; 1415 } 1416 1417 if (DDR2 != type) { 1418 puts ("CS latency(s) "); 1419 decode_bits (data[19], decode_CS_WE_default, 0); 1420 putc ('\n'); 1421 } 1422 1423 if (DDR2 != type) { 1424 puts ("WE latency(s) "); 1425 decode_bits (data[20], decode_CS_WE_default, 0); 1426 putc ('\n'); 1427 } 1428 1429 switch (type) { 1430 case DDR2: 1431 puts ("Module attributes:\n"); 1432 if (data[21] & 0x80) 1433 puts (" TBD (bit 7)\n"); 1434 if (data[21] & 0x40) 1435 puts (" Analysis probe installed\n"); 1436 if (data[21] & 0x20) 1437 puts (" TBD (bit 5)\n"); 1438 if (data[21] & 0x10) 1439 puts (" FET switch external enable\n"); 1440 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03); 1441 if (data[20] & 0x11) { 1442 printf (" %d active registers on DIMM\n", 1443 (data[21] & 0x03) + 1); 1444 } 1445 break; 1446 default: 1447 puts ("Module attributes:\n"); 1448 if (!data[21]) 1449 puts (" (none)\n"); 1450 else 1451 decode_bits (data[21], decode_byte21_default, 0); 1452 break; 1453 } 1454 1455 switch (type) { 1456 case DDR2: 1457 decode_bits (data[22], decode_byte22_DDR2, 0); 1458 break; 1459 default: 1460 puts ("Device attributes:\n"); 1461 if (data[22] & 0x80) puts (" TBD (bit 7)\n"); 1462 if (data[22] & 0x40) puts (" TBD (bit 6)\n"); 1463 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n"); 1464 else puts (" Upper Vcc tolerance 10%\n"); 1465 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n"); 1466 else puts (" Lower Vcc tolerance 10%\n"); 1467 if (data[22] & 0x08) puts (" Supports write1/read burst\n"); 1468 if (data[22] & 0x04) puts (" Supports precharge all\n"); 1469 if (data[22] & 0x02) puts (" Supports auto precharge\n"); 1470 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n"); 1471 break; 1472 } 1473 1474 switch (type) { 1475 case DDR2: 1476 printf ("SDRAM cycle time (2nd highest CAS latency) "); 1477 print_ddr2_tcyc (data[23]); 1478 break; 1479 default: 1480 printf ("SDRAM cycle time (2nd highest CAS latency) %d." 1481 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F); 1482 break; 1483 } 1484 1485 switch (type) { 1486 case DDR2: 1487 printf ("SDRAM access from clock (2nd highest CAS latency) 0." 1488 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); 1489 break; 1490 default: 1491 printf ("SDRAM access from clock (2nd highest CAS latency) %d." 1492 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); 1493 break; 1494 } 1495 1496 switch (type) { 1497 case DDR2: 1498 printf ("SDRAM cycle time (3rd highest CAS latency) "); 1499 print_ddr2_tcyc (data[25]); 1500 break; 1501 default: 1502 printf ("SDRAM cycle time (3rd highest CAS latency) %d." 1503 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F); 1504 break; 1505 } 1506 1507 switch (type) { 1508 case DDR2: 1509 printf ("SDRAM access from clock (3rd highest CAS latency) 0." 1510 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); 1511 break; 1512 default: 1513 printf ("SDRAM access from clock (3rd highest CAS latency) %d." 1514 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); 1515 break; 1516 } 1517 1518 switch (type) { 1519 case DDR2: 1520 printf ("Minimum row precharge %d.%02d ns\n", 1521 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03)); 1522 break; 1523 default: 1524 printf ("Minimum row precharge %d ns\n", data[27]); 1525 break; 1526 } 1527 1528 switch (type) { 1529 case DDR2: 1530 printf ("Row active to row active min %d.%02d ns\n", 1531 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03)); 1532 break; 1533 default: 1534 printf ("Row active to row active min %d ns\n", data[28]); 1535 break; 1536 } 1537 1538 switch (type) { 1539 case DDR2: 1540 printf ("RAS to CAS delay min %d.%02d ns\n", 1541 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03)); 1542 break; 1543 default: 1544 printf ("RAS to CAS delay min %d ns\n", data[29]); 1545 break; 1546 } 1547 1548 printf ("Minimum RAS pulse width %d ns\n", data[30]); 1549 1550 switch (type) { 1551 case DDR2: 1552 puts ("Density of each row "); 1553 decode_bits (data[31], decode_row_density_DDR2, 1); 1554 putc ('\n'); 1555 break; 1556 default: 1557 puts ("Density of each row "); 1558 decode_bits (data[31], decode_row_density_default, 1); 1559 putc ('\n'); 1560 break; 1561 } 1562 1563 switch (type) { 1564 case DDR2: 1565 puts ("Command and Address setup "); 1566 if (data[32] >= 0xA0) { 1567 printf ("1.%d%d ns\n", 1568 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F); 1569 } else { 1570 printf ("0.%d%d ns\n", 1571 ((data[32] >> 4) & 0x0F), data[32] & 0x0F); 1572 } 1573 break; 1574 default: 1575 printf ("Command and Address setup %c%d.%d ns\n", 1576 (data[32] & 0x80) ? '-' : '+', 1577 (data[32] >> 4) & 0x07, data[32] & 0x0F); 1578 break; 1579 } 1580 1581 switch (type) { 1582 case DDR2: 1583 puts ("Command and Address hold "); 1584 if (data[33] >= 0xA0) { 1585 printf ("1.%d%d ns\n", 1586 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F); 1587 } else { 1588 printf ("0.%d%d ns\n", 1589 ((data[33] >> 4) & 0x0F), data[33] & 0x0F); 1590 } 1591 break; 1592 default: 1593 printf ("Command and Address hold %c%d.%d ns\n", 1594 (data[33] & 0x80) ? '-' : '+', 1595 (data[33] >> 4) & 0x07, data[33] & 0x0F); 1596 break; 1597 } 1598 1599 switch (type) { 1600 case DDR2: 1601 printf ("Data signal input setup 0.%d%d ns\n", 1602 (data[34] >> 4) & 0x0F, data[34] & 0x0F); 1603 break; 1604 default: 1605 printf ("Data signal input setup %c%d.%d ns\n", 1606 (data[34] & 0x80) ? '-' : '+', 1607 (data[34] >> 4) & 0x07, data[34] & 0x0F); 1608 break; 1609 } 1610 1611 switch (type) { 1612 case DDR2: 1613 printf ("Data signal input hold 0.%d%d ns\n", 1614 (data[35] >> 4) & 0x0F, data[35] & 0x0F); 1615 break; 1616 default: 1617 printf ("Data signal input hold %c%d.%d ns\n", 1618 (data[35] & 0x80) ? '-' : '+', 1619 (data[35] >> 4) & 0x07, data[35] & 0x0F); 1620 break; 1621 } 1622 1623 puts ("Manufacturer's JEDEC ID "); 1624 for (j = 64; j <= 71; j++) 1625 printf ("%02X ", data[j]); 1626 putc ('\n'); 1627 printf ("Manufacturing Location %02X\n", data[72]); 1628 puts ("Manufacturer's Part Number "); 1629 for (j = 73; j <= 90; j++) 1630 printf ("%02X ", data[j]); 1631 putc ('\n'); 1632 printf ("Revision Code %02X %02X\n", data[91], data[92]); 1633 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]); 1634 puts ("Assembly Serial Number "); 1635 for (j = 95; j <= 98; j++) 1636 printf ("%02X ", data[j]); 1637 putc ('\n'); 1638 1639 if (DDR2 != type) { 1640 printf ("Speed rating PC%d\n", 1641 data[126] == 0x66 ? 66 : data[126]); 1642 } 1643 return 0; 1644 } 1645 #endif 1646 1647 /* 1648 * Syntax: 1649 * i2c edid {i2c_chip} 1650 */ 1651 #if defined(CONFIG_I2C_EDID) 1652 int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) 1653 { 1654 uint chip; 1655 struct edid1_info edid; 1656 int ret; 1657 #ifdef CONFIG_DM_I2C 1658 struct udevice *dev; 1659 #endif 1660 1661 if (argc < 2) { 1662 cmd_usage(cmdtp); 1663 return 1; 1664 } 1665 1666 chip = simple_strtoul(argv[1], NULL, 16); 1667 #ifdef CONFIG_DM_I2C 1668 ret = i2c_get_cur_bus_chip(chip, &dev); 1669 if (!ret) 1670 ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid)); 1671 #else 1672 ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid)); 1673 #endif 1674 if (ret) 1675 return i2c_report_err(ret, I2C_ERR_READ); 1676 1677 if (edid_check_info(&edid)) { 1678 puts("Content isn't valid EDID.\n"); 1679 return 1; 1680 } 1681 1682 edid_print_info(&edid); 1683 return 0; 1684 1685 } 1686 #endif /* CONFIG_I2C_EDID */ 1687 1688 #ifdef CONFIG_DM_I2C 1689 static void show_bus(struct udevice *bus) 1690 { 1691 struct udevice *dev; 1692 1693 printf("Bus %d:\t%s", bus->req_seq, bus->name); 1694 if (device_active(bus)) 1695 printf(" (active %d)", bus->seq); 1696 printf("\n"); 1697 for (device_find_first_child(bus, &dev); 1698 dev; 1699 device_find_next_child(&dev)) { 1700 struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); 1701 1702 printf(" %02x: %s, offset len %x, flags %x\n", 1703 chip->chip_addr, dev->name, chip->offset_len, 1704 chip->flags); 1705 } 1706 } 1707 #endif 1708 1709 /** 1710 * do_i2c_show_bus() - Handle the "i2c bus" command-line command 1711 * @cmdtp: Command data struct pointer 1712 * @flag: Command flag 1713 * @argc: Command-line argument count 1714 * @argv: Array of command-line arguments 1715 * 1716 * Returns zero always. 1717 */ 1718 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) 1719 static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc, 1720 char * const argv[]) 1721 { 1722 if (argc == 1) { 1723 /* show all busses */ 1724 #ifdef CONFIG_DM_I2C 1725 struct udevice *bus; 1726 struct uclass *uc; 1727 int ret; 1728 1729 ret = uclass_get(UCLASS_I2C, &uc); 1730 if (ret) 1731 return CMD_RET_FAILURE; 1732 uclass_foreach_dev(bus, uc) 1733 show_bus(bus); 1734 #else 1735 int i; 1736 1737 for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) { 1738 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); 1739 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 1740 int j; 1741 1742 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { 1743 if (i2c_bus[i].next_hop[j].chip == 0) 1744 break; 1745 printf("->%s@0x%2x:%d", 1746 i2c_bus[i].next_hop[j].mux.name, 1747 i2c_bus[i].next_hop[j].chip, 1748 i2c_bus[i].next_hop[j].channel); 1749 } 1750 #endif 1751 printf("\n"); 1752 } 1753 #endif 1754 } else { 1755 int i; 1756 1757 /* show specific bus */ 1758 i = simple_strtoul(argv[1], NULL, 10); 1759 #ifdef CONFIG_DM_I2C 1760 struct udevice *bus; 1761 int ret; 1762 1763 ret = uclass_get_device_by_seq(UCLASS_I2C, i, &bus); 1764 if (ret) { 1765 printf("Invalid bus %d: err=%d\n", i, ret); 1766 return CMD_RET_FAILURE; 1767 } 1768 show_bus(bus); 1769 #else 1770 if (i >= CONFIG_SYS_NUM_I2C_BUSES) { 1771 printf("Invalid bus %d\n", i); 1772 return -1; 1773 } 1774 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); 1775 #ifndef CONFIG_SYS_I2C_DIRECT_BUS 1776 int j; 1777 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { 1778 if (i2c_bus[i].next_hop[j].chip == 0) 1779 break; 1780 printf("->%s@0x%2x:%d", 1781 i2c_bus[i].next_hop[j].mux.name, 1782 i2c_bus[i].next_hop[j].chip, 1783 i2c_bus[i].next_hop[j].channel); 1784 } 1785 #endif 1786 printf("\n"); 1787 #endif 1788 } 1789 1790 return 0; 1791 } 1792 #endif 1793 1794 /** 1795 * do_i2c_bus_num() - Handle the "i2c dev" command-line command 1796 * @cmdtp: Command data struct pointer 1797 * @flag: Command flag 1798 * @argc: Command-line argument count 1799 * @argv: Array of command-line arguments 1800 * 1801 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1802 * on error. 1803 */ 1804 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \ 1805 defined(CONFIG_DM_I2C) 1806 static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc, 1807 char * const argv[]) 1808 { 1809 int ret = 0; 1810 int bus_no; 1811 1812 if (argc == 1) { 1813 /* querying current setting */ 1814 #ifdef CONFIG_DM_I2C 1815 struct udevice *bus; 1816 1817 if (!i2c_get_cur_bus(&bus)) 1818 bus_no = bus->seq; 1819 else 1820 bus_no = -1; 1821 #else 1822 bus_no = i2c_get_bus_num(); 1823 #endif 1824 printf("Current bus is %d\n", bus_no); 1825 } else { 1826 bus_no = simple_strtoul(argv[1], NULL, 10); 1827 #if defined(CONFIG_SYS_I2C) 1828 if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) { 1829 printf("Invalid bus %d\n", bus_no); 1830 return -1; 1831 } 1832 #endif 1833 printf("Setting bus to %d\n", bus_no); 1834 #ifdef CONFIG_DM_I2C 1835 ret = cmd_i2c_set_bus_num(bus_no); 1836 #else 1837 ret = i2c_set_bus_num(bus_no); 1838 #endif 1839 if (ret) 1840 printf("Failure changing bus number (%d)\n", ret); 1841 } 1842 1843 return ret ? CMD_RET_FAILURE : 0; 1844 } 1845 #endif /* defined(CONFIG_SYS_I2C) */ 1846 1847 /** 1848 * do_i2c_bus_speed() - Handle the "i2c speed" command-line command 1849 * @cmdtp: Command data struct pointer 1850 * @flag: Command flag 1851 * @argc: Command-line argument count 1852 * @argv: Array of command-line arguments 1853 * 1854 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1855 * on error. 1856 */ 1857 static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1858 { 1859 int speed, ret=0; 1860 1861 #ifdef CONFIG_DM_I2C 1862 struct udevice *bus; 1863 1864 if (i2c_get_cur_bus(&bus)) 1865 return 1; 1866 #endif 1867 if (argc == 1) { 1868 #ifdef CONFIG_DM_I2C 1869 speed = dm_i2c_get_bus_speed(bus); 1870 #else 1871 speed = i2c_get_bus_speed(); 1872 #endif 1873 /* querying current speed */ 1874 printf("Current bus speed=%d\n", speed); 1875 } else { 1876 speed = simple_strtoul(argv[1], NULL, 10); 1877 printf("Setting bus speed to %d Hz\n", speed); 1878 #ifdef CONFIG_DM_I2C 1879 ret = dm_i2c_set_bus_speed(bus, speed); 1880 #else 1881 ret = i2c_set_bus_speed(speed); 1882 #endif 1883 if (ret) 1884 printf("Failure changing bus speed (%d)\n", ret); 1885 } 1886 1887 return ret ? CMD_RET_FAILURE : 0; 1888 } 1889 1890 /** 1891 * do_i2c_mm() - Handle the "i2c mm" command-line command 1892 * @cmdtp: Command data struct pointer 1893 * @flag: Command flag 1894 * @argc: Command-line argument count 1895 * @argv: Array of command-line arguments 1896 * 1897 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1898 * on error. 1899 */ 1900 static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1901 { 1902 return mod_i2c_mem (cmdtp, 1, flag, argc, argv); 1903 } 1904 1905 /** 1906 * do_i2c_nm() - Handle the "i2c nm" command-line command 1907 * @cmdtp: Command data struct pointer 1908 * @flag: Command flag 1909 * @argc: Command-line argument count 1910 * @argv: Array of command-line arguments 1911 * 1912 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1913 * on error. 1914 */ 1915 static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1916 { 1917 return mod_i2c_mem (cmdtp, 0, flag, argc, argv); 1918 } 1919 1920 /** 1921 * do_i2c_reset() - Handle the "i2c reset" command-line command 1922 * @cmdtp: Command data struct pointer 1923 * @flag: Command flag 1924 * @argc: Command-line argument count 1925 * @argv: Array of command-line arguments 1926 * 1927 * Returns zero always. 1928 */ 1929 static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 1930 { 1931 #if defined(CONFIG_DM_I2C) 1932 struct udevice *bus; 1933 1934 if (i2c_get_cur_bus(&bus)) 1935 return CMD_RET_FAILURE; 1936 if (i2c_deblock(bus)) { 1937 printf("Error: Not supported by the driver\n"); 1938 return CMD_RET_FAILURE; 1939 } 1940 #elif defined(CONFIG_SYS_I2C) 1941 i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr); 1942 #else 1943 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 1944 #endif 1945 return 0; 1946 } 1947 1948 static cmd_tbl_t cmd_i2c_sub[] = { 1949 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) 1950 U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""), 1951 #endif 1952 U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), 1953 #if defined(CONFIG_SYS_I2C) || \ 1954 defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C) 1955 U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), 1956 #endif /* CONFIG_I2C_MULTI_BUS */ 1957 #if defined(CONFIG_I2C_EDID) 1958 U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""), 1959 #endif /* CONFIG_I2C_EDID */ 1960 U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""), 1961 U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""), 1962 U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""), 1963 U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""), 1964 U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), 1965 U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), 1966 U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), 1967 U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""), 1968 #ifdef CONFIG_DM_I2C 1969 U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""), 1970 U_BOOT_CMD_MKENT(olen, 2, 1, do_i2c_olen, "", ""), 1971 #endif 1972 U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""), 1973 #if defined(CONFIG_CMD_SDRAM) 1974 U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""), 1975 #endif 1976 U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), 1977 }; 1978 1979 static __maybe_unused void i2c_reloc(void) 1980 { 1981 static int relocated; 1982 1983 if (!relocated) { 1984 fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); 1985 relocated = 1; 1986 }; 1987 } 1988 1989 /** 1990 * do_i2c() - Handle the "i2c" command-line command 1991 * @cmdtp: Command data struct pointer 1992 * @flag: Command flag 1993 * @argc: Command-line argument count 1994 * @argv: Array of command-line arguments 1995 * 1996 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative 1997 * on error. 1998 */ 1999 static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) 2000 { 2001 cmd_tbl_t *c; 2002 2003 #ifdef CONFIG_NEEDS_MANUAL_RELOC 2004 i2c_reloc(); 2005 #endif 2006 2007 if (argc < 2) 2008 return CMD_RET_USAGE; 2009 2010 /* Strip off leading 'i2c' command argument */ 2011 argc--; 2012 argv++; 2013 2014 c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub)); 2015 2016 if (c) 2017 return c->cmd(cmdtp, flag, argc, argv); 2018 else 2019 return CMD_RET_USAGE; 2020 } 2021 2022 /***************************************************/ 2023 #ifdef CONFIG_SYS_LONGHELP 2024 static char i2c_help_text[] = 2025 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) 2026 "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n" 2027 #endif 2028 "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" 2029 #if defined(CONFIG_SYS_I2C) || \ 2030 defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C) 2031 "i2c dev [dev] - show or set current I2C bus\n" 2032 #endif /* CONFIG_I2C_MULTI_BUS */ 2033 #if defined(CONFIG_I2C_EDID) 2034 "i2c edid chip - print EDID configuration information\n" 2035 #endif /* CONFIG_I2C_EDID */ 2036 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n" 2037 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n" 2038 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n" 2039 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n" 2040 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" 2041 "i2c probe [address] - test for and show device(s) on the I2C bus\n" 2042 "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n" 2043 "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n" 2044 " to I2C; the -s option selects bulk write in a single transaction\n" 2045 #ifdef CONFIG_DM_I2C 2046 "i2c flags chip [flags] - set or get chip flags\n" 2047 "i2c olen chip [offset_length] - set or get chip offset length\n" 2048 #endif 2049 "i2c reset - re-init the I2C Controller\n" 2050 #if defined(CONFIG_CMD_SDRAM) 2051 "i2c sdram chip - print SDRAM configuration information\n" 2052 #endif 2053 "i2c speed [speed] - show or set I2C bus speed"; 2054 #endif 2055 2056 U_BOOT_CMD( 2057 i2c, 7, 1, do_i2c, 2058 "I2C sub-system", 2059 i2c_help_text 2060 ); 2061