xref: /openbmc/u-boot/cmd/aspeed/nettest/phy.h (revision afbe0405)
1 /*
2  *  This program is distributed in the hope that it will be useful,
3  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
4  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
5  *  GNU General Public License for more details.
6  *
7  *  You should have received a copy of the GNU General Public License
8  *  along with this program; if not, write to the Free Software
9  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
10  */
11 
12 #ifndef PHY_H
13 #define PHY_H
14 
15 //
16 // Define
17 //
18 #define ENABLE_SCAN_PHY_ID             //[ON] (Search vlid PHY ID)
19 #define ENABLE_CHK_ZERO_PHY_ID          //[ON] (Check PHY ID with value 0)
20 
21 #ifdef ENABLE_CHK_ZERO_PHY_ID
22   #define PHY_IS_VALID( dat )      ( ( (dat & 0xffff) != 0xffff ) && ( ( dat & 0xffff ) != 0x0 ) )
23 #else
24   #define PHY_IS_VALID( dat )      ( ( dat & 0xffff) != 0xffff )
25 #endif
26 
27 // Define PHY basic register
28 #define PHY_REG_BMCR    0x00 // Basic Mode Control Register
29 #define PHY_REG_BMSR    0x01 // Basic Mode Status Register
30 #define PHY_REG_ID_1    0x02
31 #define PHY_REG_ID_2    0x03
32 #define PHY_ANER        0x06 // Auto-negotiation Expansion Register
33 #define PHY_GBCR        0x09 // 1000Base-T Control Register
34 #define PHY_SR          0x11 // PHY Specific Status Register
35 #define PHY_INER        0x12 // Interrupt Enable Register
36 
37 #define PHYID3_Mask                0xfc00         //0xffc0
38 
39 /* --- Note for SettingPHY chip ---
40 void phy_xxxx (int loop_phy) {
41 
42 	if ( BurstEnable ) {
43         // IEEE test
44 	}
45 	else if (loop_phy) {
46         // Internal loop back
47 	}
48 	else {
49         // external loop back
50 	}
51 }
52 ----------------------------------- */
53 
54 #endif // PHY_H
55