1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) ASPEED Technology Inc. 4 */ 5 6 #ifndef PHY_H 7 #define PHY_H 8 9 // 10 // Define 11 // 12 13 #define PHY_IS_VALID(dat) \ 14 (((dat & 0xffff) != 0xffff) && ((dat & 0xffff) != 0x0)) 15 16 // Define PHY basic register 17 #define PHY_REG_BMCR 0x00 // Basic Mode Control Register 18 #define PHY_REG_BMSR 0x01 // Basic Mode Status Register 19 #define PHY_REG_ID_1 0x02 20 #define PHY_REG_ID_2 0x03 21 #define PHY_ANER 0x06 // Auto-negotiation Expansion Register 22 #define PHY_GBCR 0x09 // 1000Base-T Control Register 23 #define PHY_SR 0x11 // PHY Specific Status Register 24 #define PHY_INER 0x12 // Interrupt Enable Register 25 26 #define PHYID3_Mask 0xfc00 //0xffc0 27 28 /* --- Note for SettingPHY chip --- 29 void phy_xxxx (int loop_phy) { 30 31 if ( BurstEnable ) { 32 // IEEE test 33 } 34 else if (loop_phy) { 35 // Internal loop back 36 } 37 else { 38 // external loop back 39 } 40 } 41 ----------------------------------- */ 42 43 #endif // PHY_H 44