1 /* 2 * Copyright (C) 2009 3 * Marek Vasut <marek.vasut@gmail.com> 4 * 5 * Heavily based on pxa255_idp platform 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <command.h> 12 #include <serial.h> 13 #include <asm/arch/hardware.h> 14 #include <asm/arch/pxa.h> 15 #include <asm/arch/regs-mmc.h> 16 #include <spi.h> 17 #include <asm/io.h> 18 #include <usb.h> 19 #include <asm/mach-types.h> 20 21 DECLARE_GLOBAL_DATA_PTR; 22 23 #ifdef CONFIG_CMD_SPI 24 void lcd_start(void); 25 #else 26 inline void lcd_start(void) {}; 27 #endif 28 29 /* 30 * Miscelaneous platform dependent initialisations 31 */ 32 int board_init(void) 33 { 34 /* arch number of Z2 */ 35 gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2; 36 37 /* adress of boot parameters */ 38 gd->bd->bi_boot_params = 0xa0000100; 39 40 /* Enable LCD */ 41 lcd_start(); 42 43 return 0; 44 } 45 46 int dram_init(void) 47 { 48 pxa2xx_dram_init(); 49 gd->ram_size = PHYS_SDRAM_1_SIZE; 50 return 0; 51 } 52 53 #ifdef CONFIG_CMD_USB 54 int board_usb_init(int index, enum usb_init_type init) 55 { 56 /* enable port 2 */ 57 writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS | 58 UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR); 59 60 return 0; 61 } 62 63 int board_usb_cleanup(int index, enum usb_init_type init) 64 { 65 return 0; 66 } 67 68 void usb_board_stop(void) 69 { 70 } 71 #endif 72 73 int dram_init_banksize(void) 74 { 75 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 76 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 77 78 return 0; 79 } 80 81 #ifdef CONFIG_CMD_MMC 82 int board_mmc_init(bd_t *bis) 83 { 84 pxa_mmc_register(0); 85 return 0; 86 } 87 #endif 88 89 #ifdef CONFIG_CMD_SPI 90 91 struct { 92 unsigned char reg; 93 unsigned short data; 94 unsigned char mdelay; 95 } lcd_data[] = { 96 { 0x07, 0x0000, 0 }, 97 { 0x13, 0x0000, 10 }, 98 { 0x11, 0x3004, 0 }, 99 { 0x14, 0x200F, 0 }, 100 { 0x10, 0x1a20, 0 }, 101 { 0x13, 0x0040, 50 }, 102 { 0x13, 0x0060, 0 }, 103 { 0x13, 0x0070, 200 }, 104 { 0x01, 0x0127, 0 }, 105 { 0x02, 0x0700, 0 }, 106 { 0x03, 0x1030, 0 }, 107 { 0x08, 0x0208, 0 }, 108 { 0x0B, 0x0620, 0 }, 109 { 0x0C, 0x0110, 0 }, 110 { 0x30, 0x0120, 0 }, 111 { 0x31, 0x0127, 0 }, 112 { 0x32, 0x0000, 0 }, 113 { 0x33, 0x0503, 0 }, 114 { 0x34, 0x0727, 0 }, 115 { 0x35, 0x0124, 0 }, 116 { 0x36, 0x0706, 0 }, 117 { 0x37, 0x0701, 0 }, 118 { 0x38, 0x0F00, 0 }, 119 { 0x39, 0x0F00, 0 }, 120 { 0x40, 0x0000, 0 }, 121 { 0x41, 0x0000, 0 }, 122 { 0x42, 0x013f, 0 }, 123 { 0x43, 0x0000, 0 }, 124 { 0x44, 0x013f, 0 }, 125 { 0x45, 0x0000, 0 }, 126 { 0x46, 0xef00, 0 }, 127 { 0x47, 0x013f, 0 }, 128 { 0x48, 0x0000, 0 }, 129 { 0x07, 0x0015, 30 }, 130 { 0x07, 0x0017, 0 }, 131 { 0x20, 0x0000, 0 }, 132 { 0x21, 0x0000, 0 }, 133 { 0x22, 0x0000, 0 }, 134 }; 135 136 void zipitz2_spi_sda(int set) 137 { 138 /* GPIO 13 */ 139 if (set) 140 writel((1 << 13), GPSR0); 141 else 142 writel((1 << 13), GPCR0); 143 } 144 145 void zipitz2_spi_scl(int set) 146 { 147 /* GPIO 22 */ 148 if (set) 149 writel((1 << 22), GPCR0); 150 else 151 writel((1 << 22), GPSR0); 152 } 153 154 unsigned char zipitz2_spi_read(void) 155 { 156 /* GPIO 40 */ 157 return !!(readl(GPLR1) & (1 << 8)); 158 } 159 160 int spi_cs_is_valid(unsigned int bus, unsigned int cs) 161 { 162 /* Always valid */ 163 return 1; 164 } 165 166 void spi_cs_activate(struct spi_slave *slave) 167 { 168 /* GPIO 88 low */ 169 writel((1 << 24), GPCR2); 170 } 171 172 void spi_cs_deactivate(struct spi_slave *slave) 173 { 174 /* GPIO 88 high */ 175 writel((1 << 24), GPSR2); 176 } 177 178 void lcd_start(void) 179 { 180 int i; 181 unsigned char reg[3] = { 0x74, 0x00, 0 }; 182 unsigned char data[3] = { 0x76, 0, 0 }; 183 unsigned char dummy[3] = { 0, 0, 0 }; 184 185 /* PWM2 AF */ 186 writel(readl(GAFR0_L) | 0x00800000, GAFR0_L); 187 /* Enable clock to all PWM */ 188 writel(readl(CKEN) | 0x3, CKEN); 189 /* Configure PWM2 */ 190 writel(0x4f, PWM_CTRL2); 191 writel(0x2ff, PWM_PWDUTY2); 192 writel(792, PWM_PERVAL2); 193 194 /* Toggle the reset pin to reset the LCD */ 195 writel((1 << 19), GPSR0); 196 udelay(100000); 197 writel((1 << 19), GPCR0); 198 udelay(20000); 199 writel((1 << 19), GPSR0); 200 udelay(20000); 201 202 /* Program the LCD init sequence */ 203 for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) { 204 reg[0] = 0x74; 205 reg[1] = 0x0; 206 reg[2] = lcd_data[i].reg; 207 spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END); 208 209 data[0] = 0x76; 210 data[1] = lcd_data[i].data >> 8; 211 data[2] = lcd_data[i].data & 0xff; 212 spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END); 213 214 if (lcd_data[i].mdelay) 215 udelay(lcd_data[i].mdelay * 1000); 216 } 217 218 writel((1 << 11), GPSR0); 219 } 220 #endif 221