1 /* 2 * Copyright (C) 2009 3 * Marek Vasut <marek.vasut@gmail.com> 4 * 5 * Heavily based on pxa255_idp platform 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #include <common.h> 27 #include <command.h> 28 #include <serial.h> 29 #include <asm/arch/hardware.h> 30 #include <asm/arch/pxa.h> 31 #include <spi.h> 32 #include <asm/io.h> 33 34 DECLARE_GLOBAL_DATA_PTR; 35 36 #ifdef CONFIG_CMD_SPI 37 void lcd_start(void); 38 #else 39 inline void lcd_start(void) {}; 40 #endif 41 42 /* 43 * Miscelaneous platform dependent initialisations 44 */ 45 46 int board_init (void) 47 { 48 /* We have RAM, disable cache */ 49 dcache_disable(); 50 icache_disable(); 51 52 /* arch number of Z2 */ 53 gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2; 54 55 /* adress of boot parameters */ 56 gd->bd->bi_boot_params = 0xa0000100; 57 58 /* Enable LCD */ 59 lcd_start(); 60 61 return 0; 62 } 63 64 struct serial_device *default_serial_console (void) 65 { 66 return &serial_stuart_device; 67 } 68 69 int dram_init(void) 70 { 71 pxa2xx_dram_init(); 72 gd->ram_size = PHYS_SDRAM_1_SIZE; 73 return 0; 74 } 75 76 void dram_init_banksize(void) 77 { 78 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; 79 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; 80 } 81 82 #ifdef CONFIG_CMD_SPI 83 84 struct { 85 unsigned char reg; 86 unsigned short data; 87 unsigned char mdelay; 88 } lcd_data[] = { 89 { 0x07, 0x0000, 0 }, 90 { 0x13, 0x0000, 10 }, 91 { 0x11, 0x3004, 0 }, 92 { 0x14, 0x200F, 0 }, 93 { 0x10, 0x1a20, 0 }, 94 { 0x13, 0x0040, 50 }, 95 { 0x13, 0x0060, 0 }, 96 { 0x13, 0x0070, 200 }, 97 { 0x01, 0x0127, 0 }, 98 { 0x02, 0x0700, 0 }, 99 { 0x03, 0x1030, 0 }, 100 { 0x08, 0x0208, 0 }, 101 { 0x0B, 0x0620, 0 }, 102 { 0x0C, 0x0110, 0 }, 103 { 0x30, 0x0120, 0 }, 104 { 0x31, 0x0127, 0 }, 105 { 0x32, 0x0000, 0 }, 106 { 0x33, 0x0503, 0 }, 107 { 0x34, 0x0727, 0 }, 108 { 0x35, 0x0124, 0 }, 109 { 0x36, 0x0706, 0 }, 110 { 0x37, 0x0701, 0 }, 111 { 0x38, 0x0F00, 0 }, 112 { 0x39, 0x0F00, 0 }, 113 { 0x40, 0x0000, 0 }, 114 { 0x41, 0x0000, 0 }, 115 { 0x42, 0x013f, 0 }, 116 { 0x43, 0x0000, 0 }, 117 { 0x44, 0x013f, 0 }, 118 { 0x45, 0x0000, 0 }, 119 { 0x46, 0xef00, 0 }, 120 { 0x47, 0x013f, 0 }, 121 { 0x48, 0x0000, 0 }, 122 { 0x07, 0x0015, 30 }, 123 { 0x07, 0x0017, 0 }, 124 { 0x20, 0x0000, 0 }, 125 { 0x21, 0x0000, 0 }, 126 { 0x22, 0x0000, 0 }, 127 }; 128 129 void zipitz2_spi_sda(int set) 130 { 131 /* GPIO 13 */ 132 if (set) 133 writel((1 << 13), GPSR0); 134 else 135 writel((1 << 13), GPCR0); 136 } 137 138 void zipitz2_spi_scl(int set) 139 { 140 /* GPIO 22 */ 141 if (set) 142 writel((1 << 22), GPCR0); 143 else 144 writel((1 << 22), GPSR0); 145 } 146 147 unsigned char zipitz2_spi_read(void) 148 { 149 /* GPIO 40 */ 150 return !!(readl(GPLR1) & (1 << 8)); 151 } 152 153 int spi_cs_is_valid(unsigned int bus, unsigned int cs) 154 { 155 /* Always valid */ 156 return 1; 157 } 158 159 void spi_cs_activate(struct spi_slave *slave) 160 { 161 /* GPIO 88 low */ 162 writel((1 << 24), GPCR2); 163 } 164 165 void spi_cs_deactivate(struct spi_slave *slave) 166 { 167 /* GPIO 88 high */ 168 writel((1 << 24), GPSR2); 169 170 } 171 172 void lcd_start(void) 173 { 174 int i; 175 unsigned char reg[3] = { 0x74, 0x00, 0 }; 176 unsigned char data[3] = { 0x76, 0, 0 }; 177 unsigned char dummy[3] = { 0, 0, 0 }; 178 179 /* PWM2 AF */ 180 writel(readl(GAFR0_L) | 0x00800000, GAFR0_L); 181 /* Enable clock to all PWM */ 182 writel(readl(CKEN) | 0x3, CKEN); 183 /* Configure PWM2 */ 184 writel(0x4f, PWM_CTRL2); 185 writel(0x2ff, PWM_PWDUTY2); 186 writel(792, PWM_PERVAL2); 187 188 /* Toggle the reset pin to reset the LCD */ 189 writel((1 << 19), GPSR0); 190 udelay(100000); 191 writel((1 << 19), GPCR0); 192 udelay(20000); 193 writel((1 << 19), GPSR0); 194 udelay(20000); 195 196 /* Program the LCD init sequence */ 197 for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) { 198 reg[0] = 0x74; 199 reg[1] = 0x0; 200 reg[2] = lcd_data[i].reg; 201 spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END); 202 203 data[0] = 0x76; 204 data[1] = lcd_data[i].data >> 8; 205 data[2] = lcd_data[i].data & 0xff; 206 spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END); 207 208 if (lcd_data[i].mdelay) 209 udelay(lcd_data[i].mdelay * 1000); 210 } 211 212 writel((1 << 11), GPSR0); 213 } 214 #endif 215