xref: /openbmc/u-boot/board/zipitz2/zipitz2.c (revision 45c710dd)
1 /*
2  * Copyright (C) 2009
3  * Marek Vasut <marek.vasut@gmail.com>
4  *
5  * Heavily based on pxa255_idp platform
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 #include <common.h>
27 #include <command.h>
28 #include <serial.h>
29 #include <asm/arch/hardware.h>
30 #include <spi.h>
31 
32 DECLARE_GLOBAL_DATA_PTR;
33 
34 #ifdef	CONFIG_CMD_SPI
35 void lcd_start(void);
36 #else
37 inline void lcd_start(void) {};
38 #endif
39 
40 /*
41  * Miscelaneous platform dependent initialisations
42  */
43 
44 int board_init (void)
45 {
46 	/* memory and cpu-speed are setup before relocation */
47 	/* so we do _nothing_ here */
48 
49 	/* arch number of Lubbock-Board */
50 	gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
51 
52 	/* adress of boot parameters */
53 	gd->bd->bi_boot_params = 0xa0000100;
54 
55 	/* Enable LCD */
56 	lcd_start();
57 
58 	return 0;
59 }
60 
61 int board_late_init(void)
62 {
63 	setenv("stdout", "serial");
64 	setenv("stderr", "serial");
65 	return 0;
66 }
67 
68 struct serial_device *default_serial_console (void)
69 {
70 	return &serial_stuart_device;
71 }
72 
73 int dram_init (void)
74 {
75 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
76 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
77 
78 	return 0;
79 }
80 
81 #ifdef	CONFIG_CMD_SPI
82 
83 struct {
84 	unsigned char	reg;
85 	unsigned short	data;
86 	unsigned char	mdelay;
87 } lcd_data[] = {
88 	{ 0x07,	0x0000,	0 },
89 	{ 0x13,	0x0000,	10 },
90 	{ 0x11,	0x3004,	0 },
91 	{ 0x14,	0x200F,	0 },
92 	{ 0x10,	0x1a20,	0 },
93 	{ 0x13,	0x0040,	50 },
94 	{ 0x13,	0x0060,	0 },
95 	{ 0x13,	0x0070,	200 },
96 	{ 0x01,	0x0127,	0 },
97 	{ 0x02,	0x0700,	0 },
98 	{ 0x03,	0x1030,	0 },
99 	{ 0x08,	0x0208,	0 },
100 	{ 0x0B,	0x0620,	0 },
101 	{ 0x0C,	0x0110,	0 },
102 	{ 0x30,	0x0120,	0 },
103 	{ 0x31,	0x0127,	0 },
104 	{ 0x32,	0x0000,	0 },
105 	{ 0x33,	0x0503,	0 },
106 	{ 0x34,	0x0727,	0 },
107 	{ 0x35,	0x0124,	0 },
108 	{ 0x36,	0x0706,	0 },
109 	{ 0x37,	0x0701,	0 },
110 	{ 0x38,	0x0F00,	0 },
111 	{ 0x39,	0x0F00,	0 },
112 	{ 0x40,	0x0000,	0 },
113 	{ 0x41,	0x0000,	0 },
114 	{ 0x42,	0x013f,	0 },
115 	{ 0x43,	0x0000,	0 },
116 	{ 0x44,	0x013f,	0 },
117 	{ 0x45,	0x0000,	0 },
118 	{ 0x46,	0xef00,	0 },
119 	{ 0x47,	0x013f,	0 },
120 	{ 0x48,	0x0000,	0 },
121 	{ 0x07,	0x0015,	30 },
122 	{ 0x07,	0x0017,	0 },
123 	{ 0x20,	0x0000,	0 },
124 	{ 0x21,	0x0000,	0 },
125 	{ 0x22,	0x0000,	0 },
126 };
127 
128 void zipitz2_spi_sda(int set)
129 {
130 	/* GPIO 13 */
131 	if (set)
132 		GPSR0 = (1 << 13);
133 	else
134 		GPCR0 = (1 << 13);
135 }
136 
137 void zipitz2_spi_scl(int set)
138 {
139 	/* GPIO 22 */
140 	if (set)
141 		GPCR0 = (1 << 22);
142 	else
143 		GPSR0 = (1 << 22);
144 }
145 
146 unsigned char zipitz2_spi_read(void)
147 {
148 	/* GPIO 40 */
149 	return !!(GPLR1 & (1 << 8));
150 }
151 
152 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
153 {
154 	/* Always valid */
155 	return 1;
156 }
157 
158 void spi_cs_activate(struct spi_slave *slave)
159 {
160 	/* GPIO 88 low */
161 	GPCR2 = (1 << 24);
162 }
163 
164 void spi_cs_deactivate(struct spi_slave *slave)
165 {
166 	/* GPIO 88 high */
167 	GPSR2 = (1 << 24);
168 
169 }
170 
171 void lcd_start(void)
172 {
173 	int i;
174 	unsigned char reg[3] = { 0x74, 0x00, 0 };
175 	unsigned char data[3] = { 0x76, 0, 0 };
176 	unsigned char dummy[3] = { 0, 0, 0 };
177 
178 	/* PWM2 AF */
179 	GAFR0_L |= 0x00800000;
180 	/* Enable clock to all PWM */
181 	CKEN |= 0x3;
182 	/* Configure PWM2 */
183 	PWM_CTRL2 = 0x4f;
184 	PWM_PWDUTY2 = 0x2ff;
185 	PWM_PERVAL2 = 792;
186 
187 	/* Toggle the reset pin to reset the LCD */
188 	GPSR0 = (1 << 19);
189 	udelay(100000);
190 	GPCR0 = (1 << 19);
191 	udelay(20000);
192 	GPSR0 = (1 << 19);
193 	udelay(20000);
194 
195 	/* Program the LCD init sequence */
196 	for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) {
197 		reg[0] = 0x74;
198 		reg[1] = 0x0;
199 		reg[2] = lcd_data[i].reg;
200 		spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
201 
202 		data[0] = 0x76;
203 		data[1] = lcd_data[i].data >> 8;
204 		data[2] = lcd_data[i].data & 0xff;
205 		spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
206 
207 		if (lcd_data[i].mdelay)
208 			udelay(lcd_data[i].mdelay * 1000);
209 	}
210 
211 	GPSR0 = (1 << 11);
212 }
213 #endif
214