xref: /openbmc/u-boot/board/zipitz2/zipitz2.c (revision 1d2c0506)
1 /*
2  * Copyright (C) 2009
3  * Marek Vasut <marek.vasut@gmail.com>
4  *
5  * Heavily based on pxa255_idp platform
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #include <common.h>
11 #include <command.h>
12 #include <serial.h>
13 #include <asm/arch/hardware.h>
14 #include <asm/arch/pxa.h>
15 #include <asm/arch/regs-mmc.h>
16 #include <spi.h>
17 #include <asm/io.h>
18 #include <usb.h>
19 
20 DECLARE_GLOBAL_DATA_PTR;
21 
22 #ifdef	CONFIG_CMD_SPI
23 void lcd_start(void);
24 #else
25 inline void lcd_start(void) {};
26 #endif
27 
28 /*
29  * Miscelaneous platform dependent initialisations
30  */
31 int board_init(void)
32 {
33 	/* arch number of Z2 */
34 	gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
35 
36 	/* adress of boot parameters */
37 	gd->bd->bi_boot_params = 0xa0000100;
38 
39 	/* Enable LCD */
40 	lcd_start();
41 
42 	return 0;
43 }
44 
45 int dram_init(void)
46 {
47 	pxa2xx_dram_init();
48 	gd->ram_size = PHYS_SDRAM_1_SIZE;
49 	return 0;
50 }
51 
52 #ifdef	CONFIG_CMD_USB
53 int board_usb_init(int index, enum usb_init_type init)
54 {
55 	/* enable port 2 */
56 	writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
57 		UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
58 
59 	return 0;
60 }
61 
62 int board_usb_cleanup(int index, enum usb_init_type init)
63 {
64 	return 0;
65 }
66 
67 void usb_board_stop(void)
68 {
69 }
70 #endif
71 
72 void dram_init_banksize(void)
73 {
74 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
75 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
76 }
77 
78 #ifdef	CONFIG_CMD_MMC
79 int board_mmc_init(bd_t *bis)
80 {
81 	pxa_mmc_register(0);
82 	return 0;
83 }
84 #endif
85 
86 #ifdef	CONFIG_CMD_SPI
87 
88 struct {
89 	unsigned char	reg;
90 	unsigned short	data;
91 	unsigned char	mdelay;
92 } lcd_data[] = {
93 	{ 0x07,	0x0000,	0 },
94 	{ 0x13,	0x0000,	10 },
95 	{ 0x11,	0x3004,	0 },
96 	{ 0x14,	0x200F,	0 },
97 	{ 0x10,	0x1a20,	0 },
98 	{ 0x13,	0x0040,	50 },
99 	{ 0x13,	0x0060,	0 },
100 	{ 0x13,	0x0070,	200 },
101 	{ 0x01,	0x0127,	0 },
102 	{ 0x02,	0x0700,	0 },
103 	{ 0x03,	0x1030,	0 },
104 	{ 0x08,	0x0208,	0 },
105 	{ 0x0B,	0x0620,	0 },
106 	{ 0x0C,	0x0110,	0 },
107 	{ 0x30,	0x0120,	0 },
108 	{ 0x31,	0x0127,	0 },
109 	{ 0x32,	0x0000,	0 },
110 	{ 0x33,	0x0503,	0 },
111 	{ 0x34,	0x0727,	0 },
112 	{ 0x35,	0x0124,	0 },
113 	{ 0x36,	0x0706,	0 },
114 	{ 0x37,	0x0701,	0 },
115 	{ 0x38,	0x0F00,	0 },
116 	{ 0x39,	0x0F00,	0 },
117 	{ 0x40,	0x0000,	0 },
118 	{ 0x41,	0x0000,	0 },
119 	{ 0x42,	0x013f,	0 },
120 	{ 0x43,	0x0000,	0 },
121 	{ 0x44,	0x013f,	0 },
122 	{ 0x45,	0x0000,	0 },
123 	{ 0x46,	0xef00,	0 },
124 	{ 0x47,	0x013f,	0 },
125 	{ 0x48,	0x0000,	0 },
126 	{ 0x07,	0x0015,	30 },
127 	{ 0x07,	0x0017,	0 },
128 	{ 0x20,	0x0000,	0 },
129 	{ 0x21,	0x0000,	0 },
130 	{ 0x22,	0x0000,	0 },
131 };
132 
133 void zipitz2_spi_sda(int set)
134 {
135 	/* GPIO 13 */
136 	if (set)
137 		writel((1 << 13), GPSR0);
138 	else
139 		writel((1 << 13), GPCR0);
140 }
141 
142 void zipitz2_spi_scl(int set)
143 {
144 	/* GPIO 22 */
145 	if (set)
146 		writel((1 << 22), GPCR0);
147 	else
148 		writel((1 << 22), GPSR0);
149 }
150 
151 unsigned char zipitz2_spi_read(void)
152 {
153 	/* GPIO 40 */
154 	return !!(readl(GPLR1) & (1 << 8));
155 }
156 
157 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
158 {
159 	/* Always valid */
160 	return 1;
161 }
162 
163 void spi_cs_activate(struct spi_slave *slave)
164 {
165 	/* GPIO 88 low */
166 	writel((1 << 24), GPCR2);
167 }
168 
169 void spi_cs_deactivate(struct spi_slave *slave)
170 {
171 	/* GPIO 88 high */
172 	writel((1 << 24), GPSR2);
173 }
174 
175 void lcd_start(void)
176 {
177 	int i;
178 	unsigned char reg[3] = { 0x74, 0x00, 0 };
179 	unsigned char data[3] = { 0x76, 0, 0 };
180 	unsigned char dummy[3] = { 0, 0, 0 };
181 
182 	/* PWM2 AF */
183 	writel(readl(GAFR0_L) | 0x00800000, GAFR0_L);
184 	/* Enable clock to all PWM */
185 	writel(readl(CKEN) | 0x3, CKEN);
186 	/* Configure PWM2 */
187 	writel(0x4f, PWM_CTRL2);
188 	writel(0x2ff, PWM_PWDUTY2);
189 	writel(792, PWM_PERVAL2);
190 
191 	/* Toggle the reset pin to reset the LCD */
192 	writel((1 << 19), GPSR0);
193 	udelay(100000);
194 	writel((1 << 19), GPCR0);
195 	udelay(20000);
196 	writel((1 << 19), GPSR0);
197 	udelay(20000);
198 
199 	/* Program the LCD init sequence */
200 	for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) {
201 		reg[0] = 0x74;
202 		reg[1] = 0x0;
203 		reg[2] = lcd_data[i].reg;
204 		spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
205 
206 		data[0] = 0x76;
207 		data[1] = lcd_data[i].data >> 8;
208 		data[2] = lcd_data[i].data & 0xff;
209 		spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
210 
211 		if (lcd_data[i].mdelay)
212 			udelay(lcd_data[i].mdelay * 1000);
213 	}
214 
215 	writel((1 << 11), GPSR0);
216 }
217 #endif
218