1 /* 2 * (c) Copyright 2015 Xilinx, Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <asm/arch/psu_init_gpl.h> 8 #include <xil_io.h> 9 10 static unsigned long psu_pll_init_data(void) 11 { 12 psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U); 13 psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U); 14 psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); 15 psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); 16 psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); 17 mask_poll(0xFF5E0040, 0x00000002U); 18 psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); 19 psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U); 20 psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x00000000U); 21 psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU); 22 psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U); 23 psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); 24 psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); 25 psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); 26 mask_poll(0xFF5E0040, 0x00000001U); 27 psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); 28 psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); 29 psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U); 30 psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); 31 psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U); 32 psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); 33 psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); 34 psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); 35 mask_poll(0xFD1A0044, 0x00000001U); 36 psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); 37 psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); 38 psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U); 39 psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); 40 psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U); 41 psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); 42 psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); 43 psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); 44 mask_poll(0xFD1A0044, 0x00000002U); 45 psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); 46 psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U); 47 psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U); 48 psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U); 49 psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U); 50 psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); 51 psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); 52 psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); 53 mask_poll(0xFD1A0044, 0x00000004U); 54 psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); 55 psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U); 56 psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x00000000U); 57 58 return 1; 59 } 60 61 static unsigned long psu_clock_init_data(void) 62 { 63 psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U); 64 psu_mask_write(0xFF5E0064, 0x023F3F07U, 0x02010600U); 65 psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x020F0500U); 66 psu_mask_write(0xFF5E006C, 0x013F3F07U, 0x01010800U); 67 psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010800U); 68 psu_mask_write(0xFF18030C, 0x00020003U, 0x00000000U); 69 psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); 70 psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U); 71 psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U); 72 psu_mask_write(0xFF5E007C, 0x013F3F07U, 0x01010800U); 73 psu_mask_write(0xFF5E0080, 0x013F3F07U, 0x01010800U); 74 psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); 75 psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U); 76 psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U); 77 psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); 78 psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); 79 psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); 80 psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); 81 psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U); 82 psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U); 83 psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U); 84 psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U); 85 psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U); 86 psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); 87 psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); 88 psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010400U); 89 psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U); 90 psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U); 91 psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); 92 psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); 93 psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000400U); 94 psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U); 95 psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U); 96 psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U); 97 psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U); 98 psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); 99 psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); 100 psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); 101 psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); 102 psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); 103 psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); 104 105 return 1; 106 } 107 108 static unsigned long psu_ddr_init_data(void) 109 { 110 psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); 111 psu_mask_write(0xFD070000, 0xE30FBE3DU, 0xC3081020U); 112 psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); 113 psu_mask_write(0xFD070020, 0x000003F3U, 0x00000102U); 114 psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x0028B090U); 115 psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); 116 psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00404310U); 117 psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); 118 psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U); 119 psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); 120 psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x00208030U); 121 psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); 122 psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); 123 psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); 124 psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0030051FU); 125 psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x0002020AU); 126 psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00360000U); 127 psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00001205U); 128 psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x00240012U); 129 psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00310008U); 130 psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U); 131 psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x00000000U); 132 psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x00000000U); 133 psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); 134 psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000077FU); 135 psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x0E0B010CU); 136 psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00030412U); 137 psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x04070F0DU); 138 psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x00A05000U); 139 psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x05040306U); 140 psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x01020404U); 141 psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U); 142 psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000201U); 143 psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030303U); 144 psu_mask_write(0xFD070124, 0x40070F3FU, 0x0004040DU); 145 psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x440C011CU); 146 psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); 147 psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x810B0008U); 148 psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x00E32DCBU); 149 psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B8206U); 150 psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U); 151 psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); 152 psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); 153 psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U); 154 psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00A00070U); 155 psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000004U); 156 psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000901U); 157 psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U); 158 psu_mask_write(0xFD070200, 0x0000001FU, 0x00000015U); 159 psu_mask_write(0xFD070204, 0x001F1F1FU, 0x00070707U); 160 psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U); 161 psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x0F000000U); 162 psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU); 163 psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x060F0606U); 164 psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F060606U); 165 psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU); 166 psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000000U); 167 psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x06060606U); 168 psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x06060606U); 169 psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000006U); 170 psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x04000400U); 171 psu_mask_write(0xFD070244, 0x00003333U, 0x00000000U); 172 psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); 173 psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); 174 psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); 175 psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U); 176 psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U); 177 psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U); 178 psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U); 179 psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U); 180 psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); 181 psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); 182 psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); 183 psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); 184 psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); 185 psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); 186 psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); 187 psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); 188 psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); 189 psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); 190 psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); 191 psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); 192 psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); 193 psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); 194 psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); 195 psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); 196 psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); 197 psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); 198 psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); 199 psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); 200 psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); 201 psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); 202 psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); 203 psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); 204 psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); 205 psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); 206 psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); 207 psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); 208 psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); 209 psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); 210 psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); 211 psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); 212 psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); 213 psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); 214 psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); 215 psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); 216 psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); 217 psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); 218 psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); 219 psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); 220 psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); 221 psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); 222 psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); 223 psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); 224 psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); 225 psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); 226 psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U); 227 psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x87001E00U); 228 psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F03D28U); 229 psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); 230 psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); 231 psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x85642AD0U); 232 psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xA0AA0580U); 233 psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x05102000U); 234 psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A040A1U); 235 psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U); 236 psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0000040DU); 237 psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06180C08U); 238 psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x2816050AU); 239 psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00080064U); 240 psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x82000501U); 241 psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x00602B08U); 242 psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00231008U); 243 psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x0000080EU); 244 psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); 245 psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); 246 psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); 247 psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000000U); 248 psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000000U); 249 psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000024U); 250 psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000012U); 251 psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000031U); 252 psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000008U); 253 psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x00000000U); 254 psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000000U); 255 psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000056U); 256 psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x00000021U); 257 psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); 258 psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x00000019U); 259 psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000016U); 260 psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x810091C7U); 261 psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00030236U); 262 psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); 263 psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); 264 psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12340800U); 265 psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x0000000AU); 266 psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); 267 psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x00000000U); 268 psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000005U); 269 psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x00000000U); 270 psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300BD99U); 271 psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF1032019U); 272 psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); 273 psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); 274 psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); 275 psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); 276 psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); 277 psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); 278 psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); 279 psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x00894C58U); 280 psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x0001B39BU); 281 psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); 282 psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); 283 psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x0001BB9BU); 284 psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); 285 psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00F50CU); 286 psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09091616U); 287 psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); 288 psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); 289 psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00F50CU); 290 psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09091616U); 291 psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); 292 psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); 293 psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); 294 psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00F50CU); 295 psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09091616U); 296 psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); 297 psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); 298 psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); 299 psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00F50CU); 300 psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09091616U); 301 psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); 302 psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U); 303 psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007F00U); 304 psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00BD0CU); 305 psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09091616U); 306 psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); 307 psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U); 308 psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007F00U); 309 psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00BD0CU); 310 psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09091616U); 311 psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); 312 psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U); 313 psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007F00U); 314 psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00BD0CU); 315 psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09091616U); 316 psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); 317 psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U); 318 psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007F00U); 319 psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00BD0CU); 320 psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09091616U); 321 psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); 322 psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U); 323 psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U); 324 psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00BD0CU); 325 psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09091616U); 326 psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); 327 psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); 328 psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x05102000U); 329 psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); 330 psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x000C1800U); 331 psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x71000000U); 332 psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); 333 psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x05102000U); 334 psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); 335 psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x000C1800U); 336 psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x71000000U); 337 psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU); 338 psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x05102000U); 339 psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U); 340 psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x000C1800U); 341 psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x71000000U); 342 psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU); 343 psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x05102000U); 344 psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U); 345 psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x000C1800U); 346 psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x71000000U); 347 psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU); 348 psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x05102000U); 349 psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U); 350 psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x000C1800U); 351 psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x71000000U); 352 psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x05102000U); 353 psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); 354 355 return 1; 356 } 357 358 static unsigned long psu_ddr_qos_init_data(void) 359 { 360 psu_mask_write(0xFD090000, 0x0000FFFFU, 0x00000845U); 361 psu_mask_write(0xFD090004, 0x002DB5ADU, 0x002DB5ADU); 362 psu_mask_write(0xFD090800, 0xFFFFFFFFU, 0x00000001U); 363 psu_mask_write(0xFD09000C, 0x0000007FU, 0x00000010U); 364 psu_mask_write(0xFD090010, 0x0000007FU, 0x00000010U); 365 psu_mask_write(0xFD380008, 0x0000000FU, 0x00000007U); 366 psu_mask_write(0xFD38001C, 0x0000000FU, 0x0000000FU); 367 psu_mask_write(0xFD390008, 0x0000000FU, 0x00000003U); 368 psu_mask_write(0xFD39001C, 0x0000000FU, 0x00000003U); 369 psu_mask_write(0xFD3A0008, 0x0000000FU, 0x00000003U); 370 psu_mask_write(0xFD3A001C, 0x0000000FU, 0x00000003U); 371 psu_mask_write(0xFD3B0008, 0x0000000FU, 0x00000003U); 372 psu_mask_write(0xFD3B001C, 0x0000000FU, 0x00000003U); 373 374 return 1; 375 } 376 377 static unsigned long psu_mio_init_data(void) 378 { 379 psu_mask_write(0xFF180000, 0x000000FEU, 0x000000C0U); 380 psu_mask_write(0xFF180004, 0x000000FEU, 0x000000C0U); 381 psu_mask_write(0xFF180008, 0x000000FEU, 0x000000C0U); 382 psu_mask_write(0xFF18000C, 0x000000FEU, 0x000000C0U); 383 psu_mask_write(0xFF180010, 0x000000FEU, 0x00000040U); 384 psu_mask_write(0xFF180014, 0x000000FEU, 0x00000040U); 385 psu_mask_write(0xFF180018, 0x000000FEU, 0x00000080U); 386 psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000000U); 387 psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U); 388 psu_mask_write(0xFF180024, 0x000000FEU, 0x00000080U); 389 psu_mask_write(0xFF180028, 0x000000FEU, 0x00000080U); 390 psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000080U); 391 psu_mask_write(0xFF180030, 0x000000FEU, 0x00000000U); 392 psu_mask_write(0xFF180034, 0x000000FEU, 0x00000008U); 393 psu_mask_write(0xFF180038, 0x000000FEU, 0x00000008U); 394 psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000008U); 395 psu_mask_write(0xFF180040, 0x000000FEU, 0x00000008U); 396 psu_mask_write(0xFF180044, 0x000000FEU, 0x00000000U); 397 psu_mask_write(0xFF180048, 0x000000FEU, 0x00000000U); 398 psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000000U); 399 psu_mask_write(0xFF180050, 0x000000FEU, 0x00000000U); 400 psu_mask_write(0xFF180054, 0x000000FEU, 0x00000008U); 401 psu_mask_write(0xFF180058, 0x000000FEU, 0x00000008U); 402 psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U); 403 psu_mask_write(0xFF180060, 0x000000FEU, 0x00000008U); 404 psu_mask_write(0xFF180064, 0x000000FEU, 0x00000000U); 405 psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U); 406 psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U); 407 psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U); 408 psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U); 409 psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U); 410 psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); 411 psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U); 412 psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U); 413 psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U); 414 psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U); 415 psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U); 416 psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U); 417 psu_mask_write(0xFF180098, 0x000000FEU, 0x00000080U); 418 psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000000U); 419 psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000000U); 420 psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000080U); 421 psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000080U); 422 psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000080U); 423 psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000000U); 424 psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000000U); 425 psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U); 426 psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U); 427 psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U); 428 psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U); 429 psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U); 430 psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U); 431 psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U); 432 psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U); 433 psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U); 434 psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U); 435 psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U); 436 psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U); 437 psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U); 438 psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U); 439 psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U); 440 psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U); 441 psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U); 442 psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U); 443 psu_mask_write(0xFF180100, 0x000000FEU, 0x00000004U); 444 psu_mask_write(0xFF180104, 0x000000FEU, 0x00000004U); 445 psu_mask_write(0xFF180108, 0x000000FEU, 0x00000004U); 446 psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000004U); 447 psu_mask_write(0xFF180110, 0x000000FEU, 0x00000004U); 448 psu_mask_write(0xFF180114, 0x000000FEU, 0x00000004U); 449 psu_mask_write(0xFF180118, 0x000000FEU, 0x00000004U); 450 psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000004U); 451 psu_mask_write(0xFF180120, 0x000000FEU, 0x00000004U); 452 psu_mask_write(0xFF180124, 0x000000FEU, 0x00000004U); 453 psu_mask_write(0xFF180128, 0x000000FEU, 0x00000004U); 454 psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000004U); 455 psu_mask_write(0xFF180130, 0x000000FEU, 0x00000000U); 456 psu_mask_write(0xFF180134, 0x000000FEU, 0x00000000U); 457 psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x51000006U); 458 psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B00000U); 459 psu_mask_write(0xFF18020C, 0x00003FFFU, 0x0000000BU); 460 psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x039E1FFFU); 461 psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); 462 psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); 463 psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); 464 psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); 465 psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); 466 psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); 467 psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); 468 psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); 469 psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); 470 psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); 471 psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); 472 psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); 473 psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); 474 psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); 475 psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); 476 psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); 477 psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); 478 psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); 479 480 return 1; 481 } 482 483 static unsigned long psu_peripherals_init_data(void) 484 { 485 psu_mask_write(0xFD1A0100, 0x0001007CU, 0x00000000U); 486 psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U); 487 psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U); 488 psu_mask_write(0xFF5E023C, 0x00000FC0U, 0x00000000U); 489 psu_mask_write(0xFF5E0238, 0x00000060U, 0x00000000U); 490 psu_mask_write(0xFF180310, 0x00008001U, 0x00000000U); 491 psu_mask_write(0xFF180320, 0x33803380U, 0x00800080U); 492 psu_mask_write(0xFF18031C, 0x00007FFEU, 0x00006450U); 493 psu_mask_write(0xFF180358, 0x00080000U, 0x00080000U); 494 psu_mask_write(0xFF18031C, 0x7FFE0000U, 0x64500000U); 495 psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U); 496 psu_mask_write(0xFF180324, 0x000003C0U, 0x00000000U); 497 psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U); 498 psu_mask_write(0xFF5E0238, 0x00000400U, 0x00000000U); 499 psu_mask_write(0xFF5E0238, 0x00000018U, 0x00000000U); 500 psu_mask_write(0xFF5E0238, 0x00000800U, 0x00000000U); 501 psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U); 502 psu_mask_write(0xFD4AB120, 0x00000007U, 0x00000007U); 503 psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U); 504 psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU); 505 psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U); 506 psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U); 507 psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U); 508 psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU); 509 psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U); 510 psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U); 511 psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U); 512 psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); 513 psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); 514 psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); 515 psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); 516 psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD17U); 517 psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); 518 519 return 1; 520 } 521 522 static unsigned long psu_serdes_init_data(void) 523 { 524 psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U); 525 psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U); 526 psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U); 527 psu_mask_write(0xFD41000C, 0x0000001FU, 0x00000008U); 528 psu_mask_write(0xFD402860, 0x00000082U, 0x00000002U); 529 psu_mask_write(0xFD402864, 0x00000080U, 0x00000080U); 530 psu_mask_write(0xFD402868, 0x00000081U, 0x00000001U); 531 psu_mask_write(0xFD40286C, 0x00000081U, 0x00000001U); 532 psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U); 533 psu_mask_write(0xFD40E094, 0x00000010U, 0x00000010U); 534 psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U); 535 psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U); 536 psu_mask_write(0xFD40E368, 0x000000FFU, 0x00000038U); 537 psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U); 538 psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U); 539 psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U); 540 psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U); 541 psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U); 542 psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU); 543 psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U); 544 psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U); 545 psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U); 546 psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU); 547 psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U); 548 psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U); 549 psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U); 550 psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U); 551 psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U); 552 psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U); 553 psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U); 554 psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000F4U); 555 psu_mask_write(0xFD40E374, 0x000000FFU, 0x00000031U); 556 psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000002U); 557 psu_mask_write(0xFD40E37C, 0x00000033U, 0x00000030U); 558 psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U); 559 psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U); 560 psu_mask_write(0xFD40D06C, 0x00000003U, 0x00000003U); 561 psu_mask_write(0xFD40C0F4, 0x00000003U, 0x00000003U); 562 psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U); 563 psu_mask_write(0xFD40D0CC, 0x00000020U, 0x00000020U); 564 psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); 565 psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); 566 psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); 567 psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); 568 psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); 569 psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); 570 psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U); 571 psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU); 572 psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU); 573 psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U); 574 psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU); 575 psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U); 576 psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU); 577 psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U); 578 psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU); 579 psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U); 580 psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U); 581 psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U); 582 psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U); 583 psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); 584 psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U); 585 psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000001AU); 586 psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000001AU); 587 psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000010U); 588 psu_mask_write(0xFD40D924, 0x000000FFU, 0x000000FEU); 589 psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000000U); 590 psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000001AU); 591 psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000000U); 592 psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU); 593 psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U); 594 psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U); 595 psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U); 596 psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U); 597 psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); 598 psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); 599 psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); 600 psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); 601 psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); 602 psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); 603 psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); 604 psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); 605 psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); 606 psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); 607 psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); 608 psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); 609 psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); 610 psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); 611 psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); 612 psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); 613 psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); 614 psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); 615 psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); 616 psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); 617 psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); 618 psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U); 619 psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U); 620 psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U); 621 psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U); 622 psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U); 623 psu_mask_write(0xFD410014, 0x00000077U, 0x00000033U); 624 psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U); 625 psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U); 626 psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U); 627 psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U); 628 psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U); 629 psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U); 630 psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U); 631 psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U); 632 633 return 1; 634 } 635 636 static unsigned long psu_resetout_init_data(void) 637 { 638 psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); 639 psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U); 640 psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U); 641 psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U); 642 psu_mask_write(0xFF5E023C, 0x00000800U, 0x00000000U); 643 psu_mask_write(0xFF9E0080, 0x00000001U, 0x00000001U); 644 psu_mask_write(0xFF9E007C, 0x00000001U, 0x00000000U); 645 psu_mask_write(0xFF5E023C, 0x00000280U, 0x00000000U); 646 psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U); 647 psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U); 648 psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U); 649 psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U); 650 psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U); 651 psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U); 652 psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U); 653 psu_mask_write(0xFE30C200, 0x00023FFFU, 0x00022457U); 654 psu_mask_write(0xFE30C630, 0x003FFF00U, 0x00000000U); 655 psu_mask_write(0xFE30C12C, 0x00004000U, 0x00004000U); 656 psu_mask_write(0xFE30C11C, 0x00000600U, 0x00000600U); 657 psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); 658 mask_poll(0xFD4063E4, 0x00000010U); 659 mask_poll(0xFD40A3E4, 0x00000010U); 660 mask_poll(0xFD40E3E4, 0x00000010U); 661 662 return 1; 663 } 664 665 static unsigned long psu_resetin_init_data(void) 666 { 667 psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U); 668 psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000A80U); 669 psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU); 670 psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U); 671 psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U); 672 673 return 1; 674 } 675 676 static unsigned long psu_afi_config(void) 677 { 678 psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U); 679 psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U); 680 psu_mask_write(0xFF419000, 0x00000300U, 0x00000000U); 681 682 return 1; 683 } 684 685 static unsigned long psu_ddr_phybringup_data(void) 686 { 687 unsigned int regval = 0; 688 unsigned int pll_retry = 10; 689 unsigned int pll_locked = 0; 690 691 while ((pll_retry > 0) && (!pll_locked)) { 692 Xil_Out32(0xFD080004, 0x00040010); 693 Xil_Out32(0xFD080004, 0x00040011); 694 695 while ((Xil_In32(0xFD080030) & 0x1) != 1) 696 ; 697 698 pll_locked = (Xil_In32(0xFD080030) & 0x80000000) 699 >> 31; 700 pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) 701 >> 16; 702 pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) 703 >> 16; 704 pll_retry--; 705 } 706 Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16)); 707 Xil_Out32(0xFD080004U, 0x00040063U); 708 Xil_Out32(0xFD090000U, 0x00000845U); 709 Xil_Out32(0xFD090004U, 0x003FFFFFU); 710 Xil_Out32(0xFD09000CU, 0x00000010U); 711 Xil_Out32(0xFD090010U, 0x00000010U); 712 Xil_Out32(0xFD090800U, 0x00000001U); 713 714 while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) 715 ; 716 717 prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); 718 719 while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) 720 ; 721 722 Xil_Out32(0xFD070010U, 0x80000038U); 723 Xil_Out32(0xFD0701B0U, 0x00000005U); 724 regval = Xil_In32(0xFD070018); 725 while ((regval & 0x1) != 0x0) 726 regval = Xil_In32(0xFD070018); 727 728 regval = Xil_In32(0xFD070018); 729 regval = Xil_In32(0xFD070018); 730 regval = Xil_In32(0xFD070018); 731 regval = Xil_In32(0xFD070018); 732 regval = Xil_In32(0xFD070018); 733 regval = Xil_In32(0xFD070018); 734 regval = Xil_In32(0xFD070018); 735 regval = Xil_In32(0xFD070018); 736 regval = Xil_In32(0xFD070018); 737 regval = Xil_In32(0xFD070018); 738 Xil_Out32(0xFD070014U, 0x00000331U); 739 Xil_Out32(0xFD070010U, 0x80000038U); 740 regval = Xil_In32(0xFD070018); 741 while ((regval & 0x1) != 0x0) 742 regval = Xil_In32(0xFD070018); 743 744 regval = Xil_In32(0xFD070018); 745 regval = Xil_In32(0xFD070018); 746 regval = Xil_In32(0xFD070018); 747 regval = Xil_In32(0xFD070018); 748 regval = Xil_In32(0xFD070018); 749 regval = Xil_In32(0xFD070018); 750 regval = Xil_In32(0xFD070018); 751 regval = Xil_In32(0xFD070018); 752 regval = Xil_In32(0xFD070018); 753 regval = Xil_In32(0xFD070018); 754 Xil_Out32(0xFD070014U, 0x00000B36U); 755 Xil_Out32(0xFD070010U, 0x80000038U); 756 regval = Xil_In32(0xFD070018); 757 while ((regval & 0x1) != 0x0) 758 regval = Xil_In32(0xFD070018); 759 760 regval = Xil_In32(0xFD070018); 761 regval = Xil_In32(0xFD070018); 762 regval = Xil_In32(0xFD070018); 763 regval = Xil_In32(0xFD070018); 764 regval = Xil_In32(0xFD070018); 765 regval = Xil_In32(0xFD070018); 766 regval = Xil_In32(0xFD070018); 767 regval = Xil_In32(0xFD070018); 768 regval = Xil_In32(0xFD070018); 769 regval = Xil_In32(0xFD070018); 770 Xil_Out32(0xFD070014U, 0x00000C21U); 771 Xil_Out32(0xFD070010U, 0x80000038U); 772 regval = Xil_In32(0xFD070018); 773 while ((regval & 0x1) != 0x0) 774 regval = Xil_In32(0xFD070018); 775 776 regval = Xil_In32(0xFD070018); 777 regval = Xil_In32(0xFD070018); 778 regval = Xil_In32(0xFD070018); 779 regval = Xil_In32(0xFD070018); 780 regval = Xil_In32(0xFD070018); 781 regval = Xil_In32(0xFD070018); 782 regval = Xil_In32(0xFD070018); 783 regval = Xil_In32(0xFD070018); 784 regval = Xil_In32(0xFD070018); 785 regval = Xil_In32(0xFD070018); 786 Xil_Out32(0xFD070014U, 0x00000E19U); 787 Xil_Out32(0xFD070010U, 0x80000038U); 788 regval = Xil_In32(0xFD070018); 789 while ((regval & 0x1) != 0x0) 790 regval = Xil_In32(0xFD070018); 791 792 regval = Xil_In32(0xFD070018); 793 regval = Xil_In32(0xFD070018); 794 regval = Xil_In32(0xFD070018); 795 regval = Xil_In32(0xFD070018); 796 regval = Xil_In32(0xFD070018); 797 regval = Xil_In32(0xFD070018); 798 regval = Xil_In32(0xFD070018); 799 regval = Xil_In32(0xFD070018); 800 regval = Xil_In32(0xFD070018); 801 regval = Xil_In32(0xFD070018); 802 Xil_Out32(0xFD070014U, 0x00001616U); 803 Xil_Out32(0xFD070010U, 0x80000038U); 804 Xil_Out32(0xFD070010U, 0x80000030U); 805 Xil_Out32(0xFD0701B0U, 0x00000005U); 806 Xil_Out32(0xFD070320U, 0x00000001U); 807 while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) 808 ; 809 810 prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); 811 Xil_Out32(0xFD080004, 0x0014FE01); 812 813 regval = Xil_In32(0xFD080030); 814 while (regval != 0x8000007E) 815 regval = Xil_In32(0xFD080030); 816 817 Xil_Out32(0xFD080200U, 0x010091C7U); 818 regval = Xil_In32(0xFD080030); 819 while (regval != 0x80008FFF) 820 regval = Xil_In32(0xFD080030); 821 822 Xil_Out32(0xFD080200U, 0x810091C7U); 823 Xil_Out32(0xFD070180U, 0x010B0008U); 824 Xil_Out32(0xFD070060U, 0x00000000U); 825 prog_reg(0xFD070020U, 0x00000001U, 0x00000000U, 0x00000001U); 826 prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); 827 828 return 1; 829 } 830 831 static int serdes_enb_coarse_saturation(void) 832 { 833 Xil_Out32(0xFD402094, 0x00000010); 834 Xil_Out32(0xFD406094, 0x00000010); 835 Xil_Out32(0xFD40A094, 0x00000010); 836 Xil_Out32(0xFD40E094, 0x00000010); 837 return 1; 838 } 839 840 static int serdes_fixcal_code(void) 841 { 842 int maskstatus = 1; 843 unsigned int match_pmos_code[23]; 844 unsigned int match_nmos_code[23]; 845 unsigned int match_ical_code[7]; 846 unsigned int match_rcal_code[7]; 847 unsigned int p_code = 0; 848 unsigned int n_code = 0; 849 unsigned int i_code = 0; 850 unsigned int r_code = 0; 851 unsigned int repeat_count = 0; 852 unsigned int L3_TM_CALIB_DIG20 = 0; 853 unsigned int L3_TM_CALIB_DIG19 = 0; 854 unsigned int L3_TM_CALIB_DIG18 = 0; 855 unsigned int L3_TM_CALIB_DIG16 = 0; 856 unsigned int L3_TM_CALIB_DIG15 = 0; 857 unsigned int L3_TM_CALIB_DIG14 = 0; 858 int i = 0; 859 860 for (i = 0; i < 23; i++) { 861 match_pmos_code[i] = 0; 862 match_nmos_code[i] = 0; 863 } 864 for (i = 0; i < 7; i++) { 865 match_ical_code[i] = 0; 866 match_rcal_code[i] = 0; 867 } 868 869 do { 870 Xil_Out32(0xFD410010, 0x00000000); 871 Xil_Out32(0xFD410014, 0x00000000); 872 873 Xil_Out32(0xFD410010, 0x00000001); 874 Xil_Out32(0xFD410014, 0x00000000); 875 876 maskstatus = mask_poll(0xFD40EF14, 0x2); 877 if (maskstatus == 0) { 878 /* xil_printf("#SERDES initialization timed out\n\r");*/ 879 return maskstatus; 880 } 881 882 p_code = mask_read(0xFD40EF18, 0xFFFFFFFF); 883 n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF); 884 ; 885 i_code = mask_read(0xFD40EF24, 0xFFFFFFFF); 886 r_code = mask_read(0xFD40EF28, 0xFFFFFFFF); 887 ; 888 889 if ((p_code >= 0x26) && (p_code <= 0x3C)) 890 match_pmos_code[p_code - 0x26] += 1; 891 892 if ((n_code >= 0x26) && (n_code <= 0x3C)) 893 match_nmos_code[n_code - 0x26] += 1; 894 895 if ((i_code >= 0xC) && (i_code <= 0x12)) 896 match_ical_code[i_code - 0xC] += 1; 897 898 if ((r_code >= 0x6) && (r_code <= 0xC)) 899 match_rcal_code[r_code - 0x6] += 1; 900 901 } while (repeat_count++ < 10); 902 903 for (i = 0; i < 23; i++) { 904 if (match_pmos_code[i] >= match_pmos_code[0]) { 905 match_pmos_code[0] = match_pmos_code[i]; 906 p_code = 0x26 + i; 907 } 908 if (match_nmos_code[i] >= match_nmos_code[0]) { 909 match_nmos_code[0] = match_nmos_code[i]; 910 n_code = 0x26 + i; 911 } 912 } 913 914 for (i = 0; i < 7; i++) { 915 if (match_ical_code[i] >= match_ical_code[0]) { 916 match_ical_code[0] = match_ical_code[i]; 917 i_code = 0xC + i; 918 } 919 if (match_rcal_code[i] >= match_rcal_code[0]) { 920 match_rcal_code[0] = match_rcal_code[i]; 921 r_code = 0x6 + i; 922 } 923 } 924 925 L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0); 926 L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7); 927 928 L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18); 929 L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6) 930 | 0x20 | 0x4 | ((n_code >> 3) & 0x3); 931 932 L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F); 933 L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10; 934 935 L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8); 936 L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7); 937 938 L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30); 939 L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7) 940 | 0x40 | 0x8 | ((i_code >> 1) & 0x7); 941 942 L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F); 943 L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40; 944 945 Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20); 946 Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19); 947 Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18); 948 Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16); 949 Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15); 950 Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14); 951 return maskstatus; 952 } 953 954 static int init_serdes(void) 955 { 956 int status = 1; 957 958 status &= psu_resetin_init_data(); 959 960 status &= serdes_fixcal_code(); 961 status &= serdes_enb_coarse_saturation(); 962 963 status &= psu_serdes_init_data(); 964 status &= psu_resetout_init_data(); 965 966 return status; 967 } 968 969 static void init_peripheral(void) 970 { 971 psu_mask_write(0xFD5F0018, 0x0000001FU, 0x0000001FU); 972 } 973 974 int psu_init(void) 975 { 976 int status = 1; 977 978 status &= psu_mio_init_data(); 979 status &= psu_pll_init_data(); 980 status &= psu_clock_init_data(); 981 status &= psu_ddr_init_data(); 982 status &= psu_ddr_phybringup_data(); 983 status &= psu_peripherals_init_data(); 984 status &= init_serdes(); 985 init_peripheral(); 986 987 status &= psu_afi_config(); 988 psu_ddr_qos_init_data(); 989 990 if (status == 0) 991 return 1; 992 return 0; 993 } 994