xref: /openbmc/u-boot/board/xilinx/zynq/board.c (revision 6ee7bb52)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4  * (C) Copyright 2013 - 2018 Xilinx, Inc.
5  */
6 
7 #include <common.h>
8 #include <dm/uclass.h>
9 #include <fdtdec.h>
10 #include <fpga.h>
11 #include <mmc.h>
12 #include <watchdog.h>
13 #include <wdt.h>
14 #include <zynqpl.h>
15 #include <asm/arch/hardware.h>
16 #include <asm/arch/sys_proto.h>
17 
18 DECLARE_GLOBAL_DATA_PTR;
19 
20 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
21 static struct udevice *watchdog_dev;
22 #endif
23 
24 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F)
25 int board_early_init_f(void)
26 {
27 # if defined(CONFIG_WDT)
28 	/* bss is not cleared at time when watchdog_reset() is called */
29 	watchdog_dev = NULL;
30 # endif
31 
32 	return 0;
33 }
34 #endif
35 
36 int board_init(void)
37 {
38 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
39 	if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
40 		debug("Watchdog: Not found by seq!\n");
41 		if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
42 			puts("Watchdog: Not found!\n");
43 			return 0;
44 		}
45 	}
46 
47 	wdt_start(watchdog_dev, 0, 0);
48 	puts("Watchdog: Started\n");
49 # endif
50 
51 	return 0;
52 }
53 
54 int board_late_init(void)
55 {
56 	switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
57 	case ZYNQ_BM_QSPI:
58 		env_set("modeboot", "qspiboot");
59 		break;
60 	case ZYNQ_BM_NAND:
61 		env_set("modeboot", "nandboot");
62 		break;
63 	case ZYNQ_BM_NOR:
64 		env_set("modeboot", "norboot");
65 		break;
66 	case ZYNQ_BM_SD:
67 		env_set("modeboot", "sdboot");
68 		break;
69 	case ZYNQ_BM_JTAG:
70 		env_set("modeboot", "jtagboot");
71 		break;
72 	default:
73 		env_set("modeboot", "");
74 		break;
75 	}
76 
77 	return 0;
78 }
79 
80 int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
81 {
82 #if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
83     defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
84 	if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
85 			CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
86 			ethaddr, 6))
87 		printf("I2C EEPROM MAC address read failed\n");
88 #endif
89 
90 	return 0;
91 }
92 
93 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
94 int dram_init_banksize(void)
95 {
96 	return fdtdec_setup_memory_banksize();
97 }
98 
99 int dram_init(void)
100 {
101 	if (fdtdec_setup_mem_size_base() != 0)
102 		return -EINVAL;
103 
104 	zynq_ddrc_init();
105 
106 	return 0;
107 }
108 #else
109 int dram_init(void)
110 {
111 	gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
112 				    CONFIG_SYS_SDRAM_SIZE);
113 
114 	zynq_ddrc_init();
115 
116 	return 0;
117 }
118 #endif
119 
120 #if defined(CONFIG_WATCHDOG)
121 /* Called by macro WATCHDOG_RESET */
122 void watchdog_reset(void)
123 {
124 # if !defined(CONFIG_SPL_BUILD)
125 	static ulong next_reset;
126 	ulong now;
127 
128 	if (!watchdog_dev)
129 		return;
130 
131 	now = timer_get_us();
132 
133 	/* Do not reset the watchdog too often */
134 	if (now > next_reset) {
135 		wdt_reset(watchdog_dev);
136 		next_reset = now + 1000;
137 	}
138 # endif
139 }
140 #endif
141