1 /* 2 * (C) Copyright 2007 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 * 24 * CAUTION: This file is automatically generated by libgen. 25 * Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 26 */ 27 28 #define XILINX_BOARD_NAME microblaze-generic 29 30 /* System Clock Frequency */ 31 #define XILINX_CLOCK_FREQ 100000000 32 33 /* Microblaze is microblaze_0 */ 34 #define XILINX_USE_MSR_INSTR 1 35 #define XILINX_FSL_NUMBER 3 36 37 /* Interrupt controller is opb_intc_0 */ 38 #define XILINX_INTC_BASEADDR 0x41200000 39 #define XILINX_INTC_NUM_INTR_INPUTS 6 40 41 /* Timer pheriphery is opb_timer_1 */ 42 #define XILINX_TIMER_BASEADDR 0x41c00000 43 #define XILINX_TIMER_IRQ 0 44 45 /* Uart pheriphery is RS232_Uart */ 46 #define XILINX_UARTLITE_BASEADDR 0x40600000 47 #define XILINX_UARTLITE_BAUDRATE 115200 48 49 /* IIC pheriphery is IIC_EEPROM */ 50 #define XILINX_IIC_0_BASEADDR 0x40800000 51 #define XILINX_IIC_0_FREQ 100000 52 #define XILINX_IIC_0_BIT 0 53 54 /* GPIO is LEDs_4Bit*/ 55 #define XILINX_GPIO_BASEADDR 0x40000000 56 57 /* Flash Memory is FLASH_2Mx32 */ 58 #define XILINX_FLASH_START 0x2c000000 59 #define XILINX_FLASH_SIZE 0x00800000 60 61 /* Main Memory is DDR_SDRAM_64Mx32 */ 62 #define XILINX_RAM_START 0x28000000 63 #define XILINX_RAM_SIZE 0x04000000 64 65 /* Sysace Controller is SysACE_CompactFlash */ 66 #define XILINX_SYSACE_BASEADDR 0x41800000 67 #define XILINX_SYSACE_HIGHADDR 0x4180ffff 68 #define XILINX_SYSACE_MEM_WIDTH 16 69 70 /* Ethernet controller is Ethernet_MAC */ 71 #define XILINX_EMACLITE_BASEADDR 0x40C00000 72