152a822edSMichal Simek /* 252a822edSMichal Simek * (C) Copyright 2007 Michal Simek 352a822edSMichal Simek * 452a822edSMichal Simek * Michal SIMEK <monstr@monstr.eu> 552a822edSMichal Simek * 652a822edSMichal Simek * See file CREDITS for list of people who contributed to this 752a822edSMichal Simek * project. 852a822edSMichal Simek * 952a822edSMichal Simek * This program is free software; you can redistribute it and/or 1052a822edSMichal Simek * modify it under the terms of the GNU General Public License as 1152a822edSMichal Simek * published by the Free Software Foundation; either version 2 of 1252a822edSMichal Simek * the License, or (at your option) any later version. 1352a822edSMichal Simek * 1452a822edSMichal Simek * This program is distributed in the hope that it will be useful, 1552a822edSMichal Simek * but WITHOUT ANY WARRANTY; without even the implied warranty of 1652a822edSMichal Simek * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1752a822edSMichal Simek * GNU General Public License for more details. 1852a822edSMichal Simek * 1952a822edSMichal Simek * You should have received a copy of the GNU General Public License 2052a822edSMichal Simek * along with this program; if not, write to the Free Software 2152a822edSMichal Simek * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 2252a822edSMichal Simek * MA 02111-1307 USA 2352a822edSMichal Simek * 24*20637888SStephan Linz * CAUTION: This file is a faked configuration !!! 25*20637888SStephan Linz * There is no real target for the microblaze-generic 26*20637888SStephan Linz * configuration. You have to replace this file with 27*20637888SStephan Linz * the generated file from your Xilinx design flow. 2852a822edSMichal Simek */ 2952a822edSMichal Simek 30330e5545SMichal Simek #define XILINX_BOARD_NAME microblaze-generic 31330e5545SMichal Simek 3252a822edSMichal Simek /* System Clock Frequency */ 3352a822edSMichal Simek #define XILINX_CLOCK_FREQ 100000000 3452a822edSMichal Simek 3552a822edSMichal Simek /* Microblaze is microblaze_0 */ 3652a822edSMichal Simek #define XILINX_USE_MSR_INSTR 1 3752a822edSMichal Simek #define XILINX_FSL_NUMBER 3 3852a822edSMichal Simek 3952a822edSMichal Simek /* Interrupt controller is opb_intc_0 */ 4052a822edSMichal Simek #define XILINX_INTC_BASEADDR 0x41200000 4152a822edSMichal Simek #define XILINX_INTC_NUM_INTR_INPUTS 6 4252a822edSMichal Simek 4352a822edSMichal Simek /* Timer pheriphery is opb_timer_1 */ 4452a822edSMichal Simek #define XILINX_TIMER_BASEADDR 0x41c00000 4552a822edSMichal Simek #define XILINX_TIMER_IRQ 0 4652a822edSMichal Simek 4752a822edSMichal Simek /* Uart pheriphery is RS232_Uart */ 4852a822edSMichal Simek #define XILINX_UARTLITE_BASEADDR 0x40600000 4952a822edSMichal Simek #define XILINX_UARTLITE_BAUDRATE 115200 5052a822edSMichal Simek 5152a822edSMichal Simek /* IIC pheriphery is IIC_EEPROM */ 5252a822edSMichal Simek #define XILINX_IIC_0_BASEADDR 0x40800000 5352a822edSMichal Simek #define XILINX_IIC_0_FREQ 100000 5452a822edSMichal Simek #define XILINX_IIC_0_BIT 0 5552a822edSMichal Simek 5652a822edSMichal Simek /* GPIO is LEDs_4Bit*/ 5752a822edSMichal Simek #define XILINX_GPIO_BASEADDR 0x40000000 5852a822edSMichal Simek 5952a822edSMichal Simek /* Flash Memory is FLASH_2Mx32 */ 6052a822edSMichal Simek #define XILINX_FLASH_START 0x2c000000 6152a822edSMichal Simek #define XILINX_FLASH_SIZE 0x00800000 6252a822edSMichal Simek 6352a822edSMichal Simek /* Main Memory is DDR_SDRAM_64Mx32 */ 6452a822edSMichal Simek #define XILINX_RAM_START 0x28000000 6552a822edSMichal Simek #define XILINX_RAM_SIZE 0x04000000 6652a822edSMichal Simek 6752a822edSMichal Simek /* Sysace Controller is SysACE_CompactFlash */ 6852a822edSMichal Simek #define XILINX_SYSACE_BASEADDR 0x41800000 6952a822edSMichal Simek #define XILINX_SYSACE_HIGHADDR 0x4180ffff 7052a822edSMichal Simek #define XILINX_SYSACE_MEM_WIDTH 16 7152a822edSMichal Simek 7252a822edSMichal Simek /* Ethernet controller is Ethernet_MAC */ 7352a822edSMichal Simek #define XILINX_EMACLITE_BASEADDR 0x40C00000 74*20637888SStephan Linz 75*20637888SStephan Linz /* LL_TEMAC Ethernet controller */ 76*20637888SStephan Linz #define XILINX_LLTEMAC_BASEADDR 0x44000000 77*20637888SStephan Linz #define XILINX_LLTEMAC_SDMA_CTRL_BASEADDR 0x42000180 78*20637888SStephan Linz #define XILINX_LLTEMAC_BASEADDR1 0x44200000 79*20637888SStephan Linz #define XILINX_LLTEMAC_FIFO_BASEADDR1 0x42100000 80