1 /* 2 * (C) Copyright 2007 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 /* This is a board specific file. It's OK to include board specific 26 * header files */ 27 28 #include <common.h> 29 #include <config.h> 30 #include <netdev.h> 31 #include <asm/processor.h> 32 #include <asm/microblaze_intc.h> 33 #include <asm/asm.h> 34 35 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 36 { 37 #ifdef CONFIG_SYS_GPIO_0 38 *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 39 ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR))); 40 #endif 41 42 #ifdef CONFIG_XILINX_TB_WATCHDOG 43 hw_watchdog_disable(); 44 #endif 45 46 puts ("Reseting board\n"); 47 __asm__ __volatile__ (" mts rmsr, r0;" \ 48 "bra r0"); 49 50 return 0; 51 } 52 53 int gpio_init (void) 54 { 55 #ifdef CONFIG_SYS_GPIO_0 56 *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0xFFFFFFFF; 57 #endif 58 return 0; 59 } 60 61 void board_init(void) 62 { 63 gpio_init(); 64 } 65 66 int board_eth_init(bd_t *bis) 67 { 68 int ret = 0; 69 70 #ifdef CONFIG_XILINX_AXIEMAC 71 ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR, 72 XILINX_AXIDMA_BASEADDR); 73 #endif 74 75 #ifdef CONFIG_XILINX_EMACLITE 76 u32 txpp = 0; 77 u32 rxpp = 0; 78 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG 79 txpp = 1; 80 # endif 81 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG 82 rxpp = 1; 83 # endif 84 ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR, 85 txpp, rxpp); 86 #endif 87 88 #ifdef CONFIG_XILINX_LL_TEMAC 89 # ifdef XILINX_LLTEMAC_BASEADDR 90 # ifdef XILINX_LLTEMAC_FIFO_BASEADDR 91 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR, 92 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR); 93 # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR 94 # if XILINX_LLTEMAC_SDMA_USE_DCR == 1 95 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR, 96 XILINX_LL_TEMAC_M_SDMA_DCR, 97 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR); 98 # else 99 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR, 100 XILINX_LL_TEMAC_M_SDMA_PLB, 101 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR); 102 # endif 103 # endif 104 # endif 105 # ifdef XILINX_LLTEMAC_BASEADDR1 106 # ifdef XILINX_LLTEMAC_FIFO_BASEADDR1 107 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1, 108 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1); 109 # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1 110 # if XILINX_LLTEMAC_SDMA_USE_DCR == 1 111 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1, 112 XILINX_LL_TEMAC_M_SDMA_DCR, 113 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1); 114 # else 115 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1, 116 XILINX_LL_TEMAC_M_SDMA_PLB, 117 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1); 118 # endif 119 # endif 120 # endif 121 #endif 122 123 return ret; 124 } 125