1 /*
2  * (C) Copyright 2007 Michal Simek
3  *
4  * Michal  SIMEK <monstr@monstr.eu>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 /* This is a board specific file.  It's OK to include board specific
10  * header files */
11 
12 #include <common.h>
13 #include <config.h>
14 #include <fdtdec.h>
15 #include <netdev.h>
16 #include <asm/processor.h>
17 #include <asm/microblaze_intc.h>
18 #include <asm/asm.h>
19 #include <asm/gpio.h>
20 
21 DECLARE_GLOBAL_DATA_PTR;
22 
23 #ifdef CONFIG_XILINX_GPIO
24 static int reset_pin = -1;
25 #endif
26 
27 #if CONFIG_IS_ENABLED(OF_CONTROL)
28 ulong ram_base;
29 
30 void dram_init_banksize(void)
31 {
32 	gd->bd->bi_dram[0].start = ram_base;
33 	gd->bd->bi_dram[0].size = get_effective_memsize();
34 }
35 
36 int dram_init(void)
37 {
38 	int node;
39 	fdt_addr_t addr;
40 	fdt_size_t size;
41 	const void *blob = gd->fdt_blob;
42 
43 	node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
44 					     "memory", 7);
45 	if (node == -FDT_ERR_NOTFOUND) {
46 		debug("DRAM: Can't get memory node\n");
47 		return 1;
48 	}
49 	addr = fdtdec_get_addr_size(blob, node, "reg", &size);
50 	if (addr == FDT_ADDR_T_NONE || size == 0) {
51 		debug("DRAM: Can't get base address or size\n");
52 		return 1;
53 	}
54 	ram_base = addr;
55 
56 	gd->ram_top = addr; /* In setup_dest_addr() is done +ram_size */
57 	gd->ram_size = size;
58 
59 	return 0;
60 };
61 #else
62 int dram_init(void)
63 {
64 	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
65 
66 	return 0;
67 }
68 #endif
69 
70 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
71 {
72 #ifndef CONFIG_SPL_BUILD
73 #ifdef CONFIG_XILINX_GPIO
74 	if (reset_pin != -1)
75 		gpio_direction_output(reset_pin, 1);
76 #endif
77 
78 #ifdef CONFIG_XILINX_TB_WATCHDOG
79 	hw_watchdog_disable();
80 #endif
81 #endif
82 	puts ("Reseting board\n");
83 	__asm__ __volatile__ ("	mts rmsr, r0;" \
84 				"bra r0");
85 
86 	return 0;
87 }
88 
89 int gpio_init (void)
90 {
91 #ifdef CONFIG_XILINX_GPIO
92 	reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1);
93 	if (reset_pin != -1)
94 		gpio_request(reset_pin, "reset_pin");
95 #endif
96 	return 0;
97 }
98 
99 void board_init(void)
100 {
101 	gpio_init();
102 }
103 
104 int board_eth_init(bd_t *bis)
105 {
106 	int ret = 0;
107 
108 #ifdef CONFIG_XILINX_AXIEMAC
109 	ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
110 						XILINX_AXIDMA_BASEADDR);
111 #endif
112 
113 #if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR)
114 	u32 txpp = 0;
115 	u32 rxpp = 0;
116 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
117 	txpp = 1;
118 # endif
119 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
120 	rxpp = 1;
121 # endif
122 	ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
123 			txpp, rxpp);
124 #endif
125 
126 	return ret;
127 }
128