1 /* 2 * (C) Copyright 2007 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* This is a board specific file. It's OK to include board specific 10 * header files */ 11 12 #include <common.h> 13 #include <config.h> 14 #include <netdev.h> 15 #include <asm/processor.h> 16 #include <asm/microblaze_intc.h> 17 #include <asm/asm.h> 18 #include <asm/gpio.h> 19 20 #ifdef CONFIG_XILINX_GPIO 21 static int reset_pin = -1; 22 #endif 23 24 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 25 { 26 #ifdef CONFIG_XILINX_GPIO 27 if (reset_pin != -1) 28 gpio_direction_output(reset_pin, 1); 29 #endif 30 31 #ifdef CONFIG_XILINX_TB_WATCHDOG 32 hw_watchdog_disable(); 33 #endif 34 35 puts ("Reseting board\n"); 36 __asm__ __volatile__ (" mts rmsr, r0;" \ 37 "bra r0"); 38 39 return 0; 40 } 41 42 int gpio_init (void) 43 { 44 #ifdef CONFIG_XILINX_GPIO 45 reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1); 46 if (reset_pin != -1) 47 gpio_request(reset_pin, "reset_pin"); 48 #endif 49 return 0; 50 } 51 52 void board_init(void) 53 { 54 gpio_init(); 55 } 56 57 int board_eth_init(bd_t *bis) 58 { 59 int ret = 0; 60 61 #ifdef CONFIG_XILINX_AXIEMAC 62 ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR, 63 XILINX_AXIDMA_BASEADDR); 64 #endif 65 66 #ifdef CONFIG_XILINX_EMACLITE 67 u32 txpp = 0; 68 u32 rxpp = 0; 69 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG 70 txpp = 1; 71 # endif 72 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG 73 rxpp = 1; 74 # endif 75 ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR, 76 txpp, rxpp); 77 #endif 78 79 #ifdef CONFIG_XILINX_LL_TEMAC 80 # ifdef XILINX_LLTEMAC_BASEADDR 81 # ifdef XILINX_LLTEMAC_FIFO_BASEADDR 82 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR, 83 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR); 84 # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR 85 # if XILINX_LLTEMAC_SDMA_USE_DCR == 1 86 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR, 87 XILINX_LL_TEMAC_M_SDMA_DCR, 88 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR); 89 # else 90 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR, 91 XILINX_LL_TEMAC_M_SDMA_PLB, 92 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR); 93 # endif 94 # endif 95 # endif 96 # ifdef XILINX_LLTEMAC_BASEADDR1 97 # ifdef XILINX_LLTEMAC_FIFO_BASEADDR1 98 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1, 99 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1); 100 # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1 101 # if XILINX_LLTEMAC_SDMA_USE_DCR == 1 102 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1, 103 XILINX_LL_TEMAC_M_SDMA_DCR, 104 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1); 105 # else 106 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1, 107 XILINX_LL_TEMAC_M_SDMA_PLB, 108 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1); 109 # endif 110 # endif 111 # endif 112 #endif 113 114 return ret; 115 } 116