xref: /openbmc/u-boot/board/xes/common/fsl_8xxx_pci.c (revision 1e52fea3)
1 /*
2  * Copyright 2008 Extreme Engineering Solutions, Inc.
3  * Copyright 2007-2008 Freescale Semiconductor, Inc.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23 
24 #include <common.h>
25 #include <pci.h>
26 #include <asm/fsl_pci.h>
27 #include <asm/fsl_serdes.h>
28 #include <asm/io.h>
29 #include <linux/compiler.h>
30 #include <libfdt.h>
31 #include <fdt_support.h>
32 
33 
34 #ifdef CONFIG_PCI1
35 static struct pci_controller pci1_hose;
36 #endif
37 
38 void pci_init_board(void)
39 {
40 	int first_free_busno = 0;
41 
42 #ifdef CONFIG_PCI1
43 	int pcie_ep;
44 	struct fsl_pci_info pci_info;
45 	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
46 	u32 devdisr = in_be32(&gur->devdisr);
47 	uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD;
48 	uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
49 	uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB;
50 	uint pcix = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1;
51 	uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000;
52 
53 	if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
54 		SET_STD_PCI_INFO(pci_info, 1);
55 		set_next_law(pci_info.mem_phys,
56 			law_size_bits(pci_info.mem_size), pci_info.law);
57 		set_next_law(pci_info.io_phys,
58 			law_size_bits(pci_info.io_size), pci_info.law);
59 
60 		pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs);
61 		printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n",
62 			pci_32 ? 32 : 64,
63 			pcix ? "PCIX" : "PCI",
64 			pci_spd_norm ? ">=" : "<=",
65 			pcix ? freq * 2 : freq,
66 			pcie_ep ? "agent" : "host",
67 			pci_arb ? "arbiter" : "external-arbiter");
68 
69 		first_free_busno = fsl_pci_init_port(&pci_info,
70 					&pci1_hose, first_free_busno);
71 	} else {
72 		printf("PCI1: disabled\n");
73 	}
74 #elif defined CONFIG_MPC8548
75 	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
76 	/* PCI1 not present on MPC8572 */
77 	setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
78 #endif
79 
80 	fsl_pcie_init_board(first_free_busno);
81 }
82 
83 #if defined(CONFIG_OF_BOARD_SETUP)
84 void ft_board_pci_setup(void *blob, bd_t *bd)
85 {
86 	FT_FSL_PCI_SETUP;
87 }
88 #endif /* CONFIG_OF_BOARD_SETUP */
89