1 /* 2 * Copyright 2008 Extreme Engineering Solutions, Inc. 3 * 4 * See file CREDITS for list of people who contributed to this 5 * project. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23 #include <common.h> 24 #include <asm/io.h> 25 26 /* 27 * Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config 28 */ 29 unsigned long get_board_sys_clk(ulong dummy) 30 { 31 #if defined(CONFIG_MPC85xx) 32 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 33 #elif defined(CONFIG_MPC86xx) 34 immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; 35 volatile ccsr_gur_t *gur = &immap->im_gur; 36 #endif 37 38 if (in_be32(&gur->gpporcr) & 0x10000) 39 return 66666666; 40 else 41 #ifdef CONFIG_P2020 42 return 100000000; 43 #else 44 return 50000000; 45 #endif 46 } 47 48 #ifdef CONFIG_MPC85xx 49 /* 50 * Return DDR input clock - synchronous with SYSCLK or 66 MHz 51 * Note: 86xx doesn't support asynchronous DDR clk 52 */ 53 unsigned long get_board_ddr_clk(ulong dummy) 54 { 55 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); 56 u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9; 57 58 if (ddr_ratio == 0x7) 59 return get_board_sys_clk(dummy); 60 61 #ifdef CONFIG_P2020 62 if (in_be32(&gur->gpporcr) & 0x20000) 63 return 66666666; 64 else 65 return 100000000; 66 #else 67 return 66666666; 68 #endif 69 } 70 #endif 71