1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2016 NXP Semiconductors 4 * Author: Fabio Estevam <fabio.estevam@nxp.com> 5 */ 6 7 #include <asm/arch/clock.h> 8 #include <asm/arch/imx-regs.h> 9 #include <asm/arch/mx7-pins.h> 10 #include <asm/arch/sys_proto.h> 11 #include <asm/gpio.h> 12 #include <asm/mach-imx/hab.h> 13 #include <asm/mach-imx/iomux-v3.h> 14 #include <asm/io.h> 15 #include <common.h> 16 #include <asm/arch/crm_regs.h> 17 #include <usb.h> 18 #include <netdev.h> 19 #include <power/pmic.h> 20 #include <power/pfuze3000_pmic.h> 21 #include "../freescale/common/pfuze.h" 22 #include <asm/setup.h> 23 #include <asm/bootm.h> 24 25 DECLARE_GLOBAL_DATA_PTR; 26 27 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \ 28 PAD_CTL_HYS) 29 30 int dram_init(void) 31 { 32 gd->ram_size = PHYS_SDRAM_SIZE; 33 34 /* Subtract the defined OPTEE runtime firmware length */ 35 #ifdef CONFIG_OPTEE_TZDRAM_SIZE 36 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE; 37 #endif 38 39 return 0; 40 } 41 42 static iomux_v3_cfg_t const wdog_pads[] = { 43 MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL), 44 }; 45 46 static iomux_v3_cfg_t const uart1_pads[] = { 47 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), 48 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), 49 }; 50 51 static void setup_iomux_uart(void) 52 { 53 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); 54 }; 55 56 int board_early_init_f(void) 57 { 58 setup_iomux_uart(); 59 60 return 0; 61 } 62 63 #ifdef CONFIG_DM_PMIC 64 int power_init_board(void) 65 { 66 struct udevice *dev; 67 int ret, dev_id, rev_id; 68 69 ret = pmic_get("pfuze3000", &dev); 70 if (ret == -ENODEV) 71 return 0; 72 if (ret != 0) 73 return ret; 74 75 dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID); 76 rev_id = pmic_reg_read(dev, PFUZE3000_REVID); 77 printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id); 78 79 /* disable Low Power Mode during standby mode */ 80 pmic_reg_write(dev, PFUZE3000_LDOGCTL, 1); 81 82 return 0; 83 } 84 #endif 85 86 int board_eth_init(bd_t *bis) 87 { 88 int ret = 0; 89 90 #ifdef CONFIG_USB_ETHER 91 ret = usb_eth_initialize(bis); 92 if (ret < 0) 93 printf("Error %d registering USB ether.\n", ret); 94 #endif 95 96 return ret; 97 } 98 99 int board_init(void) 100 { 101 /* address of boot parameters */ 102 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; 103 104 return 0; 105 } 106 107 int checkboard(void) 108 { 109 char *mode; 110 111 if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT)) 112 mode = "secure"; 113 else 114 mode = "non-secure"; 115 116 #ifdef CONFIG_OPTEE_TZDRAM_SIZE 117 unsigned long optee_start, optee_end; 118 119 optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE; 120 optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE; 121 122 printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n", 123 mode, optee_start, optee_end); 124 #else 125 printf("Board: WARP7 in %s mode\n", mode); 126 #endif 127 128 return 0; 129 } 130 131 int board_usb_phy_mode(int port) 132 { 133 return USB_INIT_DEVICE; 134 } 135 136 int board_late_init(void) 137 { 138 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; 139 #ifdef CONFIG_SERIAL_TAG 140 struct tag_serialnr serialnr; 141 char serial_string[0x20]; 142 #endif 143 144 imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); 145 146 set_wdog_reset(wdog); 147 148 /* 149 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4), 150 * since we use PMIC_PWRON to reset the board. 151 */ 152 clrsetbits_le16(&wdog->wcr, 0, 0x10); 153 154 #ifdef CONFIG_SECURE_BOOT 155 /* Determine HAB state */ 156 env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled()); 157 #else 158 env_set_ulong(HAB_ENABLED_ENVNAME, 0); 159 #endif 160 161 #ifdef CONFIG_SERIAL_TAG 162 /* Set serial# standard environment variable based on OTP settings */ 163 get_board_serial(&serialnr); 164 snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x", 165 serialnr.low, serialnr.high); 166 env_set("serial#", serial_string); 167 #endif 168 169 return 0; 170 } 171