1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2016 Marek Vasut <marex@denx.de> 4 */ 5 6 #include <common.h> 7 #include <asm/io.h> 8 #include <asm/addrspace.h> 9 #include <asm/types.h> 10 #include <mach/ath79.h> 11 #include <mach/ar71xx_regs.h> 12 #include <mach/ddr.h> 13 #include <debug_uart.h> 14 15 #ifdef CONFIG_USB 16 static void wdr4300_usb_start(void) 17 { 18 void __iomem *gpio_regs = map_physmem(AR71XX_GPIO_BASE, 19 AR71XX_GPIO_SIZE, MAP_NOCACHE); 20 if (!gpio_regs) 21 return; 22 23 /* Power up the USB HUB. */ 24 clrbits_be32(gpio_regs + AR71XX_GPIO_REG_OE, BIT(21) | BIT(22)); 25 writel(BIT(21) | BIT(22), gpio_regs + AR71XX_GPIO_REG_SET); 26 mdelay(1); 27 28 ath79_usb_reset(); 29 } 30 #else 31 static inline void wdr4300_usb_start(void) {} 32 #endif 33 34 void wdr4300_pinmux_config(void) 35 { 36 void __iomem *regs; 37 38 regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE, 39 MAP_NOCACHE); 40 41 /* Assure JTAG is not disconnected. */ 42 writel(0x40, regs + AR934X_GPIO_REG_FUNC); 43 44 /* Configure default GPIO input/output regs. */ 45 writel(0x3031b, regs + AR71XX_GPIO_REG_OE); 46 writel(0x0f804, regs + AR71XX_GPIO_REG_OUT); 47 48 /* Configure pin multiplexing. */ 49 writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC0); 50 writel(0x0b0a0980, regs + AR934X_GPIO_REG_OUT_FUNC1); 51 writel(0x00180000, regs + AR934X_GPIO_REG_OUT_FUNC2); 52 writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC3); 53 writel(0x0000004d, regs + AR934X_GPIO_REG_OUT_FUNC4); 54 writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC5); 55 } 56 57 #ifdef CONFIG_DEBUG_UART_BOARD_INIT 58 void board_debug_uart_init(void) 59 { 60 wdr4300_pinmux_config(); 61 } 62 #endif 63 64 #ifdef CONFIG_BOARD_EARLY_INIT_F 65 int board_early_init_f(void) 66 { 67 #ifndef CONFIG_DEBUG_UART_BOARD_INIT 68 wdr4300_pinmux_config(); 69 #endif 70 71 #ifndef CONFIG_SKIP_LOWLEVEL_INIT 72 ar934x_pll_init(560, 480, 240); 73 ar934x_ddr_init(560, 480, 240); 74 #endif 75 76 wdr4300_usb_start(); 77 ath79_eth_reset(); 78 79 return 0; 80 } 81 #endif 82