1 /* 2 * Copyright (C) 2016 Marek Vasut <marex@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <asm/io.h> 9 #include <asm/addrspace.h> 10 #include <asm/types.h> 11 #include <mach/ath79.h> 12 #include <mach/ar71xx_regs.h> 13 #include <mach/ddr.h> 14 #include <debug_uart.h> 15 16 DECLARE_GLOBAL_DATA_PTR; 17 18 #ifdef CONFIG_USB 19 static void wdr4300_usb_start(void) 20 { 21 void __iomem *gpio_regs = map_physmem(AR71XX_GPIO_BASE, 22 AR71XX_GPIO_SIZE, MAP_NOCACHE); 23 if (!gpio_regs) 24 return; 25 26 /* Power up the USB HUB. */ 27 clrbits_be32(gpio_regs + AR71XX_GPIO_REG_OE, BIT(21) | BIT(22)); 28 writel(BIT(21) | BIT(22), gpio_regs + AR71XX_GPIO_REG_SET); 29 mdelay(1); 30 31 ath79_usb_reset(); 32 } 33 #else 34 static inline void wdr4300_usb_start(void) {} 35 #endif 36 37 #ifdef CONFIG_BOARD_EARLY_INIT_F 38 int board_early_init_f(void) 39 { 40 void __iomem *regs; 41 42 regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE, 43 MAP_NOCACHE); 44 45 /* Assure JTAG is not disconnected. */ 46 writel(0x40, regs + AR934X_GPIO_REG_FUNC); 47 48 /* Configure default GPIO input/output regs. */ 49 writel(0x3031b, regs + AR71XX_GPIO_REG_OE); 50 writel(0x0f804, regs + AR71XX_GPIO_REG_OUT); 51 52 /* Configure pin multiplexing. */ 53 writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC0); 54 writel(0x0b0a0980, regs + AR934X_GPIO_REG_OUT_FUNC1); 55 writel(0x00180000, regs + AR934X_GPIO_REG_OUT_FUNC2); 56 writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC3); 57 writel(0x0000004d, regs + AR934X_GPIO_REG_OUT_FUNC4); 58 writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC5); 59 60 #ifdef CONFIG_DEBUG_UART 61 debug_uart_init(); 62 #endif 63 64 #ifndef CONFIG_SKIP_LOWLEVEL_INIT 65 ar934x_pll_init(560, 480, 240); 66 ar934x_ddr_init(560, 480, 240); 67 #endif 68 69 wdr4300_usb_start(); 70 ath79_eth_reset(); 71 72 return 0; 73 } 74 #endif 75