1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *  Copyright (C) 2012 Lucas Stach
4  */
5 
6 #include <common.h>
7 #include <asm/arch/clock.h>
8 #include <asm/arch/funcmux.h>
9 #include <asm/arch/pinmux.h>
10 #include <asm/arch-tegra/ap.h>
11 #include <asm/arch-tegra/board.h>
12 #include <asm/arch-tegra/tegra.h>
13 #include <asm/gpio.h>
14 #include <asm/io.h>
15 #include <i2c.h>
16 #include <nand.h>
17 #include "../common/tdx-common.h"
18 
19 DECLARE_GLOBAL_DATA_PTR;
20 
21 #define PMU_I2C_ADDRESS		0x34
22 #define MAX_I2C_RETRY		3
23 #define PMU_SUPPLYENE		0x14
24 #define PMU_SUPPLYENE_SYSINEN	(1<<5)
25 #define PMU_SUPPLYENE_EXITSLREQ	(1<<1)
26 
27 int arch_misc_init(void)
28 {
29 	/* Disable PMIC sleep mode on low supply voltage */
30 	struct udevice *dev;
31 	u8 addr, data[1];
32 	int err;
33 
34 	err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
35 	if (err) {
36 		debug("%s: Cannot find PMIC I2C chip\n", __func__);
37 		return err;
38 	}
39 
40 	addr = PMU_SUPPLYENE;
41 
42 	err = dm_i2c_read(dev, addr, data, 1);
43 	if (err) {
44 		debug("failed to get PMU_SUPPLYENE\n");
45 		return err;
46 	}
47 
48 	data[0] &= ~PMU_SUPPLYENE_SYSINEN;
49 	data[0] |= PMU_SUPPLYENE_EXITSLREQ;
50 
51 	err = dm_i2c_write(dev, addr, data, 1);
52 	if (err) {
53 		debug("failed to set PMU_SUPPLYENE\n");
54 		return err;
55 	}
56 
57 	/* make sure SODIMM pin 87 nRESET_OUT is released properly */
58 	pinmux_set_func(PMUX_PINGRP_ATA, PMUX_FUNC_GMI);
59 
60 	if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
61 	    NVBOOTTYPE_RECOVERY)
62 		printf("USB recovery mode\n");
63 
64 	return 0;
65 }
66 
67 int checkboard(void)
68 {
69 	printf("Model: Toradex Colibri T20 %dMB V%s\n",
70 	       (gd->ram_size == 0x10000000) ? 256 : 512,
71 	       (get_nand_dev_by_index(0)->erasesize >> 10 == 512) ?
72 	       ((gd->ram_size == 0x10000000) ? "1.1B" : "1.1C") : "1.2A");
73 
74 	return 0;
75 }
76 
77 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
78 int ft_board_setup(void *blob, bd_t *bd)
79 {
80 	return ft_common_board_setup(blob, bd);
81 }
82 #endif
83 
84 #ifdef CONFIG_MMC_SDHCI_TEGRA
85 /*
86  * Routine: pin_mux_mmc
87  * Description: setup the pin muxes/tristate values for the SDMMC(s)
88  */
89 void pin_mux_mmc(void)
90 {
91 	funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
92 	pinmux_tristate_disable(PMUX_PINGRP_GMB);
93 }
94 #endif
95 
96 #ifdef CONFIG_TEGRA_NAND
97 void pin_mux_nand(void)
98 {
99 	funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
100 
101 	/*
102 	 * configure pingroup ATC to something unrelated to
103 	 * avoid ATC overriding KBC
104 	 */
105 	pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_GMI);
106 }
107 #endif
108 
109 #ifdef CONFIG_USB_EHCI_TEGRA
110 void pin_mux_usb(void)
111 {
112 	/* module internal USB bus to connect ethernet chipset */
113 	funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
114 
115 	/* ULPI reference clock output */
116 	pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
117 	pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
118 
119 	/* PHY reset GPIO */
120 	pinmux_tristate_disable(PMUX_PINGRP_UAC);
121 
122 	/* VBus GPIO */
123 	pinmux_tristate_disable(PMUX_PINGRP_DTE);
124 
125 	/* Reset ASIX using LAN_RESET */
126 	gpio_request(TEGRA_GPIO(V, 4), "LAN_RESET");
127 	gpio_direction_output(TEGRA_GPIO(V, 4), 0);
128 	pinmux_tristate_disable(PMUX_PINGRP_GPV);
129 	udelay(5);
130 	gpio_set_value(TEGRA_GPIO(V, 4), 1);
131 
132 	/* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */
133 	pinmux_tristate_disable(PMUX_PINGRP_SPIG);
134 }
135 #endif
136 
137 #ifdef CONFIG_VIDEO_TEGRA20
138 /*
139  * Routine: pin_mux_display
140  * Description: setup the pin muxes/tristate values for the LCD interface)
141  */
142 void pin_mux_display(void)
143 {
144 	/*
145 	 * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through
146 	 * device-tree
147 	 */
148 	pinmux_tristate_disable(PMUX_PINGRP_DTA);
149 
150 	pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
151 	pinmux_tristate_disable(PMUX_PINGRP_SDC);
152 }
153 #endif
154