1 /*
2  *  Copyright (C) 2012 Lucas Stach
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <asm/arch/clock.h>
9 #include <asm/arch/funcmux.h>
10 #include <asm/arch/pinmux.h>
11 #include <asm/arch-tegra/ap.h>
12 #include <asm/arch-tegra/board.h>
13 #include <asm/arch-tegra/tegra.h>
14 #include <asm/gpio.h>
15 #include <asm/io.h>
16 #include <i2c.h>
17 
18 #define PMU_I2C_ADDRESS		0x34
19 #define MAX_I2C_RETRY		3
20 #define PMU_SUPPLYENE		0x14
21 #define PMU_SUPPLYENE_SYSINEN	(1<<5)
22 #define PMU_SUPPLYENE_EXITSLREQ	(1<<1)
23 
24 int arch_misc_init(void)
25 {
26 	/* Disable PMIC sleep mode on low supply voltage */
27 	struct udevice *dev;
28 	u8 addr, data[1];
29 	int err;
30 
31 	err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
32 	if (err) {
33 		debug("%s: Cannot find PMIC I2C chip\n", __func__);
34 		return err;
35 	}
36 
37 	addr = PMU_SUPPLYENE;
38 
39 	err = dm_i2c_read(dev, addr, data, 1);
40 	if (err) {
41 		debug("failed to get PMU_SUPPLYENE\n");
42 		return err;
43 	}
44 
45 	data[0] &= ~PMU_SUPPLYENE_SYSINEN;
46 	data[0] |= PMU_SUPPLYENE_EXITSLREQ;
47 
48 	err = dm_i2c_write(dev, addr, data, 1);
49 	if (err) {
50 		debug("failed to set PMU_SUPPLYENE\n");
51 		return err;
52 	}
53 
54 	/* make sure SODIMM pin 87 nRESET_OUT is released properly */
55 	pinmux_set_func(PMUX_PINGRP_ATA, PMUX_FUNC_GMI);
56 
57 	if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
58 	    NVBOOTTYPE_RECOVERY)
59 		printf("USB recovery mode\n");
60 
61 	return 0;
62 }
63 
64 #ifdef CONFIG_TEGRA_MMC
65 /*
66  * Routine: pin_mux_mmc
67  * Description: setup the pin muxes/tristate values for the SDMMC(s)
68  */
69 void pin_mux_mmc(void)
70 {
71 	funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
72 	pinmux_tristate_disable(PMUX_PINGRP_GMB);
73 }
74 #endif
75 
76 #ifdef CONFIG_TEGRA_NAND
77 void pin_mux_nand(void)
78 {
79 	funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
80 
81 	/*
82 	 * configure pingroup ATC to something unrelated to
83 	 * avoid ATC overriding KBC
84 	 */
85 	pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_GMI);
86 }
87 #endif
88 
89 #ifdef CONFIG_USB_EHCI_TEGRA
90 void pin_mux_usb(void)
91 {
92 	/* module internal USB bus to connect ethernet chipset */
93 	funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
94 
95 	/* ULPI reference clock output */
96 	pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
97 	pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
98 
99 	/* PHY reset GPIO */
100 	pinmux_tristate_disable(PMUX_PINGRP_UAC);
101 
102 	/* VBus GPIO */
103 	pinmux_tristate_disable(PMUX_PINGRP_DTE);
104 
105 	/* Reset ASIX using LAN_RESET */
106 	gpio_request(GPIO_PV4, "LAN_RESET");
107 	gpio_direction_output(GPIO_PV4, 0);
108 	pinmux_tristate_disable(PMUX_PINGRP_GPV);
109 	udelay(5);
110 	gpio_set_value(GPIO_PV4, 1);
111 
112 	/* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */
113 	pinmux_tristate_disable(PMUX_PINGRP_SPIG);
114 }
115 #endif
116 
117 #ifdef CONFIG_VIDEO_TEGRA20
118 /*
119  * Routine: pin_mux_display
120  * Description: setup the pin muxes/tristate values for the LCD interface)
121  */
122 void pin_mux_display(void)
123 {
124 	/*
125 	 * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through
126 	 * device-tree
127 	 */
128 	pinmux_tristate_disable(PMUX_PINGRP_DTA);
129 
130 	pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
131 	pinmux_tristate_disable(PMUX_PINGRP_SDC);
132 }
133 #endif
134