1e57c6e5bSMarcel Ziswiler /* 2e57c6e5bSMarcel Ziswiler * Copyright (C) 2012 Lucas Stach 3e57c6e5bSMarcel Ziswiler * 4e57c6e5bSMarcel Ziswiler * SPDX-License-Identifier: GPL-2.0+ 5e57c6e5bSMarcel Ziswiler */ 6e57c6e5bSMarcel Ziswiler 7e57c6e5bSMarcel Ziswiler #include <common.h> 8e57c6e5bSMarcel Ziswiler #include <asm/arch/clock.h> 9e57c6e5bSMarcel Ziswiler #include <asm/arch/funcmux.h> 10e57c6e5bSMarcel Ziswiler #include <asm/arch/pinmux.h> 11a5825625SMarcel Ziswiler #include <asm/arch-tegra/ap.h> 12e57c6e5bSMarcel Ziswiler #include <asm/arch-tegra/board.h> 13a5825625SMarcel Ziswiler #include <asm/arch-tegra/tegra.h> 14e57c6e5bSMarcel Ziswiler #include <asm/gpio.h> 15a5825625SMarcel Ziswiler #include <asm/io.h> 16*10ef82d3SMarcel Ziswiler #include <i2c.h> 17*10ef82d3SMarcel Ziswiler 18*10ef82d3SMarcel Ziswiler #define PMU_I2C_ADDRESS 0x34 19*10ef82d3SMarcel Ziswiler #define MAX_I2C_RETRY 3 20*10ef82d3SMarcel Ziswiler #define PMU_SUPPLYENE 0x14 21*10ef82d3SMarcel Ziswiler #define PMU_SUPPLYENE_SYSINEN (1<<5) 22*10ef82d3SMarcel Ziswiler #define PMU_SUPPLYENE_EXITSLREQ (1<<1) 23a5825625SMarcel Ziswiler 24a5825625SMarcel Ziswiler int arch_misc_init(void) 25a5825625SMarcel Ziswiler { 26*10ef82d3SMarcel Ziswiler /* Disable PMIC sleep mode on low supply voltage */ 27*10ef82d3SMarcel Ziswiler struct udevice *dev; 28*10ef82d3SMarcel Ziswiler u8 addr, data[1]; 29*10ef82d3SMarcel Ziswiler int err; 30*10ef82d3SMarcel Ziswiler 31*10ef82d3SMarcel Ziswiler err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); 32*10ef82d3SMarcel Ziswiler if (err) { 33*10ef82d3SMarcel Ziswiler debug("%s: Cannot find PMIC I2C chip\n", __func__); 34*10ef82d3SMarcel Ziswiler return err; 35*10ef82d3SMarcel Ziswiler } 36*10ef82d3SMarcel Ziswiler 37*10ef82d3SMarcel Ziswiler addr = PMU_SUPPLYENE; 38*10ef82d3SMarcel Ziswiler 39*10ef82d3SMarcel Ziswiler err = dm_i2c_read(dev, addr, data, 1); 40*10ef82d3SMarcel Ziswiler if (err) { 41*10ef82d3SMarcel Ziswiler debug("failed to get PMU_SUPPLYENE\n"); 42*10ef82d3SMarcel Ziswiler return err; 43*10ef82d3SMarcel Ziswiler } 44*10ef82d3SMarcel Ziswiler 45*10ef82d3SMarcel Ziswiler data[0] &= ~PMU_SUPPLYENE_SYSINEN; 46*10ef82d3SMarcel Ziswiler data[0] |= PMU_SUPPLYENE_EXITSLREQ; 47*10ef82d3SMarcel Ziswiler 48*10ef82d3SMarcel Ziswiler err = dm_i2c_write(dev, addr, data, 1); 49*10ef82d3SMarcel Ziswiler if (err) { 50*10ef82d3SMarcel Ziswiler debug("failed to set PMU_SUPPLYENE\n"); 51*10ef82d3SMarcel Ziswiler return err; 52*10ef82d3SMarcel Ziswiler } 53*10ef82d3SMarcel Ziswiler 54a5825625SMarcel Ziswiler if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) == 55a5825625SMarcel Ziswiler NVBOOTTYPE_RECOVERY) 56a5825625SMarcel Ziswiler printf("USB recovery mode\n"); 57a5825625SMarcel Ziswiler 58a5825625SMarcel Ziswiler return 0; 59a5825625SMarcel Ziswiler } 60e57c6e5bSMarcel Ziswiler 61e57c6e5bSMarcel Ziswiler #ifdef CONFIG_TEGRA_MMC 62e57c6e5bSMarcel Ziswiler /* 63e57c6e5bSMarcel Ziswiler * Routine: pin_mux_mmc 64e57c6e5bSMarcel Ziswiler * Description: setup the pin muxes/tristate values for the SDMMC(s) 65e57c6e5bSMarcel Ziswiler */ 66e57c6e5bSMarcel Ziswiler void pin_mux_mmc(void) 67e57c6e5bSMarcel Ziswiler { 68e57c6e5bSMarcel Ziswiler funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT); 69e57c6e5bSMarcel Ziswiler pinmux_tristate_disable(PMUX_PINGRP_GMB); 70e57c6e5bSMarcel Ziswiler } 71e57c6e5bSMarcel Ziswiler #endif 72e57c6e5bSMarcel Ziswiler 73e57c6e5bSMarcel Ziswiler #ifdef CONFIG_TEGRA_NAND 74e57c6e5bSMarcel Ziswiler void pin_mux_nand(void) 75e57c6e5bSMarcel Ziswiler { 76e57c6e5bSMarcel Ziswiler funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT); 7776a30fedSMarcel Ziswiler 7876a30fedSMarcel Ziswiler /* 7976a30fedSMarcel Ziswiler * configure pingroup ATC to something unrelated to 8076a30fedSMarcel Ziswiler * avoid ATC overriding KBC 8176a30fedSMarcel Ziswiler */ 8276a30fedSMarcel Ziswiler pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_GMI); 83e57c6e5bSMarcel Ziswiler } 84e57c6e5bSMarcel Ziswiler #endif 85e57c6e5bSMarcel Ziswiler 86e57c6e5bSMarcel Ziswiler #ifdef CONFIG_USB_EHCI_TEGRA 87e57c6e5bSMarcel Ziswiler void pin_mux_usb(void) 88e57c6e5bSMarcel Ziswiler { 89e57c6e5bSMarcel Ziswiler /* module internal USB bus to connect ethernet chipset */ 90e57c6e5bSMarcel Ziswiler funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); 91e57c6e5bSMarcel Ziswiler 92e57c6e5bSMarcel Ziswiler /* ULPI reference clock output */ 93e57c6e5bSMarcel Ziswiler pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); 94e57c6e5bSMarcel Ziswiler pinmux_tristate_disable(PMUX_PINGRP_CDEV2); 95e57c6e5bSMarcel Ziswiler 96e57c6e5bSMarcel Ziswiler /* PHY reset GPIO */ 97e57c6e5bSMarcel Ziswiler pinmux_tristate_disable(PMUX_PINGRP_UAC); 98e57c6e5bSMarcel Ziswiler 99e57c6e5bSMarcel Ziswiler /* VBus GPIO */ 100e57c6e5bSMarcel Ziswiler pinmux_tristate_disable(PMUX_PINGRP_DTE); 101e57c6e5bSMarcel Ziswiler 10200a5270bSMarcel Ziswiler /* Reset ASIX using LAN_RESET */ 10300a5270bSMarcel Ziswiler gpio_request(GPIO_PV4, "LAN_RESET"); 10400a5270bSMarcel Ziswiler gpio_direction_output(GPIO_PV4, 0); 10500a5270bSMarcel Ziswiler pinmux_tristate_disable(PMUX_PINGRP_GPV); 10600a5270bSMarcel Ziswiler udelay(5); 10700a5270bSMarcel Ziswiler gpio_set_value(GPIO_PV4, 1); 10800a5270bSMarcel Ziswiler 10900a5270bSMarcel Ziswiler /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */ 110e57c6e5bSMarcel Ziswiler pinmux_tristate_disable(PMUX_PINGRP_SPIG); 111e57c6e5bSMarcel Ziswiler } 112e57c6e5bSMarcel Ziswiler #endif 113b2ea19b5SMarcel Ziswiler 114b2ea19b5SMarcel Ziswiler #ifdef CONFIG_VIDEO_TEGRA 115b2ea19b5SMarcel Ziswiler /* 116b2ea19b5SMarcel Ziswiler * Routine: pin_mux_display 117b2ea19b5SMarcel Ziswiler * Description: setup the pin muxes/tristate values for the LCD interface) 118b2ea19b5SMarcel Ziswiler */ 119b2ea19b5SMarcel Ziswiler void pin_mux_display(void) 120b2ea19b5SMarcel Ziswiler { 121b2ea19b5SMarcel Ziswiler /* 122b2ea19b5SMarcel Ziswiler * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through 123b2ea19b5SMarcel Ziswiler * device-tree 124b2ea19b5SMarcel Ziswiler */ 125b2ea19b5SMarcel Ziswiler pinmux_tristate_disable(PMUX_PINGRP_DTA); 126b2ea19b5SMarcel Ziswiler 127b2ea19b5SMarcel Ziswiler pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM); 128b2ea19b5SMarcel Ziswiler pinmux_tristate_disable(PMUX_PINGRP_SDC); 129b2ea19b5SMarcel Ziswiler } 130b2ea19b5SMarcel Ziswiler #endif 131