1 /*
2  * Toradex Colibri PXA270 Support
3  *
4  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of
9  * the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19  * MA 02111-1307 USA
20  */
21 
22 #include <common.h>
23 #include <asm/arch/hardware.h>
24 #include <asm/arch/regs-mmc.h>
25 #include <asm/arch/pxa.h>
26 #include <netdev.h>
27 #include <asm/io.h>
28 #include <serial.h>
29 
30 DECLARE_GLOBAL_DATA_PTR;
31 
32 int board_init(void)
33 {
34 	/* We have RAM, disable cache */
35 	dcache_disable();
36 	icache_disable();
37 
38 	/* arch number of vpac270 */
39 	gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
40 
41 	/* adress of boot parameters */
42 	gd->bd->bi_boot_params = 0xa0000100;
43 
44 	return 0;
45 }
46 
47 int dram_init(void)
48 {
49 	pxa2xx_dram_init();
50 	gd->ram_size = PHYS_SDRAM_1_SIZE;
51 	return 0;
52 }
53 
54 #ifdef	CONFIG_CMD_USB
55 int usb_board_init(void)
56 {
57 	writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
58 		~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
59 		UHCHR);
60 
61 	writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
62 
63 	while (UHCHR & UHCHR_FSBIR)
64 		;
65 
66 	writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
67 	writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
68 
69 	/* Clear any OTG Pin Hold */
70 	if (readl(PSSR) & PSSR_OTGPH)
71 		writel(readl(PSSR) | PSSR_OTGPH, PSSR);
72 
73 	writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
74 	writel(readl(UHCRHDA) | 0x100, UHCRHDA);
75 
76 	/* Set port power control mask bits, only 3 ports. */
77 	writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
78 
79 	/* enable port 2 */
80 	writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
81 		UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
82 
83 	return 0;
84 }
85 
86 void usb_board_init_fail(void)
87 {
88 	return;
89 }
90 
91 void usb_board_stop(void)
92 {
93 	writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
94 	udelay(11);
95 	writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
96 
97 	writel(readl(UHCCOMS) | 1, UHCCOMS);
98 	udelay(10);
99 
100 	writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
101 
102 	return;
103 }
104 #endif
105 
106 #ifdef CONFIG_DRIVER_DM9000
107 int board_eth_init(bd_t *bis)
108 {
109 	return dm9000_initialize(bis);
110 }
111 #endif
112 
113 #ifdef	CONFIG_CMD_MMC
114 int board_mmc_init(bd_t *bis)
115 {
116 	pxa_mmc_register(0);
117 	return 0;
118 }
119 #endif
120