1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *  (C) Copyright 2014-2018
4  *  Marcel Ziswiler <marcel@ziswiler.com>
5  */
6 
7 #include <common.h>
8 #include <asm/arch/gp_padctrl.h>
9 #include <asm/arch/pinmux.h>
10 #include <asm/arch-tegra/ap.h>
11 #include <asm/arch-tegra/tegra.h>
12 #include <asm/gpio.h>
13 #include <asm/io.h>
14 #include <dm.h>
15 #include <i2c.h>
16 #include <pci_tegra.h>
17 #include "../common/tdx-common.h"
18 
19 #include "pinmux-config-apalis_t30.h"
20 
21 DECLARE_GLOBAL_DATA_PTR;
22 
23 #define PMU_I2C_ADDRESS		0x2D
24 #define MAX_I2C_RETRY		3
25 
26 #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
27 #define PEX_PERST_N	TEGRA_GPIO(S, 7) /* Apalis GPIO7 */
28 #define RESET_MOCI_CTRL	TEGRA_GPIO(I, 4)
29 
30 static int pci_reset_status;
31 #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
32 
33 int arch_misc_init(void)
34 {
35 	if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
36 	    NVBOOTTYPE_RECOVERY)
37 		printf("USB recovery mode\n");
38 
39 	return 0;
40 }
41 
42 int checkboard(void)
43 {
44 	printf("Model: Toradex Apalis T30 %dGB\n",
45 	       (gd->ram_size == 0x40000000) ? 1 : 2);
46 
47 	return 0;
48 }
49 
50 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
51 int ft_board_setup(void *blob, bd_t *bd)
52 {
53 	return ft_common_board_setup(blob, bd);
54 }
55 #endif
56 
57 /*
58  * Routine: pinmux_init
59  * Description: Do individual peripheral pinmux configs
60  */
61 void pinmux_init(void)
62 {
63 	pinmux_config_pingrp_table(tegra3_pinmux_common,
64 				   ARRAY_SIZE(tegra3_pinmux_common));
65 
66 	pinmux_config_pingrp_table(unused_pins_lowpower,
67 				   ARRAY_SIZE(unused_pins_lowpower));
68 
69 	/* Initialize any non-default pad configs (APB_MISC_GP regs) */
70 	pinmux_config_drvgrp_table(apalis_t30_padctrl,
71 				   ARRAY_SIZE(apalis_t30_padctrl));
72 }
73 
74 #ifdef CONFIG_PCI_TEGRA
75 int tegra_pcie_board_init(void)
76 {
77 	struct udevice *dev;
78 	u8 addr, data[1];
79 	int err;
80 
81 	err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
82 	if (err) {
83 		debug("%s: Cannot find PMIC I2C chip\n", __func__);
84 		return err;
85 	}
86 
87 	/* TPS659110: VDD2_OP_REG = 1.05V */
88 	data[0] = 0x27;
89 	addr = 0x25;
90 
91 	err = dm_i2c_write(dev, addr, data, 1);
92 	if (err) {
93 		debug("failed to set VDD supply\n");
94 		return err;
95 	}
96 
97 	/* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */
98 	data[0] = 0x0D;
99 	addr = 0x24;
100 
101 	err = dm_i2c_write(dev, addr, data, 1);
102 	if (err) {
103 		debug("failed to enable VDD supply\n");
104 		return err;
105 	}
106 
107 	/* TPS659110: LDO6_REG = 1.1V, ACTIVE */
108 	data[0] = 0x0D;
109 	addr = 0x35;
110 
111 	err = dm_i2c_write(dev, addr, data, 1);
112 	if (err) {
113 		debug("failed to set AVDD supply\n");
114 		return err;
115 	}
116 
117 #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
118 	gpio_request(PEX_PERST_N, "PEX_PERST_N");
119 	gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
120 #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
121 
122 	return 0;
123 }
124 
125 void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
126 {
127 	int index = tegra_pcie_port_index_of_port(port);
128 
129 	if (index == 2) { /* I210 Gigabit Ethernet Controller (On-module) */
130 		tegra_pcie_port_reset(port);
131 	}
132 #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
133 	/*
134 	 * Apalis PCIe aka port 1 and Apalis Type Specific 4 Lane PCIe aka port
135 	 * 0 share the same RESET_MOCI therefore only assert it once for both
136 	 * ports to avoid losing the previously brought up port again.
137 	 */
138 	else if ((index == 1) || (index == 0)) {
139 		/* only do it once per init cycle */
140 		if (pci_reset_status % 2 == 0) {
141 			/*
142 			 * Reset PLX PEX 8605 PCIe Switch plus PCIe devices on
143 			 * Apalis Evaluation Board
144 			 */
145 			gpio_direction_output(PEX_PERST_N, 0);
146 			gpio_direction_output(RESET_MOCI_CTRL, 0);
147 
148 			/*
149 			 * Must be asserted for 100 ms after power and clocks
150 			 * are stable
151 			 */
152 			mdelay(100);
153 
154 			gpio_set_value(PEX_PERST_N, 1);
155 			/*
156 			 * Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not
157 			 * Guaranteed Until 900 us After PEX_PERST# De-assertion
158 			 */
159 			mdelay(1);
160 			gpio_set_value(RESET_MOCI_CTRL, 1);
161 		}
162 		pci_reset_status++;
163 	}
164 #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
165 }
166 #endif /* CONFIG_PCI_TEGRA */
167 
168 /*
169  * Backlight off before OS handover
170  */
171 void board_preboot_os(void)
172 {
173 	gpio_request(TEGRA_GPIO(V, 2), "BKL1_ON");
174 	gpio_direction_output(TEGRA_GPIO(V, 2), 0);
175 }
176