1bf78b271SMarcel Ziswilerif TARGET_APALIS_T30 2bf78b271SMarcel Ziswiler 3bf78b271SMarcel Ziswilerconfig SYS_BOARD 4bf78b271SMarcel Ziswiler default "apalis_t30" 5bf78b271SMarcel Ziswiler 6bf78b271SMarcel Ziswilerconfig SYS_VENDOR 7bf78b271SMarcel Ziswiler default "toradex" 8bf78b271SMarcel Ziswiler 9bf78b271SMarcel Ziswilerconfig SYS_CONFIG_NAME 10bf78b271SMarcel Ziswiler default "apalis_t30" 11bf78b271SMarcel Ziswiler 12b891d010SMarcel Ziswilerconfig TDX_CFG_BLOCK 13b891d010SMarcel Ziswiler default y 14b891d010SMarcel Ziswiler 15b891d010SMarcel Ziswilerconfig TDX_HAVE_MMC 16b891d010SMarcel Ziswiler default y 17b891d010SMarcel Ziswiler 18b891d010SMarcel Ziswilerconfig TDX_CFG_BLOCK_DEV 19b891d010SMarcel Ziswiler default "0" 20b891d010SMarcel Ziswiler 21b891d010SMarcel Ziswilerconfig TDX_CFG_BLOCK_PART 22b891d010SMarcel Ziswiler default "1" 23b891d010SMarcel Ziswiler 24b891d010SMarcel Ziswiler# Toradex config block in eMMC, at the end of 1st "boot sector" 25b891d010SMarcel Ziswilerconfig TDX_CFG_BLOCK_OFFSET 26b891d010SMarcel Ziswiler default "-512" 27b891d010SMarcel Ziswiler 28*71cb3d7cSMarcel Ziswilerconfig APALIS_T30_PCIE_EVALBOARD_INIT 29*71cb3d7cSMarcel Ziswiler bool "Apalis Evaluation Board PCIe Initialisation" 30*71cb3d7cSMarcel Ziswiler help 31*71cb3d7cSMarcel Ziswiler Bring up the Apalis type specific 4 lane PCIe port as well as the 32*71cb3d7cSMarcel Ziswiler Apalis PCIe port with the PCIe switch as found on the Apalis 33*71cb3d7cSMarcel Ziswiler Evaluation board. Note that by default both those ports are also left 34*71cb3d7cSMarcel Ziswiler disabled in the device tree which needs changing as well for this to 35*71cb3d7cSMarcel Ziswiler actually work. 36*71cb3d7cSMarcel Ziswiler 37b891d010SMarcel Ziswilersource "board/toradex/common/Kconfig" 38b891d010SMarcel Ziswiler 39bf78b271SMarcel Ziswilerendif 40