1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2012-2016 Toradex, Inc. 4 */ 5 6 #include <common.h> 7 #include <asm/io.h> 8 #include <asm/arch-tegra/tegra_i2c.h> 9 #include "as3722_init.h" 10 11 /* AS3722-PMIC-specific early init code - get CPU rails up, etc */ 12 13 void tegra_i2c_ll_write_addr(uint addr, uint config) 14 { 15 struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; 16 17 writel(addr, ®->cmd_addr0); 18 writel(config, ®->cnfg); 19 } 20 21 void tegra_i2c_ll_write_data(uint data, uint config) 22 { 23 struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; 24 25 writel(data, ®->cmd_data1); 26 writel(config, ®->cnfg); 27 } 28 29 void pmic_enable_cpu_vdd(void) 30 { 31 debug("%s entry\n", __func__); 32 33 #ifdef AS3722_SD1VOLTAGE_DATA 34 /* Set up VDD_CORE, for boards where OTP is incorrect*/ 35 debug("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__); 36 /* Configure VDD_CORE via the AS3722 PMIC on the PWR I2C bus */ 37 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); 38 tegra_i2c_ll_write_data(AS3722_SD1VOLTAGE_DATA, I2C_SEND_2_BYTES); 39 /* 40 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. 41 * tegra_i2c_ll_write_data(AS3722_SD1CONTROL_DATA, I2C_SEND_2_BYTES); 42 */ 43 udelay(10 * 1000); 44 #endif 45 46 debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__); 47 /* 48 * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus. 49 * First set VDD to 1.0V, then enable the VDD regulator. 50 */ 51 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); 52 tegra_i2c_ll_write_data(AS3722_SD0VOLTAGE_DATA, I2C_SEND_2_BYTES); 53 /* 54 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. 55 * tegra_i2c_ll_write_data(AS3722_SD0CONTROL_DATA, I2C_SEND_2_BYTES); 56 */ 57 udelay(10 * 1000); 58 59 debug("%s: Setting VDD_GPU to 1.0V via AS3722 reg 6/4D\n", __func__); 60 /* 61 * Bring up VDD_GPU via the AS3722 PMIC on the PWR I2C bus. 62 * First set VDD to 1.0V, then enable the VDD regulator. 63 */ 64 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); 65 tegra_i2c_ll_write_data(AS3722_SD6VOLTAGE_DATA, I2C_SEND_2_BYTES); 66 /* 67 * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. 68 * tegra_i2c_ll_write_data(AS3722_SD6CONTROL_DATA, I2C_SEND_2_BYTES); 69 */ 70 udelay(10 * 1000); 71 72 debug("%s: Set VPP_FUSE to 1.2V via AS3722 reg 0x12/4E\n", __func__); 73 /* 74 * Bring up VPP_FUSE via the AS3722 PMIC on the PWR I2C bus. 75 * First set VDD to 1.2V, then enable the VDD regulator. 76 */ 77 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); 78 tegra_i2c_ll_write_data(AS3722_LDO2VOLTAGE_DATA, I2C_SEND_2_BYTES); 79 /* 80 * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. 81 * tegra_i2c_ll_write_data(AS3722_LDO2CONTROL_DATA, I2C_SEND_2_BYTES); 82 */ 83 udelay(10 * 1000); 84 85 debug("%s: Set VDD_SDMMC1 to 3.3V via AS3722 reg 0x11/4E\n", __func__); 86 /* 87 * Bring up VDD_SDMMC1 via the AS3722 PMIC on the PWR I2C bus. 88 * First set it to value closest to 3.3V, then enable the regulator 89 * 90 * NOTE: We do this early because doing it later seems to hose the CPU 91 * power rail/partition startup. Need to debug. 92 */ 93 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); 94 tegra_i2c_ll_write_data(AS3722_LDO1VOLTAGE_DATA, I2C_SEND_2_BYTES); 95 /* 96 * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. 97 * tegra_i2c_ll_write_data(AS3722_LDO1CONTROL_DATA, I2C_SEND_2_BYTES); 98 */ 99 udelay(10 * 1000); 100 101 debug("%s: Set VDD_SDMMC3 to 3.3V via AS3722 reg 0x16/4E\n", __func__); 102 /* 103 * Bring up VDD_SDMMC3 via the AS3722 PMIC on the PWR I2C bus. 104 * First set it to bypass 3.3V straight thru, then enable the regulator 105 * 106 * NOTE: We do this early because doing it later seems to hose the CPU 107 * power rail/partition startup. Need to debug. 108 */ 109 tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); 110 tegra_i2c_ll_write_data(AS3722_LDO6VOLTAGE_DATA, I2C_SEND_2_BYTES); 111 /* 112 * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. 113 * tegra_i2c_ll_write_data(AS3722_LDO6CONTROL_DATA, I2C_SEND_2_BYTES); 114 */ 115 udelay(10 * 1000); 116 } 117