1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2016 Toradex, Inc. 4 */ 5 6 #include <common.h> 7 #include <asm/arch-tegra/ap.h> 8 #include <asm/gpio.h> 9 #include <asm/io.h> 10 #include <asm/arch/gpio.h> 11 #include <asm/arch/pinmux.h> 12 #include <power/as3722.h> 13 14 #include "../common/tdx-common.h" 15 #include "pinmux-config-apalis-tk1.h" 16 17 #define LAN_RESET_N TEGRA_GPIO(S, 2) 18 19 int arch_misc_init(void) 20 { 21 if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) == 22 NVBOOTTYPE_RECOVERY) 23 printf("USB recovery mode\n"); 24 25 return 0; 26 } 27 28 int checkboard(void) 29 { 30 puts("Model: Toradex Apalis TK1 2GB\n"); 31 32 return 0; 33 } 34 35 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) 36 int ft_board_setup(void *blob, bd_t *bd) 37 { 38 return ft_common_board_setup(blob, bd); 39 } 40 #endif 41 42 /* 43 * Routine: pinmux_init 44 * Description: Do individual peripheral pinmux configs 45 */ 46 void pinmux_init(void) 47 { 48 pinmux_clear_tristate_input_clamping(); 49 50 gpio_config_table(apalis_tk1_gpio_inits, 51 ARRAY_SIZE(apalis_tk1_gpio_inits)); 52 53 pinmux_config_pingrp_table(apalis_tk1_pingrps, 54 ARRAY_SIZE(apalis_tk1_pingrps)); 55 56 pinmux_config_drvgrp_table(apalis_tk1_drvgrps, 57 ARRAY_SIZE(apalis_tk1_drvgrps)); 58 } 59 60 #ifdef CONFIG_PCI_TEGRA 61 int tegra_pcie_board_init(void) 62 { 63 /* TODO: Convert to driver model 64 struct udevice *pmic; 65 int err; 66 67 err = as3722_init(&pmic); 68 if (err) { 69 error("failed to initialize AS3722 PMIC: %d\n", err); 70 return err; 71 } 72 73 err = as3722_sd_enable(pmic, 4); 74 if (err < 0) { 75 error("failed to enable SD4: %d\n", err); 76 return err; 77 } 78 79 err = as3722_sd_set_voltage(pmic, 4, 0x24); 80 if (err < 0) { 81 error("failed to set SD4 voltage: %d\n", err); 82 return err; 83 } 84 85 err = as3722_gpio_configure(pmic, 1, AS3722_GPIO_OUTPUT_VDDH | 86 AS3722_GPIO_INVERT); 87 if (err < 0) { 88 error("failed to configure GPIO#1 as output: %d\n", err); 89 return err; 90 } 91 92 err = as3722_gpio_direction_output(pmic, 2, 1); 93 if (err < 0) { 94 error("failed to set GPIO#2 high: %d\n", err); 95 return err; 96 } 97 */ 98 99 /* Reset I210 Gigabit Ethernet Controller */ 100 gpio_request(LAN_RESET_N, "LAN_RESET_N"); 101 gpio_direction_output(LAN_RESET_N, 0); 102 103 /* 104 * Make sure we don't get any back feeding from LAN_WAKE_N resp. 105 * DEV_OFF_N 106 */ 107 gpio_request(TEGRA_GPIO(O, 5), "LAN_WAKE_N"); 108 gpio_direction_output(TEGRA_GPIO(O, 5), 0); 109 110 gpio_request(TEGRA_GPIO(O, 6), "LAN_DEV_OFF_N"); 111 gpio_direction_output(TEGRA_GPIO(O, 6), 0); 112 113 /* Make sure LDO9 and LDO10 are initially enabled @ 0V */ 114 /* TODO: Convert to driver model 115 err = as3722_ldo_enable(pmic, 9); 116 if (err < 0) { 117 error("failed to enable LDO9: %d\n", err); 118 return err; 119 } 120 err = as3722_ldo_enable(pmic, 10); 121 if (err < 0) { 122 error("failed to enable LDO10: %d\n", err); 123 return err; 124 } 125 err = as3722_ldo_set_voltage(pmic, 9, 0x80); 126 if (err < 0) { 127 error("failed to set LDO9 voltage: %d\n", err); 128 return err; 129 } 130 err = as3722_ldo_set_voltage(pmic, 10, 0x80); 131 if (err < 0) { 132 error("failed to set LDO10 voltage: %d\n", err); 133 return err; 134 } 135 */ 136 137 mdelay(100); 138 139 /* Make sure controller gets enabled by disabling DEV_OFF_N */ 140 gpio_set_value(TEGRA_GPIO(O, 6), 1); 141 142 /* Enable LDO9 and LDO10 for +V3.3_ETH on patched prototypes */ 143 /* TODO: Convert to driver model 144 err = as3722_ldo_set_voltage(pmic, 9, 0xff); 145 if (err < 0) { 146 error("failed to set LDO9 voltage: %d\n", err); 147 return err; 148 } 149 err = as3722_ldo_set_voltage(pmic, 10, 0xff); 150 if (err < 0) { 151 error("failed to set LDO10 voltage: %d\n", err); 152 return err; 153 } 154 */ 155 156 mdelay(100); 157 gpio_set_value(LAN_RESET_N, 1); 158 159 #ifdef APALIS_TK1_PCIE_EVALBOARD_INIT 160 #define PEX_PERST_N TEGRA_GPIO(DD, 1) /* Apalis GPIO7 */ 161 #define RESET_MOCI_CTRL TEGRA_GPIO(U, 4) 162 163 /* Reset PLX PEX 8605 PCIe Switch plus PCIe devices on Apalis Evaluation 164 Board */ 165 gpio_request(PEX_PERST_N, "PEX_PERST_N"); 166 gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL"); 167 gpio_direction_output(PEX_PERST_N, 0); 168 gpio_direction_output(RESET_MOCI_CTRL, 0); 169 /* Must be asserted for 100 ms after power and clocks are stable */ 170 mdelay(100); 171 gpio_set_value(PEX_PERST_N, 1); 172 /* Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not Guaranteed Until 173 900 us After PEX_PERST# De-assertion */ 174 mdelay(1); 175 gpio_set_value(RESET_MOCI_CTRL, 1); 176 #endif /* APALIS_T30_PCIE_EVALBOARD_INIT */ 177 178 return 0; 179 } 180 #endif /* CONFIG_PCI_TEGRA */ 181